CPU with FPGA

Started by Rick C in sci.electronics.design3 years ago

I was poking around looking for FPGA chips in packages that work optimally for me and I found a couple of new companies that are making CPUs with...

I was poking around looking for FPGA chips in packages that work optimally for me and I found a couple of new companies that are making CPUs with FPGA fabric that aren't monsters like the Zync from Xilinx in huge BGA packages. I had found the Lattice XO3D which is now available in a 72QFN with enough I/Os to get the job done, but it's a bit pricey at over $10. There are so


A simple tunable crystal oscillator

Started by Jan Panteltje in sci.electronics.design10 years ago 37 replies

I am going to use the 10MHz output of the Rubbitin frequency reference to make 50.000000000 MHz for my FPGA board. The plot is a bit...

I am going to use the 10MHz output of the Rubbitin frequency reference to make 50.000000000 MHz for my FPGA board. The plot is a bit complicated, and is planned like this: 25 MHz crystal > - FPGA board Spartan2 -> x2 DLL (delay locked loop that is a build in thing in the Spartan2 FPGA) -> 50 MHz -> divide by 5 in FPGA -> 10 MHz -> xor with 10MHz from Rubbitinn unit -> low pass -> 25MHz xta


FPGA config sizes

Started by John Larkin in sci.electronics.design3 years ago 27 replies

We're planning a new universal boot loader for a family of ST processors. The uP would host the loader in a bit of local flash and read an...

We're planning a new universal boot loader for a family of ST processors. The uP would host the loader in a bit of local flash and read an outboard serial flash to get the specific application code and one or more FPGA configurations. So, how many config bits might there be for a modern mid-range FPGA doing a moderately complex application? I think we could enable compression too. ...


PSoC or FPGA?

Started by fasf in sci.electronics.design11 years ago 390 replies

Hi, i've worked wit 8bit/32bit microcontrollers for 5 years and now i want to explore new fields, so i'm interested in these two solutions:...

Hi, i've worked wit 8bit/32bit microcontrollers for 5 years and now i want to explore new fields, so i'm interested in these two solutions: PSoC and FPGA. I'm totally new (i don't know neither VHDL nor Verilog) and i don't understand the differences between these programmable devices. For hobby, what do you think is more useful to study? Can you suggest a low cost DevKit? Any getting starte...


ddr2 on artix fpga's

Started by rj dee in sci.electronics.design1 year ago 13 replies

Hi guys. The last time I put ddr2 on an fpga was with virtex 4 and I was able to terminate ras/cas etc internally. I want to do the same with an...

Hi guys. The last time I put ddr2 on an fpga was with virtex 4 and I was able to terminate ras/cas etc internally. I want to do the same with an artix device and I can't find any documentation except the mig user guide which says that I can't do it. Does anyone have any experience with this, it will be a single ddr so I don't need to "stub series terminate" the signals with externa


tiebreaker

Started by John Larkin in sci.electronics.design2 years ago 39 replies

We have an ST ARM trying to talk to a Xininx FPGA with a parallel bus memory interface. It doesn't work. The software person suspects an FPGA...

We have an ST ARM trying to talk to a Xininx FPGA with a parallel bus memory interface. It doesn't work. The software person suspects an FPGA bug, and vice versa. I'm going to scope things and see. And no matter how many test points you design into a board, they are seldom the right ones. https://www.dropbox.com/s/emt9wgihe5i8apy/P900_TPs_1.jpg?raw=1 -- John Larkin Highla...


Blowing up Chips

Started by Ricky in sci.electronics.design2 months ago 3 replies

A test fixture uses an FPGA to stimulate a board under test and analyzed the results for testing. Once in a while, maybe after testing 300 units,...

A test fixture uses an FPGA to stimulate a board under test and analyzed the results for testing. Once in a while, maybe after testing 300 units, the FPGA gets fried. The symptom is a near short from Vcc (3.3V) to ground, often with a similar short on an I/O pin. I can't find anything that would cause this. The entire circuit is 3.3V other than a pair of RS-422 chips which ha


delta-sigma again

Started by Anonymous in sci.electronics.design3 years ago 41 replies

I'm still playing with delta-sigma A/D conversion in LT Spice. I'll be using the ADUM7703 isolated 2nd order converter, clocked at 20...

I'm still playing with delta-sigma A/D conversion in LT Spice. I'll be using the ADUM7703 isolated 2nd order converter, clocked at 20 MHz, and we're thinking now about decimation filters in an FPGA. Win was considering using a d-s encoder and an analog recovery filter. My filter will be digital, and it will be inside a high-power control loop. The FPGA will drive a bunch of DACs at 50...


Input protection for 3.3V FPGA in a TTL world...

Started by John Robertson in sci.electronics.design12 months ago 37 replies

I am still working with a friend on a TTL level replacement for some chips on a pinball board and we have a nice FPGA (MAX 10 based) but it...

I am still working with a friend on a TTL level replacement for some chips on a pinball board and we have a nice FPGA (MAX 10 based) but it wants (of course) 3.3V I/O. I was thinking that SN74CBT16211C (24 x IO level shifter) and a TVS arrays like the D3V3X8U9LP3810-7 with a low Ohm (1 - 10R) Flame-Proof 1/8W or less resistor on the outside world interface would do for protection. ...


FPGA sensitivities

Started by John Larkin in sci.electronics.design2 years ago 22 replies

I have a time-critical thing where the signal passes through an XC7A15 FPGA and does a fair lot of stuff inside. I measured delay vs...

I have a time-critical thing where the signal passes through an XC7A15 FPGA and does a fair lot of stuff inside. I measured delay vs some voltages: 1.8 aux no measurable DC effect 3.3 vccio no measurable DC effect 2.5 vccio ditto (key io's are LVDS in this bank) +1 core -10 ps per millivolt! If I vary the trigger frequency, I can see the delay heterodyning against the 1....


What's Your Favorite Processor on an FPGA?

Started by rickman in sci.electronics.design9 years ago 82 replies

I have been working on designs of processors for FPGAs for quite a while. I have looked at the uBlaze, the picoBlaze, the NIOS, two from...

I have been working on designs of processors for FPGAs for quite a while. I have looked at the uBlaze, the picoBlaze, the NIOS, two from Lattice and any number of open source processors. Many of the open source designs were stack processors since they tend to be small and efficient in an FPGA. J1 is one I had pretty much missed until lately. It is fast and small and looks like it wa...


ribbon cable TDR test

Started by John Larkin in sci.electronics.design3 years ago 20 replies

I'm going to have one board in the front of a rackmount box, the controller, with an FPGA. In the back of the box will be an output board with...

I'm going to have one board in the front of a rackmount box, the controller, with an FPGA. In the back of the box will be an output board with an ADUM7703 isolated delta-sigma converter measuring current. The boards will be connected by an 18" ribbon cable. The signals are a 20 MHz clock to the ADUM and 20 mpbs delta-sigma data coming back to the FPGA. Both sigs are source terminated. I...


placing a board

Started by Anonymous in sci.electronics.design3 years ago 10 replies

https://www.dropbox.com/s/gm0awkc0489s6om/T901_15.JPG?raw=1 I'm doing the placement on this one. I have the circuit in my head, and I know...

https://www.dropbox.com/s/gm0awkc0489s6om/T901_15.JPG?raw=1 I'm doing the placement on this one. I have the circuit in my head, and I know about the many electrical constraints, so it's easier to do the critical stuff myself, instead of trying to explain it all to my layout people. The issue now is, can this be done in 6 layers? Probably not, but only the FPGA-DDR3 bit really needs ...


any raspberry pi people here?

Started by John Larkin in sci.electronics.design2 months ago 60 replies

The pi doesn't seem to have any general counter/timer hardware, like ARMs usually do. I've seen vague references to using the GPU to...

The pi doesn't seem to have any general counter/timer hardware, like ARMs usually do. I've seen vague references to using the GPU to do timings. I'd like to measure frequencies and timestamp some edges, in the 1 us sort of domain, several channels. I guess we could hang a small FPGA off to the side if pi can't do it. Do pi's have crystal oscillators? I guess we could add one too. ...


MicroZED

Started by John Larkin in sci.electronics.design9 years ago 119 replies

Has anybody used the MicroZED? It looks like a good subassembly to use on a controller board. The documentation, especially on...

Has anybody used the MicroZED? It looks like a good subassembly to use on a controller board. The documentation, especially on mechanicals, is spotty. We have an upcoming project that needs a uP, FPGA, Ethernet, DRAM, all that stuff. It's tempting to buy a little board that has all that done and working, running Linux out of the box. -- John Larkin Highland Technology...


Freescale fractional clock divider paper

Started by bitrex in sci.electronics.design5 years ago 24 replies

This looks interesting but I'm having trouble deciphering how it's actually supposed to work due to poor tech writing/diagramming on the part...

This looks interesting but I'm having trouble deciphering how it's actually supposed to work due to poor tech writing/diagramming on the part of the authors. Can anyone explain how this system is actually supposed to work or what a real-world FPGA implementation might look like?


PRBS in LT Spice

Started by John Larkin in sci.electronics.design10 years ago 25 replies

We are considering sending data over CAT6 twisted-pairs, from one FPGA to another at some 10s of meters distance. It might be prudent...

We are considering sending data over CAT6 twisted-pairs, from one FPGA to another at some 10s of meters distance. It might be prudent to transformer-couple the data, to avoid ground-loop common-mode hazards, and the obvious choice would be to use RJ45 connectors with built-in Ethernet magnetics. These seem to have inductance in the 400 uH range, which gives a low-end frequency response in t...


Kanerva on "Computing with 10,000-Bit Words"

Started by Joe Gwinn in sci.electronics.design1 year ago 5 replies

This article from 2014 is Kanerva's 7-page summary of the then current state of Sparse Distributed Memory, Spatter Codes, and related...

This article from 2014 is Kanerva's 7-page summary of the then current state of Sparse Distributed Memory, Spatter Codes, and related areas, with an extensive reference list. The computational engine Kanerva describes here is something that the denizens of S.E.D. could implement in a small FPGA, should it be useful to do so. A likely use would be content-addressed memory that can tolera...


Looking for SMD level shifters to TTL

Started by John Robertson in sci.electronics.design1 year ago 25 replies

Working on a FPGA project and we need perhaps 30 level shifter gates. Anyone work with 3.6 to 5.0 volt interfaces that can recommend any...

Working on a FPGA project and we need perhaps 30 level shifter gates. Anyone work with 3.6 to 5.0 volt interfaces that can recommend any single part over the rest before I spend a few hours digging through Digi/Mouser/Newark's inventory? In some cases we can get away with resistors, but there is a bit of TTL level drivers needed. Thanks! John :-#)# -- (Please post followups or...


Electronic components supplier.

Started by Raymond Chen in sci.electronics.design4 months ago

Hello everyone, my name is Raymond Chen. I am from Shenzhen, China. I am an electronic component supplier. Our main brands are Altera,...

Hello everyone, my name is Raymond Chen. I am from Shenzhen, China. I am an electronic component supplier. Our main brands are Altera, Xilinx, STMicroelectronics, Texas Instruments, Silicon Labs, Microchip, Analog Devices, NXP, Atmel, ON Semiconductor. We have all kinds of MCU, FPGA, capacitance resistance, and sensors. Please contact me with any purchasing needs. whatsapp:+8617318034...