Using Flash RAM to replace obsolete CMOS RAM

Started by John Robertson in sci.electronics.design1 year ago 30 replies

I have a project in mind using small Flash RAM and a cheap CPU to substitute for the old TTL level CMOS RAM used on arcade games. This has...

I have a project in mind using small Flash RAM and a cheap CPU to substitute for the old TTL level CMOS RAM used on arcade games. This has come up because the NVRAM that is currently being used is getting hard to find at prices under $7 to $9USD. Something like the M25P05-AVMN6P (512k or 64K x 8) or similar chips are $0.20 in single quantities. The size of CMOS RAM we are replacing ...


Error message on GPIB program, Help

Started by amdx in sci.electronics.design8 years ago 33 replies

Hi all, Recap- I had the low Cmos Clock Lithium Battery in a computer. I received a Cmos Clock Lithium Battery from China, had some question...

Hi all, Recap- I had the low Cmos Clock Lithium Battery in a computer. I received a Cmos Clock Lithium Battery from China, had some question about the date code. I installed the Cmos Clock Lithium Battery and had the same message low CMOS battery. I order a new one from Mouser and the computer now works properly. Now I'm onto making the computer control some HP equipment via GPIB, whi...


CMOS Divide by 5.9 Cicuit

Started by Ken Knowles in sci.electronics.design8 years ago 27 replies

I have a CD4060 that uses a 32,768Hz crystal to generate a 32Hz square wave. I would like to divide this down several times in 5.9Hz...

I have a CD4060 that uses a 32,768Hz crystal to generate a 32Hz square wave. I would like to divide this down several times in 5.9Hz increments, while keeping the duty cycle at 50%. What would be the most straightforward method, preferably keeping in CMOS? Ken Knowles


Using CMOS logic for amplifying small signals

Started by Mr. B in sci.electronics.design15 years ago 16 replies

Something has occurred to me, and I was wondering if anyone knew more about this. Could a CMOS logic inverter, like a 4049, be used as a very...

Something has occurred to me, and I was wondering if anyone knew more about this. Could a CMOS logic inverter, like a 4049, be used as a very high gain amplifier if it were properly biased? I figured that the DC offset should be set at just about half the supply voltage, so that the gate was always between a '1' and a '0'. I am not sure if the gate would behave linearly in that region, or...


Protecting a CMOS gate input

Started by Pimpom in sci.electronics.design2 years ago 41 replies

I'm going to use a CMOS bistable chip (not a uP) that's to be manually triggered from time to time by a mechanical switch. It has a debouncing...

I'm going to use a CMOS bistable chip (not a uP) that's to be manually triggered from time to time by a mechanical switch. It has a debouncing circuit but since the switch is to be connected by a removable jack-and-cable set and operated by non-techno savvy users, I thought I'd include a few extra components as a precaution. The input will have a series resistor followed by a capacito...


Mixing 4000-series CMOS and 74HC in a 5V system - any issues?

Started by Steve Goldstein in sci.electronics.design5 years ago 29 replies

Do 4000-series CMOS inputs have any problems coping with the much faster edge rates of 74HC outputs? Everything would be running on 5V, of...

Do 4000-series CMOS inputs have any problems coping with the much faster edge rates of 74HC outputs? Everything would be running on 5V, of course. It's all "just" digital logic, but sometimes the transistors inside forget that... And yes, I know I could use a processor and write code instead of using a few packages of random logic. That's not my desire.


Cmos Battery/Clock

Started by amdx in sci.electronics.design8 years ago 23 replies

Well I've received my M48T86PC1 Cmos Clock Lithium Battery as a gift from China, according to the custom declaration. It is an ST...

Well I've received my M48T86PC1 Cmos Clock Lithium Battery as a gift from China, according to the custom declaration. It is an ST microelectronics part, my concern is the manufacturing date. The Chip is labeled as below, M48T86PC1 Real-Time Clock Contains Lithium Cell 990SN VH MYS 99 1033 WO723Y I hate s...


5-volt tolerant CMOS

Started by John Larkin in sci.electronics.design9 years ago 38 replies

Lots of CMOS gates and such are tolerant of pin voltages above Vcc, typically rated for 7 volts max. Does anybody know what sort of input...

Lots of CMOS gates and such are tolerant of pin voltages above Vcc, typically rated for 7 volts max. Does anybody know what sort of input circuits are typically used? Does it behave like a zener? To ground? Some parts specify an allowed input curent in the pullup direction, some don't. I'm designing a really tiny board, and an opamp can potentially overdrive an analog mux, an FSA3157....


New 555 Spice Model

Started by Jim Thompson in sci.electronics.design12 years ago 25 replies

Got annoyed at the flaky 555 models that are out there, so I rolled my own... http://www.analog-innovations.com/SED/MyLMC555.zip Based on...

Got annoyed at the flaky 555 models that are out there, so I rolled my own... http://www.analog-innovations.com/SED/MyLMC555.zip Based on old AMI 20V CMOS device models, mostly form/fit/function with CMOS, but some behavioral on the front-end where it doesn't matter. Optimized and fitted to National LMC555 at 5V operation. It'll work at other voltages but may sink/source more or less ...


CMOS logic with ground for Vdd

Started by Pimpom in sci.electronics.design2 years ago 5 replies

I'm designing an analog circuit with a regulated +/-12V supply. I want to include a 4000 series CMOS logic device to switch a sub-circuit at...

I'm designing an analog circuit with a regulated +/-12V supply. I want to include a 4000 series CMOS logic device to switch a sub-circuit at sub-Hz frequency. I haven't worked out all the details but, at this stage, using ground as Vdd and -12V as Vss looks like a convenient way to go. Is there any reason why this is inadvisable? Any caveats? (Proper care will be taken to ensure that ...


PING: Phil Hobbs, JFET Noise

Started by Jim Thompson in sci.electronics.design6 years ago 11 replies

Phil, What makes a JFET less noisy than a enhancement mode CMOS device? Would a depletion mode CMOS device be quieter? ...

Phil, What makes a JFET less noisy than a enhancement mode CMOS device? Would a depletion mode CMOS device be quieter? ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San ...


Jim T

Started by John Larkin in sci.electronics.design5 years ago 12 replies

Hey, Jim, Have you worked with any high voltage analog IC processes? Like, say, 300 volts swing? I know that APEX used to have a horrible...

Hey, Jim, Have you worked with any high voltage analog IC processes? Like, say, 300 volts swing? I know that APEX used to have a horrible HV cmos process, maybe fabbed by AT&T or IBM or somebody improbable, but they use discretes now mostly. -- John Larkin Highland Technology, Inc picosecond timing precision measurement jlarkin att highlandtechnology dott com http...


GreenPAK cookbook

Started by bitrex in sci.electronics.design2 years ago 3 replies

There was the CMOS cookbook, now there's the GreenPAK cookbook: An interesting feature is mentioned at the start of chapter 5. To...

There was the CMOS cookbook, now there's the GreenPAK cookbook: An interesting feature is mentioned at the start of chapter 5. To maintain a given mixed-signal array configuration after power-loss the devices are the equivalent of OTP and will boot into that state. But if the particular de


semiconductor drift

Started by John Larkin in sci.electronics.design8 years ago 52 replies

We have two 8-channel waveform generators that were shipped 4 months ago, and came back because the customer ordered too many or something. We...

We have two 8-channel waveform generators that were shipped 4 months ago, and came back because the customer ordered too many or something. We routinely test anything that comes back, before returning them or returning to stock. What's interesting is that all 16 channels have a negative DC offset. Each channel is a diff-current-output cmos DAC, an opamp diffamp, a passive LC filter, and ...


74LS47 substitution

Started by bitrex in sci.electronics.design6 years ago 23 replies

Is there a CMOS-type substitute for the 74LS47 with "open collector" type outputs suitable for sinking around 20mA? That uses less quiescent...

Is there a CMOS-type substitute for the 74LS47 with "open collector" type outputs suitable for sinking around 20mA? That uses less quiescent power than the 47's ~10mA. Supply voltage either 5 or 3.3 volts, depending. It doesn't really matter if the chip itself does a conversion from BCD to the appropriate outputs, as that mapping can be done in software, but the chip would need to have ...


7-segment LCD to BCD decoder ?

Started by N_Cook in sci.electronics.design8 years ago 83 replies

Assuming one back-plane to consider , what would be most efficient component-count/least complex discrete/CMOS/74 route , ie not pic/Pi/uC to...

Assuming one back-plane to consider , what would be most efficient component-count/least complex discrete/CMOS/74 route , ie not pic/Pi/uC to firstly convert the ex-oring business to proper levels and then the "mapping", output could be linear per digit rather than bcd. Starting with an off-the-shelf commercial unit where the LCD display is driven off a uC, to give a remotely monitorable ...


complementary cmos levels

Started by Anonymous in sci.electronics.design3 years ago 11 replies

I have a fast 3.3 volt logic level that I'd like to split into inverted and non-inverted copies with minimum time skew. I think that TI...

I have a fast 3.3 volt logic level that I'd like to split into inverted and non-inverted copies with minimum time skew. I think that TI once had a buffer with one input and complementary outputs, but I can't find a reference to that. It's probably slow and obsolete. A TTL to RS485 converter sort of works but would be slow. I could use two separate XOR gates, one as a buffer and the...


Mixed-signal model of CD4093

Started by bitrex in sci.electronics.design5 years ago 6 replies

Is there a mixed-signal model of the CD4093 NAND Schmitt available that can be used in LTSpice? One that includes power supply connections and...

Is there a mixed-signal model of the CD4093 NAND Schmitt available that can be used in LTSpice? One that includes power supply connections and shows realistic supply currents, etc. Or any of that fashion of CMOS family such as hex inverters that can also be used as negative-feedback analog amplifiers


OT: Can CMOS battery on PC motherboard be hot-swapped?

Started by Joerg in sci.electronics.design10 years ago 74 replies

Folks, Got a Dell Vostro 200 mini tower with XP on there that seems to be a bit off in the realtime clock lately. Around five years old so...

Folks, Got a Dell Vostro 200 mini tower with XP on there that seems to be a bit off in the realtime clock lately. Around five years old so needs a new 3V coin cell on the mobo. In order not to lose all the setup stuff, can those CR2032 coin cells be hot-swapped while the PC is running? Of course using ESD straps, being careful and all that. -- Regards, Joerg http://www.analogco...


SMT-on-copper-clad

Started by bitrex in sci.electronics.design2 years ago 4 replies

Using "surfboards" to mount about a half-dozen SMT cmos logic to a copper clad, how many by-pass/de-glitcher caps do you put on and where do...

Using "surfboards" to mount about a half-dozen SMT cmos logic to a copper clad, how many by-pass/de-glitcher caps do you put on and where do you put them when you use this "style"? frequencies in the 10s of MHz. Do you put one on each chip (seems like overkill) or do you bypass at the power input and rely on distributed capacitance of the board?