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CMOS Divide by 5.9 Cicuit

Started by Ken Knowles August 20, 2014
I have a CD4060 that uses a 32,768Hz crystal to generate a 32Hz square
wave. 

I would like to divide this down several times in 5.9Hz increments,
while keeping the duty cycle at 50%. 

What would be the most straightforward method, preferably keeping in
CMOS?

Ken Knowles
Ken Knowles <kknowles@endor.com> wrote:

>I have a CD4060 that uses a 32,768Hz crystal to generate a 32Hz square >wave.
>I would like to divide this down several times in 5.9Hz increments, >while keeping the duty cycle at 50%.
>What would be the most straightforward method, preferably keeping in >CMOS?
Using a &#4294967295;C. 32 kHz are rather low, so a &#4294967295;C could do the task even in software using "bit bang" method. -- Dipl.-Inform(FH) Peter Heitzer, peter.heitzer@rz.uni-regensburg.de HTML mails will be forwarded to /dev/null.
On 2014-08-20, Ken Knowles <kknowles@endor.com> wrote:
> > I have a CD4060 that uses a 32,768Hz crystal to generate a 32Hz square > wave. > > I would like to divide this down several times in 5.9Hz increments, > while keeping the duty cycle at 50%.
that's kind of hard as 5.9 is not a clean factor of 32.
> What would be the most straightforward method, preferably keeping in > CMOS?
which CMOS features do you need? and how close to 5.9 do you need to get. -- umop apisdn --- news://freenews.netfront.net/ - complaints: news@netfront.net ---
On Wednesday, August 20, 2014 1:17:10 AM UTC-4, Ken Knowles wrote:
> I have a CD4060 that uses a 32,768Hz crystal to generate a 32Hz square > > wave. > > > > I would like to divide this down several times in 5.9Hz increments, > > while keeping the duty cycle at 50%. > > > > What would be the most straightforward method, preferably keeping in > > CMOS? > > > > Ken Knowles
"get's out calculator.. punch punch.." if you divide 32,768 by 5554 you get 5.8998... Hz. 5554 is even so reset counter after 2777 and then a divide by two as the last step to get your square wave. George H.
On Wed, 20 Aug 2014 15:17:10 +1000, Ken Knowles wrote:

> I have a CD4060 that uses a 32,768Hz crystal to generate a 32Hz square > wave. > I would like to divide this down several times in 5.9Hz increments, > while keeping the duty cycle at 50%. > > What would be the most straightforward method, preferably keeping in > CMOS?
"Dividing down by 5.9Hz increments" doesn't make sense. What do you really want? I assume that you want a signal with a frequency of n * 5.9Hz, with you choosing n, and that you want to use the crystal as a frequency reference. Yes? No? -- www.wescottdesign.com
On Wed, 20 Aug 2014 08:13:51 -0700, tim <tim@seemywebsite.com> wrote:

> On Wed, 20 Aug 2014 15:17:10 +1000, Ken Knowles wrote: > >> I have a CD4060 that uses a 32,768Hz crystal to generate a 32Hz square >> wave. >> I would like to divide this down several times in 5.9Hz increments, >> while keeping the duty cycle at 50%. >> >> What would be the most straightforward method, preferably keeping in >> CMOS? > > "Dividing down by 5.9Hz increments" doesn't make sense. What do you > really want? > > I assume that you want a signal with a frequency of n * 5.9Hz, with you > choosing n, and that you want to use the crystal as a frequency > reference. > > Yes? No? >
standard method is to multiply by 59, then divide by 5 and last step divide by 2 to get 50% duty cycle.
George Herold wrote:
> On Wednesday, August 20, 2014 1:17:10 AM UTC-4, Ken Knowles wrote: >> I have a CD4060 that uses a 32,768Hz crystal to generate a 32Hz square >> wave. >> I would like to divide this down several times in 5.9Hz increments, while >> keeping the duty cycle at 50%. >> What would be the most straightforward method, preferably keeping in >> CMOS? >> Ken Knowles
> "get's out calculator.. punch punch.." if you divide 32,768 by 5554 > you get 5.8998... Hz. 5554 is even so reset counter after 2777 and > then a divide by two as the last step to get your square wave. > > George H.
The way I read his requirement is to start with 32,768 Hz, and do some logic to get outputs at 32,762.1 Hz, another at 32,756.2 Hz, another at 32,750.3 Hz, etc., etc., etc. Seems that a microprocessor would be the best solution. Start with 32,768 Hz, multiply it up by some factor, then use a software counter to click off the outputs. Clarification, Ken??? How many outputs are you after, and what are the specific frequencies? Dave M
On Wed, 20 Aug 2014 08:21:11 -0700, RobertMacy wrote:

> On Wed, 20 Aug 2014 08:13:51 -0700, tim <tim@seemywebsite.com> wrote: > >> On Wed, 20 Aug 2014 15:17:10 +1000, Ken Knowles wrote: >> >>> I have a CD4060 that uses a 32,768Hz crystal to generate a 32Hz square >>> wave. >>> I would like to divide this down several times in 5.9Hz increments, >>> while keeping the duty cycle at 50%. >>> >>> What would be the most straightforward method, preferably keeping in >>> CMOS? >> >> "Dividing down by 5.9Hz increments" doesn't make sense. What do you >> really want? >> >> I assume that you want a signal with a frequency of n * 5.9Hz, with you >> choosing n, and that you want to use the crystal as a frequency >> reference. >> >> Yes? No? >> >> > standard method is to multiply by 59, then divide by 5 and last step > divide by 2 to get 50% duty cycle.
He says steps of 5.9Hz, not divisions ratios of 5.9, 11.8, ... But yes, as soon as he tells us what he _really_ wants, I'm sure that we can help him. -- Tim Wescott Wescott Design Services http://www.wescottdesign.com
Tim Wescott wrote:
> > On Wed, 20 Aug 2014 08:21:11 -0700, RobertMacy wrote: > > > On Wed, 20 Aug 2014 08:13:51 -0700, tim <tim@seemywebsite.com> wrote: > > > >> On Wed, 20 Aug 2014 15:17:10 +1000, Ken Knowles wrote: > >> > >>> I have a CD4060 that uses a 32,768Hz crystal to generate a 32Hz square > >>> wave. > >>> I would like to divide this down several times in 5.9Hz increments, > >>> while keeping the duty cycle at 50%. > >>> > >>> What would be the most straightforward method, preferably keeping in > >>> CMOS? > >> > >> "Dividing down by 5.9Hz increments" doesn't make sense. What do you > >> really want? > >> > >> I assume that you want a signal with a frequency of n * 5.9Hz, with you > >> choosing n, and that you want to use the crystal as a frequency > >> reference. > >> > >> Yes? No? > >> > >> > > standard method is to multiply by 59, then divide by 5 and last step > > divide by 2 to get 50% duty cycle. > > He says steps of 5.9Hz, not divisions ratios of 5.9, 11.8, ... > > But yes, as soon as he tells us what he _really_ wants, I'm sure that we > can help him.
DDS. :) -- Anyone wanting to run for any political office in the US should have to have a DD214, and a honorable discharge.
On 20 Aug 2014 08:51:01 GMT, "Peter Heitzer"
<peter.heitzer@rz.uni-regensburg.de> wrote:

>Ken Knowles <kknowles@endor.com> wrote: > >>I have a CD4060 that uses a 32,768Hz crystal to generate a 32Hz square >>wave. > >>I would like to divide this down several times in 5.9Hz increments, >>while keeping the duty cycle at 50%. > >>What would be the most straightforward method, preferably keeping in >>CMOS? >Using a &#4294967295;C. 32 kHz are rather low, so a &#4294967295;C could do the task even >in software using "bit bang" method.
I am sorry my orignal explanation was unclear to some readers. It is easy to generate 32Hz with a 32,768 clock crystal and a CD4060. I then would like to produce from this four or five frequencies that all differ by the same number of Hz. To take a simple example, if that was 4Hz I would get 28, 24, 20, 16Hz, and so on. Since coding is not one of my skills, can this be done with logic IC's? Maybe something involving sums and differences. I could also use a separate generator for each frequency, but was hoping for a more efficient method, if there is one. Ken Knowles