GaN With the Wind

mandag den 22. juni 2020 kl. 19.34.21 UTC+2 skrev Jeroen Belleman:
> On 2020-06-22 17:51, jlarkin@highlandsniptechnology.com wrote:
> >[...]
> > I wasn't happy with my PCBWAY board. Resolution and registration were
> > bad, and they didn't read my stackup specs. Their default 4-layer
> > stack has *four mils* of dielectric between layers 1 and 2, and
> > between 3 and 4. That is really nasty. That stack is common in cheap
> > chinese proto houses.
> 
> That's nasty indeed. Who'd use a stackup like that?

people that want 100R differential for e.g. LVDS with a track width that 
works with BGA 

Am 22.06.20 um 19:34 schrieb Jeroen Belleman:
> On 2020-06-22 17:51, jlarkin@highlandsniptechnology.com wrote:
>> [...]
>> I wasn't happy with my PCBWAY board. Resolution and registration were
>> bad, and they didn't read my stackup specs. Their default 4-layer
>> stack has *four mils* of dielectric between layers 1 and 2, and
>> between 3 and 4. That is really nasty. That stack is common in cheap
>> chinese proto houses.
> 
> That's nasty indeed. Who'd use a stackup like that?
> 
> Jeroen Belleman

Someone who wants narrow microstrips on the top level?

In fact, I'm just asking a local board maker for sth. similar,
with the middle of the stack made from thick FR4 for stability
and on the outside thin Rogers 4003 or whatever for thin micro-
strips and low radiation loss at 10 GHz.

It looks like the eval board of the ADF5356 has a similar stack,
just from visually inspecting the milled sides.

Up to now I had no single problem with PCBWAY other than that they
use DHL express which leads to some fee f*cking here in .de and
constant trouble with the customs in Leipzig.
I did not let them make multilayers up to now.

I made a test run with JLCPCB, they have now a proxy man here
in .de. That adds theoretically 2 days or so, but the proxy
handles the customs which may result in an speedup over all.
The proxy gets a pack with the daily production for the EU and
relays it per local mail with a new tracking number.

It is now technically an inland buy, they collect the local VAT
in advance. Works nicely.

Gerhard

On Sunday, June 21, 2020 at 11:50:17 PM UTC-4, George Herold wrote:
> On Sunday, June 21, 2020 at 9:58:56 PM UTC-4, dagmarg...@yahoo.com wrote:
> > On Sunday, June 21, 2020 at 9:28:28 PM UTC-4, George Herold wrote:
> > > On Sunday, June 21, 2020 at 7:32:35 PM UTC-4, dagmarg...@yahoo.com wrote:
> > > > As I design yet another little switcher, I notice it's getting
> > > > more and more tempting to swap ye olde MOS FET for a shiny
> > > > new GaN-speck.
> > > > 
> > > > Electrically superior in almost every respect, the GaN FETs'
> > > > drawbacks are thermal (not a problem in this case), and their
> > > > tee-nine-sie .9x.9mm bare-chip packages.
> > > > 
> > > > e.g.
> > > >   T.I. CSD19831Q3: 100V, Rds(on)=50mohm, Cin=350pF, Coss=70pF, Crss=13pF
> > > >   EPC EPC2036: 100V, Rds(on)~=60mohm, Cin=43pF, Coss=25pF, Crss<1pF
> > > > 
> > > > I re-worked a chip-scale part with hot air and a hot plate by hand.
> > > > Took me a zillion tries to get it done--that was a nuisance.
> > > I assume you have a good microscope/ viewer.  
> > > Is the problem needing tiny tools/ manipulators?  
> > > 
> > > George H. 
> > 
> > I don't have a microscope & haven't needed one. I just did it
> > caveman-style. (Are we still allowed to say 'caveman'?)
> Oh!  James on someones advice here, I bought a ~$70 dollar 
> chinese 'viewer'  single fairly long range microscope 
> and lcd view screen above.  I tried some fine (for me)
> soldering with blue wire wrap wire (30 mil?) 
> Anyway it's totally worth it. 
> At maximum focus there's about a 1" working distance. 
> (max focus is reported to be x1k... I measured around 
> that (with big error bars.. too lazy to get calipers 
> from shop.)  I'll have to look back to find the 
> brand name if you have interest.    
> I only says 'microscope' on the outside and when I turn it on. 
> (I can give you the version number :^)
> 
> George H. 
> 
> If I search SED for tardigrade, I can probably find it. 

I know microscopes are helpful and good, but this isn't something
have ever done, do, or ever will do on a regular basis.  I've done
it exactly once.

So I used an electric fryer pan for the pre-heat and a $35 eBay
hot air station (it's very good, actually), tinned the pads with
good 'ol leaded wire solder, then dabbed some liquid flux-specks
on top.  How does one mount one's microscope on an electric
frying pan?

Sure, I could've ordered all the orthodox supplies, waited, then
used them, once.  But it was faster just to blast ahead with what
I had on hand.

Cheers,
James Arthur

On Monday, June 22, 2020 at 1:34:21 PM UTC-4, Jeroen Belleman wrote:
> On 2020-06-22 17:51, jlarkin@highlandsniptechnology.com wrote:
> >[...]
> > I wasn't happy with my PCBWAY board. Resolution and registration were
> > bad, and they didn't read my stackup specs. Their default 4-layer
> > stack has *four mils* of dielectric between layers 1 and 2, and
> > between 3 and 4. That is really nasty. That stack is common in cheap
> > chinese proto houses.
> 
> That's nasty indeed. Who'd use a stackup like that?
> 
> Jeroen Belleman

I might!  Just two days ago I was calculating how much capacitance I
could squeeze out of a PCB pour. Consulting my calculator, 0,1mm spacing
and 5 x 5cm gets me 97nF with just 100 layers' stackup :)

Cheers,
James Arthur

On Monday, June 22, 2020 at 4:12:35 AM UTC-4, Gerhard Hoffmann wrote:
> Am 22.06.20 um 01:32 schrieb dagmargoodboat@yahoo.com:
> > As I design yet another little switcher, I notice it's getting
> > more and more tempting to swap ye olde MOS FET for a shiny
> > new GaN-speck.
> > 
> > Electrically superior in almost every respect, the GaN FETs'
> > drawbacks are thermal (not a problem in this case), and their
> > tee-nine-sie .9x.9mm bare-chip packages.
> > 
> > e.g.
> >    T.I. CSD19831Q3: 100V, Rds(on)=50mohm, Cin=350pF, Coss=70pF, Crss=13pF
> >    EPC EPC2036: 100V, Rds(on)~=60mohm, Cin=43pF, Coss=25pF, Crss<1pF
> > 
> > I re-worked a chip-scale part with hot air and a hot plate by hand.
> > Took me a zillion tries to get it done--that was a nuisance.
> 
> 
> I was more lucky. My first 2 tries worked immediately with just a
> little bit of hot air. Very little, or they fly away.
> That was a test structure from a corner of a larger board made
> by PCBWAY. HAL, I removed the excess tin with some unsolder braid
> and used paste then.
> PCBWAY spotted the mask on the pad as designed by EPC's Altium example.
> Worked after declaring it OK.
> 
> 
> < 
> https://www.flickr.com/photos/137684711@N07/50032925082/in/dateposted-public/ 
>    >
> between the 4 1210 caps and the 2 fat vias.
> 
> 
> cheers, Gerhard

That's a nice picture.

Paste would've helped my misadventure quite a lot.

One of the most annoying problems was that I was hand-applying
solder to the board's pads, then adding liquid flux, before
stacking the die on top. But it's quite impossible to tin precisely
equally-tall bumps onto those tiny pads at these scales, so when you'd
go to place the die on top, the uneven bumps would hold the die at
a slanted angle, ready to fall off, slide sideways, or blow away in
the hot air.

Any number of times instead of being drawn into self-alignment by
the reflow surface tension, the part was pulled off-alignment to a
position shorting the pads, instead.

(On the plus side, the uneven bumps made it easy to see when the
solder had successfully melted.)

If I'm going to be prototyping with these nifty GaN FETs I may have
to cave and get the "real" supplies. But it's super wasteful, since
doing this once a year, they'd go bad each time before I'd use them
again.


Cheers,
James Arthur

  > How does one mount one's microscope on an electric frying pan?
 
> Cheers,
> James Arthur

https://images-na.ssl-images-amazon.com/images/I/618WU1G-jQL._SL1500_.jpg
Use an expensive offset microscope mount, 

or be lucky to find something in surplus , 
modify it and add an LED ring lamp.  

Surgeons might use head-mounted arrangement with probe+cam+viewer or a heads up display.

With 10x view it becomes 10x easier but you need even more light due to lens loss.

So you did well on your own.

On Mon, 22 Jun 2020 11:36:16 -0700 (PDT), dagmargoodboat@yahoo.com
wrote:

>On Sunday, June 21, 2020 at 11:50:17 PM UTC-4, George Herold wrote:
>> On Sunday, June 21, 2020 at 9:58:56 PM UTC-4, dagmarg...@yahoo.com wrote:
>> > On Sunday, June 21, 2020 at 9:28:28 PM UTC-4, George Herold wrote:
>> > > On Sunday, June 21, 2020 at 7:32:35 PM UTC-4, dagmarg...@yahoo.com wrote:
>> > > > As I design yet another little switcher, I notice it's getting
>> > > > more and more tempting to swap ye olde MOS FET for a shiny
>> > > > new GaN-speck.
>> > > > 
>> > > > Electrically superior in almost every respect, the GaN FETs'
>> > > > drawbacks are thermal (not a problem in this case), and their
>> > > > tee-nine-sie .9x.9mm bare-chip packages.
>> > > > 
>> > > > e.g.
>> > > >   T.I. CSD19831Q3: 100V, Rds(on)=50mohm, Cin=350pF, Coss=70pF, Crss=13pF
>> > > >   EPC EPC2036: 100V, Rds(on)~=60mohm, Cin=43pF, Coss=25pF, Crss<1pF
>> > > > 
>> > > > I re-worked a chip-scale part with hot air and a hot plate by hand.
>> > > > Took me a zillion tries to get it done--that was a nuisance.
>> > > I assume you have a good microscope/ viewer.  
>> > > Is the problem needing tiny tools/ manipulators?  
>> > > 
>> > > George H. 
>> > 
>> > I don't have a microscope & haven't needed one. I just did it
>> > caveman-style. (Are we still allowed to say 'caveman'?)
>> Oh!  James on someones advice here, I bought a ~$70 dollar 
>> chinese 'viewer'  single fairly long range microscope 
>> and lcd view screen above.  I tried some fine (for me)
>> soldering with blue wire wrap wire (30 mil?) 
>> Anyway it's totally worth it. 
>> At maximum focus there's about a 1" working distance. 
>> (max focus is reported to be x1k... I measured around 
>> that (with big error bars.. too lazy to get calipers 
>> from shop.)  I'll have to look back to find the 
>> brand name if you have interest.    
>> I only says 'microscope' on the outside and when I turn it on. 
>> (I can give you the version number :^)
>> 
>> George H. 
>> 
>> If I search SED for tardigrade, I can probably find it. 
>
>I know microscopes are helpful and good, but this isn't something
>have ever done, do, or ever will do on a regular basis.  I've done
>it exactly once.

My Mantis is one of my favorite things. Makes me feel like an eagle
flying all over, looking for mice or whatever.




>
>So I used an electric fryer pan for the pre-heat and a $35 eBay
>hot air station (it's very good, actually), tinned the pads with
>good 'ol leaded wire solder, then dabbed some liquid flux-specks
>on top.  How does one mount one's microscope on an electric
>frying pan?

The Mantis can do things like that. I use it to peep at tiny parts on
a board, still in a rackmount box. It's great for avoiding probe slips
too.

https://www.dropbox.com/s/jsjkdjs9jw742ea/Bench_Mantis.jpg?raw=1

-- 

John Larkin         Highland Technology, Inc
picosecond timing   precision measurement 

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com

On Mon, 22 Jun 2020 11:54:30 -0700 (PDT), dagmargoodboat@yahoo.com
wrote:

>On Monday, June 22, 2020 at 1:34:21 PM UTC-4, Jeroen Belleman wrote:
>> On 2020-06-22 17:51, jlarkin@highlandsniptechnology.com wrote:
>> >[...]
>> > I wasn't happy with my PCBWAY board. Resolution and registration were
>> > bad, and they didn't read my stackup specs. Their default 4-layer
>> > stack has *four mils* of dielectric between layers 1 and 2, and
>> > between 3 and 4. That is really nasty. That stack is common in cheap
>> > chinese proto houses.
>> 
>> That's nasty indeed. Who'd use a stackup like that?
>> 
>> Jeroen Belleman
>
>I might!  Just two days ago I was calculating how much capacitance I
>could squeeze out of a PCB pour. Consulting my calculator, 0,1mm spacing
>and 5 x 5cm gets me 97nF with just 100 layers' stackup :)
>
>Cheers,
>James Arthur

Figure a tempco ballpark +900 PPM. And a lot of nasty DA.



-- 

John Larkin         Highland Technology, Inc
picosecond timing   precision measurement 

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com

On Mon, 22 Jun 2020 12:05:51 -0700 (PDT), dagmargoodboat@yahoo.com
wrote:

>On Monday, June 22, 2020 at 4:12:35 AM UTC-4, Gerhard Hoffmann wrote:
>> Am 22.06.20 um 01:32 schrieb dagmargoodboat@yahoo.com:
>> > As I design yet another little switcher, I notice it's getting
>> > more and more tempting to swap ye olde MOS FET for a shiny
>> > new GaN-speck.
>> > 
>> > Electrically superior in almost every respect, the GaN FETs'
>> > drawbacks are thermal (not a problem in this case), and their
>> > tee-nine-sie .9x.9mm bare-chip packages.
>> > 
>> > e.g.
>> >    T.I. CSD19831Q3: 100V, Rds(on)=50mohm, Cin=350pF, Coss=70pF, Crss=13pF
>> >    EPC EPC2036: 100V, Rds(on)~=60mohm, Cin=43pF, Coss=25pF, Crss<1pF
>> > 
>> > I re-worked a chip-scale part with hot air and a hot plate by hand.
>> > Took me a zillion tries to get it done--that was a nuisance.
>> 
>> 
>> I was more lucky. My first 2 tries worked immediately with just a
>> little bit of hot air. Very little, or they fly away.
>> That was a test structure from a corner of a larger board made
>> by PCBWAY. HAL, I removed the excess tin with some unsolder braid
>> and used paste then.
>> PCBWAY spotted the mask on the pad as designed by EPC's Altium example.
>> Worked after declaring it OK.
>> 
>> 
>> < 
>> https://www.flickr.com/photos/137684711@N07/50032925082/in/dateposted-public/ 
>>    >
>> between the 4 1210 caps and the 2 fat vias.
>> 
>> 
>> cheers, Gerhard
>
>That's a nice picture.
>
>Paste would've helped my misadventure quite a lot.
>
>One of the most annoying problems was that I was hand-applying
>solder to the board's pads, then adding liquid flux, before
>stacking the die on top. But it's quite impossible to tin precisely
>equally-tall bumps onto those tiny pads at these scales, so when you'd
>go to place the die on top, the uneven bumps would hold the die at
>a slanted angle, ready to fall off, slide sideways, or blow away in
>the hot air.
>
>Any number of times instead of being drawn into self-alignment by
>the reflow surface tension, the part was pulled off-alignment to a
>position shorting the pads, instead.
>
>(On the plus side, the uneven bumps made it easy to see when the
>solder had successfully melted.)
>
>If I'm going to be prototyping with these nifty GaN FETs I may have
>to cave and get the "real" supplies. But it's super wasteful, since
>doing this once a year, they'd go bad each time before I'd use them
>again.
>
>
>Cheers,
>James Arthur

We made our own eval boards to test the parts. It's amazing that EPC
doesn't.

-- 

John Larkin         Highland Technology, Inc
picosecond timing   precision measurement 

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com

On Monday, June 22, 2020 at 3:31:29 PM UTC-4, John Larkin wrote:
> On Mon, 22 Jun 2020 11:54:30 -0700 (PDT), dagmargoodboat@yahoo.com
> wrote:
> 
> >On Monday, June 22, 2020 at 1:34:21 PM UTC-4, Jeroen Belleman wrote:
> >> On 2020-06-22 17:51, jlarkin@highlandsniptechnology.com wrote:
> >> >[...]
> >> > I wasn't happy with my PCBWAY board. Resolution and registration were
> >> > bad, and they didn't read my stackup specs. Their default 4-layer
> >> > stack has *four mils* of dielectric between layers 1 and 2, and
> >> > between 3 and 4. That is really nasty. That stack is common in cheap
> >> > chinese proto houses.
> >> 
> >> That's nasty indeed. Who'd use a stackup like that?
> >> 
> >> Jeroen Belleman
> >
> >I might!  Just two days ago I was calculating how much capacitance I
> >could squeeze out of a PCB pour. Consulting my calculator, 0,1mm spacing
> >and 5 x 5cm gets me 97nF with just 100 layers' stackup :)
> >
> >Cheers,
> >James Arthur
> 
> Figure a tempco ballpark +900 PPM. And a lot of nasty DA.

I need amps at kV in <1 ns, that's the appeal.  I like the
DA -- DA = damping, which is a plus.  But the '100 layers'
part is admittedly, <cough>, a slight inconvenience.

Grins,
James