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How to determine Zin, Yout for RF transistor, from A parameters

Started by Unknown May 6, 2017
On Thu, 11 May 2017 20:18:31 +0100, "Kevin Aylward"
<kevinRemovAT@kevinaylward.co.uk> wrote:

>"Jim Thompson" wrote in message >news:iva9hc5t59m8qfo3medh69t0e8e01a08it@4ax.com... > >On Thu, 11 May 2017 19:05:06 +0100, "Kevin Aylward" ><kevinRemovAT@kevinaylward.co.uk> wrote: > >>>"Jan Panteltje" wrote in message news:oerq1e$1lvb$1@gioia.aioe.org... >> >>>On a sunny day (Mon, 8 May 2017 20:45:18 +0100) it happened "Kevin >>>Aylward" >>><kevinRemovAT@kevinaylward.co.uk> wrote in >>><7cOdnYebo-VSV43EnZ2dnUU7-fvNnZ2d@giganews.com>: > >[snip] >> >>>There are systematic ways to design by simulation by varying components. >> >>>>I presume you mean Monte Carlo or something. >> >>>Actually no. Monte Carlo is useful for severeal things, but in general, >>>its >>>not a main driver. Most ic blocks do not require MC at all. The most >>>important design process is worst case WC >> >>>http://www.anasoft.co.uk/worstcase.htm >> >>>and multivariable parameter sweeps. >> >>>As an example. Suppose its an LDO. One needs to theoretically know where >>>to >>>put compensation networks, and an understanding of how the poles and >>>zeros >>>should be placed. >> >>>Say, there are 3 comp caps and two comp resistors, and the load cap is to >>>be >>>10n to 10uf at load currents from zero to 1A. >> >>One sets up parameter sweeps to vary these components in a systematic way >>whilst outputting at loop gain and phase margins. This is all done all over >>again using transient runs. This is done while also examining the results >>over process corners and temperature. >> >>>That is for stability. Other issues are PSRR. This requires technical >>>knowledge of what determines PSRR. Its usually a rock and a hard place. >>>Getting the right device sizes and operating voltages, so devices don't >>>crush, are not too large, etc... >> >>>Typically it takes 10,000s of runs to converge to an acceptable solution. >>>There is still an art in it in choosing the best runs though. Grads and >>>the >>>majority that gain 1 year of experience 20 times over, typically take 3 >>>months for such a task, those like me and Jim T, might take a day or so, >>>depending on spec. >> > >[snip] > >>My typical TOTAL design time for a relatively complex >>Analog/Mixed-Signal chip is only 3-4 months, including interim and >>final design reviews... all by my lonesome, except for my layout >>associate. > >It is interesting that most hirers simply don't understand that there are >those that are 10+ times as productive as others.
Oh, they understand that. They have no idea how to deal with it though.
> >I would say I average out at 100 blocks, 50 transistors per block, per year. >I would say most do about 4-5, if that, and those still have problems and >re-spins. > >Some blocks might take me an hour or so. > >>Some un-named "teams" take longer than that cutting and pasting from >>existing IP and text-book "solutions"... AND have a high rate of >>"re-spins" >:-} > >Yeah... Have a look at my linked in profile :-) > > >-- Kevin Aylward >http://www.anasoft.co.uk - SuperSpice >http://www.kevinaylward.co.uk/ee/index.html
"Jan Panteltje"  wrote in message news:of2bko$15fm$1@gioia.aioe.org...


>>It is in our genes to tinker... > >The route explanation of all of this, is random. Once one really thinks >about the problem, there is only one rational solution. Essentially, an >infinite number of universes each with different laws of physics, we just >happen to be in one where the laws allow us to exist.
>Na, I could follow you for most parts up to here. >But the infinite universes thingy does not jive with me. >Apart from the fact that if one says 'Universe' everybody has his / her own >ideas... >I do not think the laws of physics are that different..
You would be incorrect. My arguments are here: http://www.kevinaylward.co.uk/qm/sfn.html http://www.kevinaylward.co.uk/qm/universal_existence.html http://www.kevinaylward.co.uk/qm/anthropic_physics.html -- Kevin Aylward http://www.anasoft.co.uk - SuperSpice http://www.kevinaylward.co.uk/ee/index.html
On a sunny day (Fri, 12 May 2017 13:52:51 +0100) it happened "Kevin Aylward"
<kevinRemovAT@kevinaylward.co.uk> wrote in
<iaCdndWqTIS-LYjEnZ2dnUU7-KnNnZ2d@giganews.com>:

>"Jan Panteltje" wrote in message news:of2bko$15fm$1@gioia.aioe.org... > > >>>It is in our genes to tinker... >> >>The route explanation of all of this, is random. Once one really thinks >>about the problem, there is only one rational solution. Essentially, an >>infinite number of universes each with different laws of physics, we just >>happen to be in one where the laws allow us to exist. > >>Na, I could follow you for most parts up to here. >>But the infinite universes thingy does not jive with me. >>Apart from the fact that if one says 'Universe' everybody has his / her own >>ideas... >>I do not think the laws of physics are that different.. > >You would be incorrect. > >My arguments are here: > >http://www.kevinaylward.co.uk/qm/sfn.html
Introduction, time <quote> Time is simply the observation that objects have changed their position relatively to other objects.</quote> agreed. Something From Nothing I think you are twisting reality here a bit (or a lot). What we call 'law of physics' is simply our observations reduced to a mathematical model. Indeed it requires, 'us' and the 'world around us' to exist. A little sidestep 'gedanken experiment' something from nothing is strongly related to QM, randomness, probabilities (electron is here or there but we know not... cannot measure both ... blah blah) I do not like QM, it is like epicycles. There are other theories, I am with De Broglie's 'Pilot Wave Theory', https://en.wikipedia.org/wiki/Pilot_wave the decisions made in the Copenhagen conference (Copenhagen interpretation) about among other things that dead / alive cat etc is mere bogus. I think that guy went into that park in Copenhagen (have you ever been there?) and in those days LSD was really the thing to try there, and that is how QM won in that conference. I was there for an other conference, but that is an other story, had a hour to look around that town and found that park, it had a sign now, 'do not enter' or something, so .. Fundamental Axioms Of Physics If you assume the space is empty, then nothing will randomly manifest. Einstein did away with a medium for EM (light) and put whatever there was under the carpet making it look clean, same for his mathematical model for gravity. OF COURSE there is something that allows all those things. 'Virtual particles popping in and out of existence' is often quoted but simply not good enough. Big And Micro Bangs Well first I must admit that I am not even sure there was a big bang, that theory has caused many observational problems, and still does so to this day. The previous Pope told Hawkins 'it would be good if there was a bang, as that would explain everything'. I have no idea what he meant by 'everything', and he stepped down anyways... :-) Beware of singularities and other mathematical traps. Let's take a simple example. Some guy long ago found, by observation, I = U / R. Not knowing about electrons he could easily assume that _infinite_ current would flow in a zero resistance object, he would also state that in a vacuum nothing could flow. Things changed a bit when teh first vacuum diode was demonstrated... when it was found that current was granular, and the equation breaks down at one electron at the time. MANY mathematicians like to go for the incomplete formulas, and they LOVE the infinities that come with it. Make press, people say: 'Oh it must be right, the math proves it.' And an other wormhole is created. Epicycles. I will comment on the rest below later, after reading.
>http://www.kevinaylward.co.uk/qm/universal_existence.html
>http://www.kevinaylward.co.uk/qm/anthropic_physics.html > >-- Kevin Aylward >http://www.anasoft.co.uk - SuperSpice >http://www.kevinaylward.co.uk/ee/index.html > >
On a sunny day (Fri, 12 May 2017 13:52:51 +0100) it happened "Kevin Aylward"
<kevinRemovAT@kevinaylward.co.uk> wrote in
<iaCdndWqTIS-LYjEnZ2dnUU7-KnNnZ2d@giganews.com>:


>http://www.kevinaylward.co.uk/qm/universal_existence.html >http://www.kevinaylward.co.uk/qm/anthropic_physics.html
From a POV of whatsit the random movements of signals in the brain, in the human being, sometimes referred to as 'humming bean' try to make a model of the reality it observes. Consciousness in that sense is just one part of it measuring(..) the other few neurons activity, and it has some output that emits: theory, opinion, anything. It is easy to write a computer program that is conscious, the simplest thing I always mention is a sun-screen with photocell, it opens in the dark and closes in light, a simple control loop, just like our own eye pupil. Add 10 lines or less code to measure the control signal and say 'it is dark it is light', and there you are, it is conscious. A doctor will check the eye reflex to see if you are conscious. I do not see any mystery there at all. But it makes great stuff for those who know nothing about tronix, like whatshisname 'I think so I am', How profound.. So to the 'opinions' 'theories' 'world view' etc etc many possibilities exist. In a (computer simulation) neural net instability can also exist, and the endless motion can be if a larger net, as a _hopefully_ converging activity to a balance, a weights and connections configuration that we then can call our 'current understanding' That is due to change as the net (we) are exposed to continuous inputs. From that POV our theories are worth just exactly that much. We need the models we create in our brain to exist in this world. From catching a ball to driving a car or designing some tools, or using those (evolution had it that way). Purely from that point we need no math. Math is designed by us as a side product that can help us, but just like we invented knives it can hurt us too, lead us astray. Always and always we should verify our theories with observation. String theory does not allow us to do that, so until it can it is just a useless pattern, say noise, in the neural fireworks. No better than saying Elvis is alive and anything can be explained by that, just assign enough power to him. :-) Think I had nuf of this for 2daaai ;-)
wrote in message news:cqk9hc5aljetdp86ej6t50ho575bvjbr8d@4ax.com...

On Thu, 11 May 2017 19:04:06 +0100, "Kevin Aylward"
<kevinRemovAT@kevinaylward.co.uk> wrote:

>wrote in message news:e633hcttjkngghqdp9jp9j1kqued9fcj9f@4ax.com... > >On Mon, 8 May 2017 20:44:24 +0100, "Kevin Aylward" ><kevinRemovAT@kevinaylward.co.uk> wrote: > >>"Jan Panteltje" wrote in message news:oeo0db$vsh$1@news.datemas.de... >> >>On a sunny day (Sun, 7 May 2017 20:55:15 +0100) it happened "Kevin >>Aylward" >><kevinRemovAT@kevinaylward.co.uk> wrote in >><BIqdnXfG6Yo55pLEnZ2dnUU7-UPNnZ2d@giganews.com>: > > >>>>However, I do have an OCXO asic in production that runs up to 100MHz, >>>>has >>>>a >>>>few ppb stability, and flat band phase noise approaching -165db, in a >>>>very >>>>small package. >> >>>>Very impressive,. -165 dB wonder how you measure that. >> >>>Should have said dBc, but I guess you knowing all about oscillators, >>>would >>>know the standard terminology. >> >>>I should expand on this. This is the noise after the limiter/squarer. Raw >>>oscillator designs can be -190dBc to -180dBc. A key point is that this is >>>with an internal 2.5V supply, in a package of 7mmx5mm. Any mere mortal >>>can >>>get that sort of performance in a 1" square with 12V. > >>>At what offset from carrier are those figures measured ? > > >>I did said flatband. For oscillators in the 10MHz to 50MHz range, this is >>of >>the order of 100Khz+ offset. This is range where xtals work best.
>Such huge offsets are of interest mainly with half-duplex repeaters.
>Commercial half-duplex repeater stations usually work with several MHz >duplex intervals. However amateur radio repeaters usually work with >only 100 kHz @29 MHz and 600 kHz @51 and 145 MHz bands.
High speed, ADCs, care about the whole whole flatband range to minimise jitter. There is a standard telecom spec of 12kHz to 20 Mhz integration for jitter...
>>>Since we are measuring noise, density, what is the measurement >>>bandwidth, ? 1 Hz? > >>Its always 1Hz BW
>So did I assume, but you never know, which tricks specification >writers use these days :-)
Yes. The whole electronics industry is full of lies er.. creative specmanship.
>>Apparently the carrier power is something like +15 dBm, going -190 dB >>down from that would be -175 dBm. > >>PN is always specified relative to carrier in dBc. The actual >>power/voltage >>is a separate spec. > >>If noise in dB is written, it means dBc.
>For practical purposes, the interesting offset is when the oscillator >phase noise is drowned by the thermal noise and for LF/MF/HF/VHF >receivers, when it drops below the band noise.
>For this reason, you really need significant power levels in order to >stay away from the thermal noise floor. For low power designs, the >maximum dBc figures are simply limited by the thermal noise.
Power is the main concern. Many would like 1 ma for a whole oscillator system. A decent limiter needs several ma on its own. If there are bipolars in the design, it may well be that shot noise is a main contributor.
>>The _input_ related thermal noise _density_ for a good amplifier is >>about -174 dBm/Hz, the _output_ related thermal noise density has been >>amplified by the power gain. For oscillators, the noise floor is often >>worse. > >Note we are talking about phase noise, not amplitude or additive noise. >Oscillators can get very good flat band phase noise, but the majority of >systems require a square wave. The limiter always dominates flatband noise.
>I assume that by flatband noise you are referring to the thermal noise >floor ?
Its the the bit where the noise stops rolling off with frequency and becomes flat with frequency. -- Kevin Aylward http://www.anasoft.co.uk - SuperSpice http://www.kevinaylward.co.uk/ee/index.html
On 07/05/2017 22:05, Jim Thompson wrote:
> On Sun, 07 May 2017 21:04:14 +0100, JM <dontreplytothis173@gmail.com> > wrote: > >> On 07/05/2017 20:52, Kevin Aylward wrote: >>> Analog ones are more challenging, but essentially, the chief reason, >> >> And oranges are much better than apples. >> >> >> > > So edifying >:-} > > ...Jim Thompson >
I was responding to Kevin. I agree with most of what he says, but I don't think you can claim that analogue asic's are more (or less) challenging that digital ones. (Although for complex devices they are no longer purely analogue or digital, and it looks like the relative analogue silicon area as a percentage of the die of a majority of complex devices is continuing to increase.) I can see problems ahead since the current analogue design tools are beginning to struggle. Analogue artist is not exactly a quantum leap from Harris's SLICE of 30 odd years ago.
On 05/08/2017 08:16 PM, Tim Williams wrote:
> <krw@notreal.com> wrote in message > news:0ir1hc9u0geib5titupvcfg9a10qvfadqi@4ax.com... >> Sure. If you aren't doing cutting edge stuff you don't pay cutting >> edge prices. That's a surprise? > > Yes, actually. > > What I don't get: > > How come all that old iron from the 60s and 70s, with big fat huge > micron linewidths, isn't in peoples' garages? It just went straight to > the scrap yard. (Except for the very few legacy lines that are making > stuff like 741s and LM13700s.)
CoolAudio is making THAT2181 quad VCAs again for a buck in quantity, get 'em while they're hot
On Sun, 14 May 2017 16:15:47 +0100, JM <dontreplytothis173@gmail.com>
wrote:

>On 07/05/2017 22:05, Jim Thompson wrote: >> On Sun, 07 May 2017 21:04:14 +0100, JM <dontreplytothis173@gmail.com> >> wrote: >> >>> On 07/05/2017 20:52, Kevin Aylward wrote: >>>> Analog ones are more challenging, but essentially, the chief reason, >>> >>> And oranges are much better than apples. >>> >>> >>> >> >> So edifying >:-} >> >> ...Jim Thompson >> > >I was responding to Kevin. I agree with most of what he says, but I >don't think you can claim that analogue asic's are more (or less) >challenging that digital ones.
Would you care to prove your assertion by examination ?>:-} In today's world, digital _chip_ design is virtually automated, once the logical functionality is established. Unless, of course, you are talking about designing the gates at the device level (then it's analog ;-) I did that once for Motorola/ON-Semi so they could move their entire 74HCxxx line from in-house processing to Chartered Semi's line.
> >(Although for complex devices they are no longer purely analogue or >digital, and it looks like the relative analogue silicon area as a >percentage of the die of a majority of complex devices is continuing to >increase.) > >I can see problems ahead since the current analogue design tools are >beginning to struggle. Analogue artist is not exactly a quantum leap >from Harris's SLICE of 30 odd years ago.
The tool is _not_ the designer. I sketch out most of my designs on paper before entering them into a simulator. ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | STV, Queen Creek, AZ 85142 Skype: skypeanalog | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | Thinking outside the box... producing elegant solutions. "It is not in doing what you like, but in liking what you do that is the secret of happiness." -James Barrie
"JM"  wrote in message news:of9s4r$49p$1@dont-email.me...

On 07/05/2017 22:05, Jim Thompson wrote:
> On Sun, 07 May 2017 21:04:14 +0100, JM <dontreplytothis173@gmail.com> > wrote: > >> On 07/05/2017 20:52, Kevin Aylward wrote: >>> Analog ones are more challenging, but essentially, the chief reason, >> >> And oranges are much better than apples. >> >> >> > > So edifying >:-} > > ...Jim Thompson >
>I was responding to Kevin. I agree with most of what he says, but I don't >think you can claim that analogue asic's are more (or less) challenging >that digital ones.
Oh...? A modern digital asic design is ALL done in, effectively, in software. People just write VHDL or Verilog Code. The tools take the code and generate the layout with a button press. Software is piss easy :-) In Cadence mixed mode, ones sets up a view to the code and runs the code in with the hard part, i.e. the analog -- Kevin Aylward http://www.anasoft.co.uk - SuperSpice http://www.kevinaylward.co.uk/ee/index.html
On Sun, 14 May 2017 09:18:05 -0700, Jim Thompson
<To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote:

>On Sun, 14 May 2017 16:15:47 +0100, JM <dontreplytothis173@gmail.com> >wrote: > >>On 07/05/2017 22:05, Jim Thompson wrote: >>> On Sun, 07 May 2017 21:04:14 +0100, JM <dontreplytothis173@gmail.com> >>> wrote: >>> >>>> On 07/05/2017 20:52, Kevin Aylward wrote: >>>>> Analog ones are more challenging, but essentially, the chief reason, >>>> >>>> And oranges are much better than apples. >>>> >>>> >>>> >>> >>> So edifying >:-} >>> >>> ...Jim Thompson >>> >> >>I was responding to Kevin. I agree with most of what he says, but I >>don't think you can claim that analogue asic's are more (or less) >>challenging that digital ones. > >Would you care to prove your assertion by examination ?>:-} > >In today's world, digital _chip_ design is virtually automated, once >the logical functionality is established.
Spoken like a real ignoramus. That's why there are hundreds of people on the design teams.
>Unless, of course, you are talking about designing the gates at the >device level (then it's analog ;-) I did that once for >Motorola/ON-Semi so they could move their entire 74HCxxx line from >in-house processing to Chartered Semi's line. > >> >>(Although for complex devices they are no longer purely analogue or >>digital, and it looks like the relative analogue silicon area as a >>percentage of the die of a majority of complex devices is continuing to >>increase.) >> >>I can see problems ahead since the current analogue design tools are >>beginning to struggle. Analogue artist is not exactly a quantum leap >>from Harris's SLICE of 30 odd years ago. > >The tool is _not_ the designer. I sketch out most of my designs on >paper before entering them into a simulator. > > ...Jim Thompson