How to determine Zin, Yout for RF transistor, from A parameters

On Sun, 14 May 2017 20:10:17 +0100, "Kevin Aylward"
<kevinRemovAT@kevinaylward.co.uk> wrote:

>"JM"  wrote in message news:of9s4r$49p$1@dont-email.me...
>
>On 07/05/2017 22:05, Jim Thompson wrote:
>> On Sun, 07 May 2017 21:04:14 +0100, JM <dontreplytothis173@gmail.com>
>> wrote:
>>
>>> On 07/05/2017 20:52, Kevin Aylward wrote:
>>>> Analog ones are more challenging,  but essentially, the chief reason,
>>>
>>> And oranges are much better than apples.
>>>
>>>
>>>
>>
>> So edifying >:-}
>>
>>                                          ...Jim Thompson
>>
>
>>I was responding to Kevin.  I agree with most of what he says, but I don't 
>>think you can claim that analogue asic's are more (or less) challenging 
>>that digital ones.
>
>Oh...?
>
>A modern  digital asic design is ALL done in, effectively, in software. 
>People just write VHDL or Verilog Code. The tools take the code and generate 
>the layout with a button press.

Parts.  the rest may be full custom.  
>
>Software is piss easy :-)

Understanding the requirements document isn't.
>
>In Cadence mixed mode, ones sets up a view to the code and runs the code in 
>with the hard part, i.e. the analog

Well, yes, trivial logic is, well, trivial.

On Mon, 8 May 2017 19:16:04 -0500, "Tim Williams"
<tiwill@seventransistorlabs.com> wrote:

><krw@notreal.com> wrote in message 
>news:0ir1hc9u0geib5titupvcfg9a10qvfadqi@4ax.com...
>> Sure.  If you aren't doing cutting edge stuff you don't pay cutting
>> edge prices.  That's a surprise?
>
>Yes, actually.
>
>What I don't get:
>
>How come all that old iron from the 60s and 70s, with big fat huge micron 
>linewidths, isn't in peoples' garages?  It just went straight to the scrap 
>yard.  (Except for the very few legacy lines that are making stuff like 741s 
>and LM13700s.)

Because, as I said, you couldn't afford to run it if it were given to
you.

>Another perspective:
>PCBs are hobbyist/maker friendly.  Get a dozen little boards for about as 
>many bucks.
>
>Cheap PCBs have shitty specs, but they usually still meet IPC minimums (7/7 
>mils), and that's good enough for most SMT, and more than enough for any 
>THT.

and your point is?

>You can get much finer spec PCBs, just as easily -- if more expensive.  The 
>scaling of that expense seems to be maybe quadratic (3 times finer pitch --> 
>10 times cost), still depending on quantity of course.

and your point is?

>But it's not like it's going to break your whole business model if you're 
>building a device in your garage.
>
>As soon as you put stuff on a wafer, it's suddenly a big deal, say with 
>COMSIS and all that.  Big fab stuff.  Big bucks.  Big lead times.  Where's 
>the guy with the garage fab spinning protos in a couple days?

Big fab stuff doesn't cost small potatoes.  Sorry.