Folks, Got a Silicon Labs 8051Fxxx with 5V-tolerant ports. In the abs max it says 5.8V is the limit. Well, if one uses the typical diode against the 5V rail it could go slightly above 6V in case of a really big jolt. Since this 8051 does not have a 5V supply but just VDD (which hangs on 3.3V in this case) there can't be any parasitic substrate diodes dumping into a rail. Does anyone know the innards? Poly resistors? As usual, the datasheet is silent about this. -- Regards, Joerg http://www.analogconsultants.com/
8051F020 series, 5V tolerant input schematic?
Started by ●June 25, 2013
Reply by ●June 25, 20132013-06-25
On Tuesday, June 25, 2013 8:02:06 PM UTC+2, Joerg wrote:> Folks, > > > > Got a Silicon Labs 8051Fxxx with 5V-tolerant ports. In the abs max it > > says 5.8V is the limit. Well, if one uses the typical diode against the > > 5V rail it could go slightly above 6V in case of a really big jolt. > > Since this 8051 does not have a 5V supply but just VDD (which hangs on > > 3.3V in this case) there can't be any parasitic substrate diodes dumping > > into a rail. > > > > Does anyone know the innards? Poly resistors? As usual, the datasheet is > > silent about this. >from the datasheet the old Virtex fpgas had a "zener like structure to ground" for 5V pci compliance I just looked at a STM32 to see if there was anything about the 5V tolerance in the datasheet it doesn't say how but it allows Vdd+4V input on 5V tolerant pins, max +0/-5mA injected normal IO is 4V and +5/-5mA -Lasse
Reply by ●June 25, 20132013-06-25
On Tue, 25 Jun 2013 11:02:06 -0700, Joerg <invalid@invalid.invalid> wrote:>Folks, > >Got a Silicon Labs 8051Fxxx with 5V-tolerant ports. In the abs max it >says 5.8V is the limit. Well, if one uses the typical diode against the >5V rail it could go slightly above 6V in case of a really big jolt. >Since this 8051 does not have a 5V supply but just VDD (which hangs on >3.3V in this case) there can't be any parasitic substrate diodes dumping >into a rail. > >Does anyone know the innards? Poly resistors? As usual, the datasheet is >silent about this.According to Xilinx, 5V tolerant pins can add a dozen or so components per pin. Probably, as Lasse says, it behaves something like a zener for inputs. If it's programmable as an output too, they have to add some parts to keep current from flowing back through the off p-channel. I don't think you'll find real schematics openly available for this stuff- on-chip ESD protection seems to be kind of a trade secret.
Reply by ●June 25, 20132013-06-25
Spehro Pefhany wrote:> On Tue, 25 Jun 2013 11:02:06 -0700, Joerg <invalid@invalid.invalid> > wrote: > >> Folks, >> >> Got a Silicon Labs 8051Fxxx with 5V-tolerant ports. In the abs max it >> says 5.8V is the limit. Well, if one uses the typical diode against the >> 5V rail it could go slightly above 6V in case of a really big jolt. >> Since this 8051 does not have a 5V supply but just VDD (which hangs on >> 3.3V in this case) there can't be any parasitic substrate diodes dumping >> into a rail. >> >> Does anyone know the innards? Poly resistors? As usual, the datasheet is >> silent about this. > > According to Xilinx, 5V tolerant pins can add a dozen or so components > per pin. Probably, as Lasse says, it behaves something like a zener > for inputs. >That would be ok but they should state a max peak current. Yet nothing is stated.> If it's programmable as an output too, they have to add some parts to > keep current from flowing back through the off p-channel. >They are only input-tolerant, they can't output 5V.> I don't think you'll find real schematics openly available for this > stuff- on-chip ESD protection seems to be kind of a trade secret. >Yeah, that was only available in the good old days. "Modern" datasheets leave a lot to be desired when it comes to hardware details. -- Regards, Joerg http://www.analogconsultants.com/
Reply by ●June 25, 20132013-06-25
On Tue, 25 Jun 2013 16:41:40 -0400, Spehro Pefhany <speffSNIP@interlogDOTyou.knowwhat> wrote:>On Tue, 25 Jun 2013 11:02:06 -0700, Joerg <invalid@invalid.invalid> >wrote: > >>Folks, >> >>Got a Silicon Labs 8051Fxxx with 5V-tolerant ports. In the abs max it >>says 5.8V is the limit. Well, if one uses the typical diode against the >>5V rail it could go slightly above 6V in case of a really big jolt. >>Since this 8051 does not have a 5V supply but just VDD (which hangs on >>3.3V in this case) there can't be any parasitic substrate diodes dumping >>into a rail. >> >>Does anyone know the innards? Poly resistors? As usual, the datasheet is >>silent about this. > >According to Xilinx, 5V tolerant pins can add a dozen or so components >per pin. Probably, as Lasse says, it behaves something like a zener >for inputs. > >If it's programmable as an output too, they have to add some parts to >keep current from flowing back through the off p-channel. > >I don't think you'll find real schematics openly available for this >stuff- on-chip ESD protection seems to be kind of a trade secret."5V-tolerant" pins function by disconnect, not by clamping (somewhat like the schemes used in hi-Z when unpowered bus devices). The voltage limit is determined by oxide breakdown. ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
Reply by ●June 25, 20132013-06-25
On Tue, 25 Jun 2013 14:02:27 -0700, Joerg <invalid@invalid.invalid> wrote:>Spehro Pefhany wrote: >> On Tue, 25 Jun 2013 11:02:06 -0700, Joerg <invalid@invalid.invalid> >> wrote: >> >>> Folks, >>> >>> Got a Silicon Labs 8051Fxxx with 5V-tolerant ports. In the abs max it >>> says 5.8V is the limit. Well, if one uses the typical diode against the >>> 5V rail it could go slightly above 6V in case of a really big jolt. >>> Since this 8051 does not have a 5V supply but just VDD (which hangs on >>> 3.3V in this case) there can't be any parasitic substrate diodes dumping >>> into a rail. >>> >>> Does anyone know the innards? Poly resistors? As usual, the datasheet is >>> silent about this. >> >> According to Xilinx, 5V tolerant pins can add a dozen or so components >> per pin. Probably, as Lasse says, it behaves something like a zener >> for inputs. >> > > >That would be ok but they should state a max peak current. Yet nothing >is stated.Because no current flows. See my related post.> > >> If it's programmable as an output too, they have to add some parts to >> keep current from flowing back through the off p-channel. >> > >They are only input-tolerant, they can't output 5V. > > >> I don't think you'll find real schematics openly available for this >> stuff- on-chip ESD protection seems to be kind of a trade secret. >> > >Yeah, that was only available in the good old days. "Modern" datasheets >leave a lot to be desired when it comes to hardware details....Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
Reply by ●June 25, 20132013-06-25
On Tue, 25 Jun 2013 14:02:27 -0700, Joerg <invalid@invalid.invalid> wrote:>Spehro Pefhany wrote: >> On Tue, 25 Jun 2013 11:02:06 -0700, Joerg <invalid@invalid.invalid> >> wrote: >> >>> Folks, >>> >>> Got a Silicon Labs 8051Fxxx with 5V-tolerant ports. In the abs max it >>> says 5.8V is the limit. Well, if one uses the typical diode against the >>> 5V rail it could go slightly above 6V in case of a really big jolt. >>> Since this 8051 does not have a 5V supply but just VDD (which hangs on >>> 3.3V in this case) there can't be any parasitic substrate diodes dumping >>> into a rail. >>> >>> Does anyone know the innards? Poly resistors? As usual, the datasheet is >>> silent about this. >> >> According to Xilinx, 5V tolerant pins can add a dozen or so components >> per pin. Probably, as Lasse says, it behaves something like a zener >> for inputs. >> > > >That would be ok but they should state a max peak current. Yet nothing >is stated.I guess they assume you'll never exceed the absolute maximum voltage limits of +5.8/-0.3, so no significant current will ever flow.
Reply by ●June 25, 20132013-06-25
Jim Thompson wrote:> On Tue, 25 Jun 2013 16:41:40 -0400, Spehro Pefhany > <speffSNIP@interlogDOTyou.knowwhat> wrote: > >> On Tue, 25 Jun 2013 11:02:06 -0700, Joerg <invalid@invalid.invalid> >> wrote: >> >>> Folks, >>> >>> Got a Silicon Labs 8051Fxxx with 5V-tolerant ports. In the abs max it >>> says 5.8V is the limit. Well, if one uses the typical diode against the >>> 5V rail it could go slightly above 6V in case of a really big jolt. >>> Since this 8051 does not have a 5V supply but just VDD (which hangs on >>> 3.3V in this case) there can't be any parasitic substrate diodes dumping >>> into a rail. >>> >>> Does anyone know the innards? Poly resistors? As usual, the datasheet is >>> silent about this. >> According to Xilinx, 5V tolerant pins can add a dozen or so components >> per pin. Probably, as Lasse says, it behaves something like a zener >> for inputs. >> >> If it's programmable as an output too, they have to add some parts to >> keep current from flowing back through the off p-channel. >> >> I don't think you'll find real schematics openly available for this >> stuff- on-chip ESD protection seems to be kind of a trade secret. > > "5V-tolerant" pins function by disconnect, not by clamping (somewhat > like the schemes used in hi-Z when unpowered bus devices). The > voltage limit is determined by oxide breakdown. >So you mean like a linear regulator? Because a hard disconnect would cause the uC to read this pin wrongly, and it reads it correctly. Or do you mean it disconnects somewhere above 5V? If they say 5.8V, what's you gut feel it could really take if a surge or pulse salvo of a few msec comes through? It's amplitude would be slightly over 7V. because it leans into protective diodes we have up front of the uC port. Those are regular Si-diodes against the 5V rail and GND. -- Regards, Joerg http://www.analogconsultants.com/
Reply by ●June 25, 20132013-06-25
Spehro Pefhany wrote:> On Tue, 25 Jun 2013 14:02:27 -0700, Joerg <invalid@invalid.invalid> > wrote: > >> Spehro Pefhany wrote: >>> On Tue, 25 Jun 2013 11:02:06 -0700, Joerg <invalid@invalid.invalid> >>> wrote: >>> >>>> Folks, >>>> >>>> Got a Silicon Labs 8051Fxxx with 5V-tolerant ports. In the abs max it >>>> says 5.8V is the limit. Well, if one uses the typical diode against the >>>> 5V rail it could go slightly above 6V in case of a really big jolt. >>>> Since this 8051 does not have a 5V supply but just VDD (which hangs on >>>> 3.3V in this case) there can't be any parasitic substrate diodes dumping >>>> into a rail. >>>> >>>> Does anyone know the innards? Poly resistors? As usual, the datasheet is >>>> silent about this. >>> According to Xilinx, 5V tolerant pins can add a dozen or so components >>> per pin. Probably, as Lasse says, it behaves something like a zener >>> for inputs. >>> >> >> That would be ok but they should state a max peak current. Yet nothing >> is stated. > > I guess they assume you'll never exceed the absolute maximum voltage > limits of +5.8/-0.3, so no significant current will ever flow. >Ok, but in real life that's almost unprotectable. The way I usually do it, there is a diode against the 5V rail, followed by a resistor, then the port pin. If the pulse from hell comes along that diode can briefly lean in so badly that Vf goes slightly above 2V, meaning over 7V total. Bigger diodes aren't an option because that messes up the signal, on account of their large capacitance. -- Regards, Joerg http://www.analogconsultants.com/
Reply by ●June 25, 20132013-06-25
On Tue, 25 Jun 2013 17:31:34 -0700, Joerg <invalid@invalid.invalid> wrote:>Jim Thompson wrote: >> On Tue, 25 Jun 2013 16:41:40 -0400, Spehro Pefhany >> <speffSNIP@interlogDOTyou.knowwhat> wrote: >> >>> On Tue, 25 Jun 2013 11:02:06 -0700, Joerg <invalid@invalid.invalid> >>> wrote: >>> >>>> Folks, >>>> >>>> Got a Silicon Labs 8051Fxxx with 5V-tolerant ports. In the abs max it >>>> says 5.8V is the limit. Well, if one uses the typical diode against the >>>> 5V rail it could go slightly above 6V in case of a really big jolt. >>>> Since this 8051 does not have a 5V supply but just VDD (which hangs on >>>> 3.3V in this case) there can't be any parasitic substrate diodes dumping >>>> into a rail. >>>> >>>> Does anyone know the innards? Poly resistors? As usual, the datasheet is >>>> silent about this. >>> According to Xilinx, 5V tolerant pins can add a dozen or so components >>> per pin. Probably, as Lasse says, it behaves something like a zener >>> for inputs. >>> >>> If it's programmable as an output too, they have to add some parts to >>> keep current from flowing back through the off p-channel. >>> >>> I don't think you'll find real schematics openly available for this >>> stuff- on-chip ESD protection seems to be kind of a trade secret. >> >> "5V-tolerant" pins function by disconnect, not by clamping (somewhat >> like the schemes used in hi-Z when unpowered bus devices). The >> voltage limit is determined by oxide breakdown. >> > >So you mean like a linear regulator? Because a hard disconnect would >cause the uC to read this pin wrongly, and it reads it correctly. Or do >you mean it disconnects somewhere above 5V?5V-tolerant INPUTS have no ESD diode to local VDD, just a "snap" diode to ground. Thus only the input stage gate oxide has to stand-off the 5V. 5V-tolerant OUTPUTS, that is outputs which also serve as INPUTS (bi-directional bus I/O, etc.) use a disconnect above local VDD. Visualize the dual series device with "body" at midpoint, that I've shown here before as a battery-charge control device. As in... http://www.analog-innovations.com/SED/PerfectDiodeForChargerIsolation.pdf> >If they say 5.8V, what's you gut feel it could really take if a surge or >pulse salvo of a few msec comes through? It's amplitude would be >slightly over 7V. because it leans into protective diodes we have up >front of the uC port. Those are regular Si-diodes against the 5V rail >and GND.DC over-voltage is a no-no... ESD only. ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
