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8051F020 series, 5V tolerant input schematic?

Started by Joerg June 25, 2013
On Wed, 26 Jun 2013 18:46:54 -0500, John Fields
<jfields@austininstruments.com> wrote:

>On Wed, 26 Jun 2013 14:31:11 -0700, John Larkin ><jlarkin@highlandtechnology.com> wrote: > >>On Wed, 26 Jun 2013 13:09:52 -0700, Jim Thompson >><To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote: >> >>>On Wed, 26 Jun 2013 13:05:59 -0700, John Larkin >>><jlarkin@highlandtechnology.com> wrote: >>> >>>>On Wed, 26 Jun 2013 12:33:06 -0700, Jim Thompson >>>><To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote: >>>> >>>>>On Wed, 26 Jun 2013 11:57:42 -0700, John Larkin >>>>><jlarkin@highlandtechnology.com> wrote: >>>>> >>>>>>On Wed, 26 Jun 2013 11:47:04 -0700, Jim Thompson >>>>>><To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote: >>>>>> >>>>>>>On Wed, 26 Jun 2013 11:34:14 -0700, John Larkin >>>>>>><jlarkin@highlandtechnology.com> wrote: >>>>>>> >>>>>>>>On Wed, 26 Jun 2013 10:54:54 -0700, Joerg <invalid@invalid.invalid> >>>>>>>>wrote: >>>>>>>> >>>>>>>>>Jim Thompson wrote: >>>>>>>>>> On Wed, 26 Jun 2013 10:04:19 -0700, Joerg <invalid@invalid.invalid> >>>>>>>>>> wrote: >>>>>>>>>> >>>>>>>>>>> Jim Thompson wrote: >>>>>>>>>>>> On Wed, 26 Jun 2013 09:26:58 -0700, Joerg <invalid@invalid.invalid> >>>>>>>>>>>> wrote: >>>>>>>>>>>> >>>>>>>>>>>>> Jim Thompson wrote: >>>>>>>>>>>>>> On Wed, 26 Jun 2013 09:08:52 -0700, Joerg <invalid@invalid.invalid> >>>>>>>>>>>>>> wrote: >>>>>>>>>>>>>> >>>>>>>>>>>>>>> Jim Thompson wrote: >>>>>>>>> >>>>>>>>>[...] >>>>>>>>> >>>>>>>>> >>>>>>>>>>>>>>>> And Analog Devices modeling efforts are now managed by a MARKETING VP, >>>>>>>>>>>>>>>> and they are ultimately heading to requiring simulation of their parts >>>>>>>>>>>>>>>> ONLY on their web-based simulator. >>>>>>>>>>>>>>>> >>>>>>>>>>>>>>> That would be a marketing decision that borders on stupid. >>>>>>>>>>>>>> I was there (San Jose) last August trying to convince them of the best >>>>>>>>>>>>>> way to do modeling... let me see the real netlist and then I'd match >>>>>>>>>>>>>> it behaviorally. The MARKETING VP nixed the idea. >>>>>>>>>>>>>> >>>>>>>>>>>>>> (I even showed them various posts from this newsgroup complaining >>>>>>>>>>>>>> about model quality... did no good.) >>>>>>>>>>>>>> >>>>>>>>>>>>> Then I assume they'll never understand why, when it comes to performance >>>>>>>>>>>>> and cost is not a major issue, I always default to LTC and never even >>>>>>>>>>>>> look at AD unless I can't find a chip at LTC. This is because LTC has >>>>>>>>>>>>> behavioral models that work in LTSpice and AD does not. >>>>>>>>>>>>> >>>>>>>>>>>>> Same with TI. Who in their right mind would install and learn half a >>>>>>>>>>>>> dozen competing "free" simulators? If they can't understand that LTSpice >>>>>>>>>>>>> is the de facto winner, oh well. >>>>>>>>>>>> PSpice will run ANY non-encrypted model, as will LTspice, HSpice, any >>>>>>>>>>>> Cadence tool, and most amateur spin-offs. >>>>>>>>>>>> >>>>>>>>>>> If you run a complicated switcher non-behavioral (and I had to do that) >>>>>>>>>>> the sims take forever. For designing SMPS that clearly is not the most >>>>>>>>>>> efficient method. >>>>>>>>>>> >>>>>>>>>>> >>>>>>>>>>>> Encrypting so a model will run only on the parent tool turns me off. >>>>>>>>>>> >>>>>>>>>>> Me, too. >>>>>>>>>>> >>>>>>>>>>> >>>>>>>>>>>> What do you do if you want to mix LT and ADI and TI parts on your >>>>>>>>>>>> board? You're screwed. >>>>>>>>>>>> >>>>>>>>>>> On high end designs I never do that, and there is no need to. You can >>>>>>>>>>> usually get everything at LTC. Except for some hardcore RF stuff and >>>>>>>>>>> then that gets simulated separately. >>>>>>>>>>> >>>>>>>>>>> If it has to be cheap then no special ICs are used anyhow most of the >>>>>>>>>>> time. For example, my first mass-produced device with a boost converter >>>>>>>>>>> revolves around a CD40106 as the "highest-tech" chip. There is no >>>>>>>>>>> dedicated PWM chip because that would have added at least 10c back in >>>>>>>>>>> the early 90's. >>>>>>>>>>> >>>>>>>>>>> >>>>>>>>>>>> Joerg, sounds like LT is happy as a clam with you. You're a locked-in >>>>>>>>>>>> customer. Enjoy >:-} >>>>>>>>>>>> >>>>>>>>>>> Well, yeah, at some point you have to pick one and run with that. I have >>>>>>>>>>> made my choice, and that choice is LTC. >>>>>>>>>> >>>>>>>>>> "Most" of their stuff is good. I've had a recent situation where an >>>>>>>>>> encrypted model works just fine on LTspice, but not on a PCB. >>>>>>>>>> >>>>>>>>> >>>>>>>>>Same here, the LT6700 had a glitch on the chip and I was the unfortunate >>>>>>>>>one who had to discover that the hard way. >>>>>>>>> >>>>>>>>> >>>>>>>>>> The FAE was flummoxed, referred the problem to factory... 4 months >>>>>>>>>> have passed, no solution. >>>>>>>>>> >>>>>>>>> >>>>>>>>>In my case the LTC design engineers looked at it right away, found out >>>>>>>>>that it was indeed a bug, fessed up, apologized, rolled up the sleeves >>>>>>>>>and corrected things. That left a very positive impression with me. >>>>>>>>> >>>>>>>>>Over the years I experienced numerous similar situations with other, >>>>>>>>>larger manufacturers. The classic solution was an attempt to cover it up. >>>>>>>>> >>>>>>>>> >>>>>>>>>> I posted the problem on the LTspice list, but was basically told, >>>>>>>>>> "LTspice, love it or leave it" :-( >>>>>>>>>> >>>>>>>>>> All I've been able to find out is that LTspice encrypted models are >>>>>>>>>> behavioral internally. >>>>>>>>>> >>>>>>>>> >>>>>>>>>They are, mostly. That is the reason why you can simulate switchers so >>>>>>>>>blazingly fast. This does come with pitfalls and (minor) risks but it >>>>>>>>>sure beats non-behavioral sims that take hours. >>>>>>>> >>>>>>>>My LT3757 boost sim runs at about 15 PPM of real time. I need seconds >>>>>>>>of sim to model my product, so I'd get two or three runs per week. And >>>>>>>>I'd run out of hard drive for the RAW file! >>>>>>>> >>>>>>>>I've ordered samples. >>>>>>> >>>>>>>Look thru the HELP for "alternate solver"... some types of parts >>>>>>>require a different matrix parsing. >>>>>>> >>>>>>> ...Jim Thompson >>>>>> >>>>>>If I improved it 20:1 it would still be too slow to give me useful >>>>>>feedback, and I'd still run out of hard drive. I was getting 10G RAW >>>>>>files from milliseconds of sim time. >>>>>> >>>>>>And I don't entirely trust the simulation; sometimes it does weird >>>>>>double or staggered gate drive pulses that don't make obvious sense. >>>>>> >>>>>>Besides, it's fun to solder stuff now and then. >>>>> >>>>>Some of those LT parts are known by those of us "versed in the art" to >>>>>have _real_ bugs. >>>>> >>>>> ...Jim Thompson >>>> >>>>You seem to be mainly versed in yourself. Maybe JF will write a poem >>>>in your honor. > >--- >There's no need to, since Jim's doing all right. > >But Wow, that poetry thing really has you wired up, huh? > >It's something that you're not good at, which casts aspersions on you, >and which you can't refute using your crude complaints. >--- > >>>Please do me the honor of keeping your mouth shut. I have no interest >>>in your opinions. >> >>Honor? Among Thompsons? > >--- >Since you've decided to cast aspersions, why not apprise us about the >superiority of your family tree?
I qualify as "Black Watch" ;-)
>--- > >>>I can confirm as fact an LT part that simulates nicely, but fails on >>>the PCB, confounding the FAE, and, now, the factory. >> >>Likely a bad PCB design. Did you do it? > >--- >With the factory befuddled, It's not likely that your input is >important.
Who really gives a f@#$ what Larkin opines? ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
On Wed, 26 Jun 2013 13:15:21 -0700, Joerg <invalid@invalid.invalid>
wrote:

>John Larkin wrote: >> On Wed, 26 Jun 2013 11:51:19 -0700, Joerg <invalid@invalid.invalid> >> wrote: >> >>> John Larkin wrote: >>>> On Wed, 26 Jun 2013 10:54:54 -0700, Joerg <invalid@invalid.invalid> >>>> wrote: >>>> >>>>> Jim Thompson wrote: >>>>>> On Wed, 26 Jun 2013 10:04:19 -0700, Joerg <invalid@invalid.invalid> >>>>>> wrote: >>>>>> >>>>>>> Jim Thompson wrote: >>>>>>>> On Wed, 26 Jun 2013 09:26:58 -0700, Joerg <invalid@invalid.invalid> >>>>>>>> wrote: >>>>>>>> >>>>>>>>> Jim Thompson wrote: >>>>>>>>>> On Wed, 26 Jun 2013 09:08:52 -0700, Joerg <invalid@invalid.invalid> >>>>>>>>>> wrote: >>>>>>>>>> >>>>>>>>>>> Jim Thompson wrote: >>>>> [...] >>>>> >>>>> >>>>>>>>>>>> And Analog Devices modeling efforts are now managed by a MARKETING VP, >>>>>>>>>>>> and they are ultimately heading to requiring simulation of their parts >>>>>>>>>>>> ONLY on their web-based simulator. >>>>>>>>>>>> >>>>>>>>>>> That would be a marketing decision that borders on stupid. >>>>>>>>>> I was there (San Jose) last August trying to convince them of the best >>>>>>>>>> way to do modeling... let me see the real netlist and then I'd match >>>>>>>>>> it behaviorally. The MARKETING VP nixed the idea. >>>>>>>>>> >>>>>>>>>> (I even showed them various posts from this newsgroup complaining >>>>>>>>>> about model quality... did no good.) >>>>>>>>>> >>>>>>>>> Then I assume they'll never understand why, when it comes to performance >>>>>>>>> and cost is not a major issue, I always default to LTC and never even >>>>>>>>> look at AD unless I can't find a chip at LTC. This is because LTC has >>>>>>>>> behavioral models that work in LTSpice and AD does not. >>>>>>>>> >>>>>>>>> Same with TI. Who in their right mind would install and learn half a >>>>>>>>> dozen competing "free" simulators? If they can't understand that LTSpice >>>>>>>>> is the de facto winner, oh well. >>>>>>>> PSpice will run ANY non-encrypted model, as will LTspice, HSpice, any >>>>>>>> Cadence tool, and most amateur spin-offs. >>>>>>>> >>>>>>> If you run a complicated switcher non-behavioral (and I had to do that) >>>>>>> the sims take forever. For designing SMPS that clearly is not the most >>>>>>> efficient method. >>>>>>> >>>>>>> >>>>>>>> Encrypting so a model will run only on the parent tool turns me off. >>>>>>> Me, too. >>>>>>> >>>>>>> >>>>>>>> What do you do if you want to mix LT and ADI and TI parts on your >>>>>>>> board? You're screwed. >>>>>>>> >>>>>>> On high end designs I never do that, and there is no need to. You can >>>>>>> usually get everything at LTC. Except for some hardcore RF stuff and >>>>>>> then that gets simulated separately. >>>>>>> >>>>>>> If it has to be cheap then no special ICs are used anyhow most of the >>>>>>> time. For example, my first mass-produced device with a boost converter >>>>>>> revolves around a CD40106 as the "highest-tech" chip. There is no >>>>>>> dedicated PWM chip because that would have added at least 10c back in >>>>>>> the early 90's. >>>>>>> >>>>>>> >>>>>>>> Joerg, sounds like LT is happy as a clam with you. You're a locked-in >>>>>>>> customer. Enjoy >:-} >>>>>>>> >>>>>>> Well, yeah, at some point you have to pick one and run with that. I have >>>>>>> made my choice, and that choice is LTC. >>>>>> "Most" of their stuff is good. I've had a recent situation where an >>>>>> encrypted model works just fine on LTspice, but not on a PCB. >>>>>> >>>>> Same here, the LT6700 had a glitch on the chip and I was the unfortunate >>>>> one who had to discover that the hard way. >>>>> >>>>> >>>>>> The FAE was flummoxed, referred the problem to factory... 4 months >>>>>> have passed, no solution. >>>>>> >>>>> In my case the LTC design engineers looked at it right away, found out >>>>> that it was indeed a bug, fessed up, apologized, rolled up the sleeves >>>>> and corrected things. That left a very positive impression with me. >>>>> >>>>> Over the years I experienced numerous similar situations with other, >>>>> larger manufacturers. The classic solution was an attempt to cover it up. >>>>> >>>>> >>>>>> I posted the problem on the LTspice list, but was basically told, >>>>>> "LTspice, love it or leave it" :-( >>>>>> >>>>>> All I've been able to find out is that LTspice encrypted models are >>>>>> behavioral internally. >>>>>> >>>>> They are, mostly. That is the reason why you can simulate switchers so >>>>> blazingly fast. This does come with pitfalls and (minor) risks but it >>>>> sure beats non-behavioral sims that take hours. >>>> My LT3757 boost sim runs at about 15 PPM of real time. I need seconds >>>> of sim to model my product, so I'd get two or three runs per week. And >>>> I'd run out of hard drive for the RAW file! >>>> >>> If it's not super secret send it over and I'll take a look. There's >>> usually a way to speed things up, like by pre-charging a large cap and >>> things like that. >> >> >> No secret, here it is. But C1 needs to be 4000 uF in real life, and I >> want to see how it ramps up and stabilizes, and how it recovers after >> a big load pulse. I'm making 10G RAW files in milliseconds of sim >> time, and I need seconds. >> >> But if you know of any tweaks that would speed it up, I'd appreciate >> that. >> > >I don't see much of a point in doing that. The switcher can deliver a >certain amount of energy per cycle, mainly set per R5 and V2. So for >long term sims you could just assume a current source that's curbed when > the regulated output voltage is reached. > >If you absolutely have to simulate with 4000uF you could set the >inductor coupling to k=1 which helps a little, then play with abstol and >reltol. But it'll still take forever. 4000uF is huge. Like modeling rear >axle shock response for one complete Sahara desert crossing.
And the jerk forced a 10ns max timestep... what did he expect? Plus... apply Thompson's rule... any simulation which staggers along indicates a bad circuit design. ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
On Wed, 26 Jun 2013 13:17:55 -0700, Joerg <invalid@invalid.invalid>
wrote:

>bloggs.fredbloggs.fred@gmail.com wrote: >> On Wednesday, June 26, 2013 12:39:43 PM UTC-4, Joerg wrote: >> >> >> Clamping makes no sense for logic families designed to operate off a >> wide range of power supplies and able to withstand being mixed up >> with logic operating off different supplies. Your thinking is very >> 1970ish. Nothing wrong with the architecture, it is used in some >> extremely fast logic families, it has been perfected IOW. Finally, >> the modern gate oxide process does not blow a hole instantaneously >> when the voltage stress exceeds some threshold by one microvolt. It >> is a graded breakdown that requires time. > > >The last sentence sums it up what is missing: How many volts above abs >max are allowed over how many milliseconds or microseconds? There use to >be family specs and stuff like that but not anymore.
Just a widdle bitty bit ;-) ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
On Wed, 26 Jun 2013 17:02:42 -0700, John Larkin
<jlarkin@highlandtechnology.com> wrote:


>Hell, you could provide some on-topic content once in a while, instead >of just whining about personalities.
--- I often do, but the only posts you seem to be interested in are the ones where you're getting tit for tat. You know, the ones you call "whining". -- JF
John Larkin wrote:
> On Wed, 26 Jun 2013 13:15:21 -0700, Joerg <invalid@invalid.invalid> > wrote: > >> John Larkin wrote: >>> On Wed, 26 Jun 2013 11:51:19 -0700, Joerg <invalid@invalid.invalid> >>> wrote: >>> >>>> John Larkin wrote: >>>>> On Wed, 26 Jun 2013 10:54:54 -0700, Joerg <invalid@invalid.invalid> >>>>> wrote: >>>>> >>>>>> Jim Thompson wrote:
[...]
>>>>>>> I posted the problem on the LTspice list, but was basically told, >>>>>>> "LTspice, love it or leave it" :-( >>>>>>> >>>>>>> All I've been able to find out is that LTspice encrypted models are >>>>>>> behavioral internally. >>>>>>> >>>>>> They are, mostly. That is the reason why you can simulate switchers so >>>>>> blazingly fast. This does come with pitfalls and (minor) risks but it >>>>>> sure beats non-behavioral sims that take hours. >>>>> My LT3757 boost sim runs at about 15 PPM of real time. I need seconds >>>>> of sim to model my product, so I'd get two or three runs per week. And >>>>> I'd run out of hard drive for the RAW file! >>>>> >>>> If it's not super secret send it over and I'll take a look. There's >>>> usually a way to speed things up, like by pre-charging a large cap and >>>> things like that. >>> >>> No secret, here it is. But C1 needs to be 4000 uF in real life, and I >>> want to see how it ramps up and stabilizes, and how it recovers after >>> a big load pulse. I'm making 10G RAW files in milliseconds of sim >>> time, and I need seconds. >>> >>> But if you know of any tweaks that would speed it up, I'd appreciate >>> that. >>> >> I don't see much of a point in doing that. The switcher can deliver a >> certain amount of energy per cycle, mainly set per R5 and V2. So for >> long term sims you could just assume a current source that's curbed when >> the regulated output voltage is reached. > > With all the cap load that I can stand to sim, it actually bursts. > That is probably good in my application. > > It does run at about 300 KHz, which isn't what I expected, given the > timing resistor. Maybe, with the inductor I have, it's skipping clocks > waiting for the current to build up to the peak trip point. OK, go > ahead, force me to buy a smaller, cheaper inductor. >
That is because the comp node (Vc) initially rails. Once the converter reaches regulations and Vc comes off its peg it goes slightly above 1MHz, like the datasheet says.
>> If you absolutely have to simulate with 4000uF you could set the >> inductor coupling to k=1 which helps a little, then play with abstol and >> reltol. But it'll still take forever. 4000uF is huge. Like modeling rear >> axle shock response for one complete Sahara desert crossing. > > Mantis and Metcal next! >
Que quieres decir con eso? I thought the Mantis is fixed, and the illumination ring gloweth again. I've always liked the tower-look of Metcals but they are just too durn expensive for my taste. -- Regards, Joerg http://www.analogconsultants.com/
On Wed, 26 Jun 2013 17:36:11 -0700, Jim Thompson
<To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote:

>On Wed, 26 Jun 2013 14:31:11 -0700, John Larkin ><jlarkin@highlandtechnology.com> wrote: > >>On Wed, 26 Jun 2013 13:09:52 -0700, Jim Thompson >><To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote: >> >>>On Wed, 26 Jun 2013 13:05:59 -0700, John Larkin >>><jlarkin@highlandtechnology.com> wrote: >>> >>>>On Wed, 26 Jun 2013 12:33:06 -0700, Jim Thompson >>>><To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote: >>>> >>>>>On Wed, 26 Jun 2013 11:57:42 -0700, John Larkin >>>>><jlarkin@highlandtechnology.com> wrote: >>>>> >>>>>>On Wed, 26 Jun 2013 11:47:04 -0700, Jim Thompson >>>>>><To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote: >>>>>> >>>>>>>On Wed, 26 Jun 2013 11:34:14 -0700, John Larkin >>>>>>><jlarkin@highlandtechnology.com> wrote: >>>>>>> >>>>>>>>On Wed, 26 Jun 2013 10:54:54 -0700, Joerg <invalid@invalid.invalid> >>>>>>>>wrote: >>>>>>>> >>>>>>>>>Jim Thompson wrote: >>>>>>>>>> On Wed, 26 Jun 2013 10:04:19 -0700, Joerg <invalid@invalid.invalid> >>>>>>>>>> wrote: >>>>>>>>>> >>>>>>>>>>> Jim Thompson wrote: >>>>>>>>>>>> On Wed, 26 Jun 2013 09:26:58 -0700, Joerg <invalid@invalid.invalid> >>>>>>>>>>>> wrote: >>>>>>>>>>>> >>>>>>>>>>>>> Jim Thompson wrote: >>>>>>>>>>>>>> On Wed, 26 Jun 2013 09:08:52 -0700, Joerg <invalid@invalid.invalid> >>>>>>>>>>>>>> wrote: >>>>>>>>>>>>>> >>>>>>>>>>>>>>> Jim Thompson wrote: >>>>>>>>> >>>>>>>>>[...] >>>>>>>>> >>>>>>>>> >>>>>>>>>>>>>>>> And Analog Devices modeling efforts are now managed by a MARKETING VP, >>>>>>>>>>>>>>>> and they are ultimately heading to requiring simulation of their parts >>>>>>>>>>>>>>>> ONLY on their web-based simulator. >>>>>>>>>>>>>>>> >>>>>>>>>>>>>>> That would be a marketing decision that borders on stupid. >>>>>>>>>>>>>> I was there (San Jose) last August trying to convince them of the best >>>>>>>>>>>>>> way to do modeling... let me see the real netlist and then I'd match >>>>>>>>>>>>>> it behaviorally. The MARKETING VP nixed the idea. >>>>>>>>>>>>>> >>>>>>>>>>>>>> (I even showed them various posts from this newsgroup complaining >>>>>>>>>>>>>> about model quality... did no good.) >>>>>>>>>>>>>> >>>>>>>>>>>>> Then I assume they'll never understand why, when it comes to performance >>>>>>>>>>>>> and cost is not a major issue, I always default to LTC and never even >>>>>>>>>>>>> look at AD unless I can't find a chip at LTC. This is because LTC has >>>>>>>>>>>>> behavioral models that work in LTSpice and AD does not. >>>>>>>>>>>>> >>>>>>>>>>>>> Same with TI. Who in their right mind would install and learn half a >>>>>>>>>>>>> dozen competing "free" simulators? If they can't understand that LTSpice >>>>>>>>>>>>> is the de facto winner, oh well. >>>>>>>>>>>> PSpice will run ANY non-encrypted model, as will LTspice, HSpice, any >>>>>>>>>>>> Cadence tool, and most amateur spin-offs. >>>>>>>>>>>> >>>>>>>>>>> If you run a complicated switcher non-behavioral (and I had to do that) >>>>>>>>>>> the sims take forever. For designing SMPS that clearly is not the most >>>>>>>>>>> efficient method. >>>>>>>>>>> >>>>>>>>>>> >>>>>>>>>>>> Encrypting so a model will run only on the parent tool turns me off. >>>>>>>>>>> >>>>>>>>>>> Me, too. >>>>>>>>>>> >>>>>>>>>>> >>>>>>>>>>>> What do you do if you want to mix LT and ADI and TI parts on your >>>>>>>>>>>> board? You're screwed. >>>>>>>>>>>> >>>>>>>>>>> On high end designs I never do that, and there is no need to. You can >>>>>>>>>>> usually get everything at LTC. Except for some hardcore RF stuff and >>>>>>>>>>> then that gets simulated separately. >>>>>>>>>>> >>>>>>>>>>> If it has to be cheap then no special ICs are used anyhow most of the >>>>>>>>>>> time. For example, my first mass-produced device with a boost converter >>>>>>>>>>> revolves around a CD40106 as the "highest-tech" chip. There is no >>>>>>>>>>> dedicated PWM chip because that would have added at least 10c back in >>>>>>>>>>> the early 90's. >>>>>>>>>>> >>>>>>>>>>> >>>>>>>>>>>> Joerg, sounds like LT is happy as a clam with you. You're a locked-in >>>>>>>>>>>> customer. Enjoy >:-} >>>>>>>>>>>> >>>>>>>>>>> Well, yeah, at some point you have to pick one and run with that. I have >>>>>>>>>>> made my choice, and that choice is LTC. >>>>>>>>>> >>>>>>>>>> "Most" of their stuff is good. I've had a recent situation where an >>>>>>>>>> encrypted model works just fine on LTspice, but not on a PCB. >>>>>>>>>> >>>>>>>>> >>>>>>>>>Same here, the LT6700 had a glitch on the chip and I was the unfortunate >>>>>>>>>one who had to discover that the hard way. >>>>>>>>> >>>>>>>>> >>>>>>>>>> The FAE was flummoxed, referred the problem to factory... 4 months >>>>>>>>>> have passed, no solution. >>>>>>>>>> >>>>>>>>> >>>>>>>>>In my case the LTC design engineers looked at it right away, found out >>>>>>>>>that it was indeed a bug, fessed up, apologized, rolled up the sleeves >>>>>>>>>and corrected things. That left a very positive impression with me. >>>>>>>>> >>>>>>>>>Over the years I experienced numerous similar situations with other, >>>>>>>>>larger manufacturers. The classic solution was an attempt to cover it up. >>>>>>>>> >>>>>>>>> >>>>>>>>>> I posted the problem on the LTspice list, but was basically told, >>>>>>>>>> "LTspice, love it or leave it" :-( >>>>>>>>>> >>>>>>>>>> All I've been able to find out is that LTspice encrypted models are >>>>>>>>>> behavioral internally. >>>>>>>>>> >>>>>>>>> >>>>>>>>>They are, mostly. That is the reason why you can simulate switchers so >>>>>>>>>blazingly fast. This does come with pitfalls and (minor) risks but it >>>>>>>>>sure beats non-behavioral sims that take hours. >>>>>>>> >>>>>>>>My LT3757 boost sim runs at about 15 PPM of real time. I need seconds >>>>>>>>of sim to model my product, so I'd get two or three runs per week. And >>>>>>>>I'd run out of hard drive for the RAW file! >>>>>>>> >>>>>>>>I've ordered samples. >>>>>>> >>>>>>>Look thru the HELP for "alternate solver"... some types of parts >>>>>>>require a different matrix parsing. >>>>>>> >>>>>>> ...Jim Thompson >>>>>> >>>>>>If I improved it 20:1 it would still be too slow to give me useful >>>>>>feedback, and I'd still run out of hard drive. I was getting 10G RAW >>>>>>files from milliseconds of sim time. >>>>>> >>>>>>And I don't entirely trust the simulation; sometimes it does weird >>>>>>double or staggered gate drive pulses that don't make obvious sense. >>>>>> >>>>>>Besides, it's fun to solder stuff now and then. >>>>> >>>>>Some of those LT parts are known by those of us "versed in the art" to >>>>>have _real_ bugs. >>>>> >>>>> ...Jim Thompson >>>> >>>>You seem to be mainly versed in yourself. Maybe JF will write a poem >>>>in your honor. >>> >>>Please do me the honor of keeping your mouth shut. I have no interest >>>in your opinions. >> >>Honor? Among Thompsons? >> >>> >>>I can confirm as fact an LT part that simulates nicely, but fails on >>>the PCB, confounding the FAE, and, now, the factory. >> >>Likely a bad PCB design. Did you do it? > >Learn to read... your comprehension is REALLY BAD... "confounding the >FAE, and, now, the factory" > > ...Jim Thompson
And you, too. Who did the PCB? Is it an eval board? What part is it? What's the problem? -- John Larkin Highland Technology, Inc jlarkin at highlandtechnology dot com http://www.highlandtechnology.com Precision electronic instrumentation Picosecond-resolution Digital Delay and Pulse generators Custom laser drivers and controllers Photonics and fiberoptic TTL data links VME thermocouple, LVDT, synchro acquisition and simulation
On Thu, 27 Jun 2013 11:15:45 -0700, John Larkin
<jlarkin@highlandtechnology.com> wrote:

>On Wed, 26 Jun 2013 17:36:11 -0700, Jim Thompson ><To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote: > >>On Wed, 26 Jun 2013 14:31:11 -0700, John Larkin >><jlarkin@highlandtechnology.com> wrote: >> >>>On Wed, 26 Jun 2013 13:09:52 -0700, Jim Thompson >>><To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote: >>> >>>>On Wed, 26 Jun 2013 13:05:59 -0700, John Larkin >>>><jlarkin@highlandtechnology.com> wrote: >>>> >>>>>On Wed, 26 Jun 2013 12:33:06 -0700, Jim Thompson >>>>><To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote: >>>>> >>>>>>On Wed, 26 Jun 2013 11:57:42 -0700, John Larkin >>>>>><jlarkin@highlandtechnology.com> wrote: >>>>>> >>>>>>>On Wed, 26 Jun 2013 11:47:04 -0700, Jim Thompson >>>>>>><To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote: >>>>>>> >>>>>>>>On Wed, 26 Jun 2013 11:34:14 -0700, John Larkin >>>>>>>><jlarkin@highlandtechnology.com> wrote: >>>>>>>> >>>>>>>>>On Wed, 26 Jun 2013 10:54:54 -0700, Joerg <invalid@invalid.invalid> >>>>>>>>>wrote: >>>>>>>>> >>>>>>>>>>Jim Thompson wrote: >>>>>>>>>>> On Wed, 26 Jun 2013 10:04:19 -0700, Joerg <invalid@invalid.invalid> >>>>>>>>>>> wrote: >>>>>>>>>>> >>>>>>>>>>>> Jim Thompson wrote: >>>>>>>>>>>>> On Wed, 26 Jun 2013 09:26:58 -0700, Joerg <invalid@invalid.invalid> >>>>>>>>>>>>> wrote: >>>>>>>>>>>>> >>>>>>>>>>>>>> Jim Thompson wrote: >>>>>>>>>>>>>>> On Wed, 26 Jun 2013 09:08:52 -0700, Joerg <invalid@invalid.invalid> >>>>>>>>>>>>>>> wrote: >>>>>>>>>>>>>>> >>>>>>>>>>>>>>>> Jim Thompson wrote: >>>>>>>>>> >>>>>>>>>>[...] >>>>>>>>>> >>>>>>>>>> >>>>>>>>>>>>>>>>> And Analog Devices modeling efforts are now managed by a MARKETING VP, >>>>>>>>>>>>>>>>> and they are ultimately heading to requiring simulation of their parts >>>>>>>>>>>>>>>>> ONLY on their web-based simulator. >>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>> That would be a marketing decision that borders on stupid. >>>>>>>>>>>>>>> I was there (San Jose) last August trying to convince them of the best >>>>>>>>>>>>>>> way to do modeling... let me see the real netlist and then I'd match >>>>>>>>>>>>>>> it behaviorally. The MARKETING VP nixed the idea. >>>>>>>>>>>>>>> >>>>>>>>>>>>>>> (I even showed them various posts from this newsgroup complaining >>>>>>>>>>>>>>> about model quality... did no good.) >>>>>>>>>>>>>>> >>>>>>>>>>>>>> Then I assume they'll never understand why, when it comes to performance >>>>>>>>>>>>>> and cost is not a major issue, I always default to LTC and never even >>>>>>>>>>>>>> look at AD unless I can't find a chip at LTC. This is because LTC has >>>>>>>>>>>>>> behavioral models that work in LTSpice and AD does not. >>>>>>>>>>>>>> >>>>>>>>>>>>>> Same with TI. Who in their right mind would install and learn half a >>>>>>>>>>>>>> dozen competing "free" simulators? If they can't understand that LTSpice >>>>>>>>>>>>>> is the de facto winner, oh well. >>>>>>>>>>>>> PSpice will run ANY non-encrypted model, as will LTspice, HSpice, any >>>>>>>>>>>>> Cadence tool, and most amateur spin-offs. >>>>>>>>>>>>> >>>>>>>>>>>> If you run a complicated switcher non-behavioral (and I had to do that) >>>>>>>>>>>> the sims take forever. For designing SMPS that clearly is not the most >>>>>>>>>>>> efficient method. >>>>>>>>>>>> >>>>>>>>>>>> >>>>>>>>>>>>> Encrypting so a model will run only on the parent tool turns me off. >>>>>>>>>>>> >>>>>>>>>>>> Me, too. >>>>>>>>>>>> >>>>>>>>>>>> >>>>>>>>>>>>> What do you do if you want to mix LT and ADI and TI parts on your >>>>>>>>>>>>> board? You're screwed. >>>>>>>>>>>>> >>>>>>>>>>>> On high end designs I never do that, and there is no need to. You can >>>>>>>>>>>> usually get everything at LTC. Except for some hardcore RF stuff and >>>>>>>>>>>> then that gets simulated separately. >>>>>>>>>>>> >>>>>>>>>>>> If it has to be cheap then no special ICs are used anyhow most of the >>>>>>>>>>>> time. For example, my first mass-produced device with a boost converter >>>>>>>>>>>> revolves around a CD40106 as the "highest-tech" chip. There is no >>>>>>>>>>>> dedicated PWM chip because that would have added at least 10c back in >>>>>>>>>>>> the early 90's. >>>>>>>>>>>> >>>>>>>>>>>> >>>>>>>>>>>>> Joerg, sounds like LT is happy as a clam with you. You're a locked-in >>>>>>>>>>>>> customer. Enjoy >:-} >>>>>>>>>>>>> >>>>>>>>>>>> Well, yeah, at some point you have to pick one and run with that. I have >>>>>>>>>>>> made my choice, and that choice is LTC. >>>>>>>>>>> >>>>>>>>>>> "Most" of their stuff is good. I've had a recent situation where an >>>>>>>>>>> encrypted model works just fine on LTspice, but not on a PCB. >>>>>>>>>>> >>>>>>>>>> >>>>>>>>>>Same here, the LT6700 had a glitch on the chip and I was the unfortunate >>>>>>>>>>one who had to discover that the hard way. >>>>>>>>>> >>>>>>>>>> >>>>>>>>>>> The FAE was flummoxed, referred the problem to factory... 4 months >>>>>>>>>>> have passed, no solution. >>>>>>>>>>> >>>>>>>>>> >>>>>>>>>>In my case the LTC design engineers looked at it right away, found out >>>>>>>>>>that it was indeed a bug, fessed up, apologized, rolled up the sleeves >>>>>>>>>>and corrected things. That left a very positive impression with me. >>>>>>>>>> >>>>>>>>>>Over the years I experienced numerous similar situations with other, >>>>>>>>>>larger manufacturers. The classic solution was an attempt to cover it up. >>>>>>>>>> >>>>>>>>>> >>>>>>>>>>> I posted the problem on the LTspice list, but was basically told, >>>>>>>>>>> "LTspice, love it or leave it" :-( >>>>>>>>>>> >>>>>>>>>>> All I've been able to find out is that LTspice encrypted models are >>>>>>>>>>> behavioral internally. >>>>>>>>>>> >>>>>>>>>> >>>>>>>>>>They are, mostly. That is the reason why you can simulate switchers so >>>>>>>>>>blazingly fast. This does come with pitfalls and (minor) risks but it >>>>>>>>>>sure beats non-behavioral sims that take hours. >>>>>>>>> >>>>>>>>>My LT3757 boost sim runs at about 15 PPM of real time. I need seconds >>>>>>>>>of sim to model my product, so I'd get two or three runs per week. And >>>>>>>>>I'd run out of hard drive for the RAW file! >>>>>>>>> >>>>>>>>>I've ordered samples. >>>>>>>> >>>>>>>>Look thru the HELP for "alternate solver"... some types of parts >>>>>>>>require a different matrix parsing. >>>>>>>> >>>>>>>> ...Jim Thompson >>>>>>> >>>>>>>If I improved it 20:1 it would still be too slow to give me useful >>>>>>>feedback, and I'd still run out of hard drive. I was getting 10G RAW >>>>>>>files from milliseconds of sim time. >>>>>>> >>>>>>>And I don't entirely trust the simulation; sometimes it does weird >>>>>>>double or staggered gate drive pulses that don't make obvious sense. >>>>>>> >>>>>>>Besides, it's fun to solder stuff now and then. >>>>>> >>>>>>Some of those LT parts are known by those of us "versed in the art" to >>>>>>have _real_ bugs. >>>>>> >>>>>> ...Jim Thompson >>>>> >>>>>You seem to be mainly versed in yourself. Maybe JF will write a poem >>>>>in your honor. >>>> >>>>Please do me the honor of keeping your mouth shut. I have no interest >>>>in your opinions. >>> >>>Honor? Among Thompsons? >>> >>>> >>>>I can confirm as fact an LT part that simulates nicely, but fails on >>>>the PCB, confounding the FAE, and, now, the factory. >>> >>>Likely a bad PCB design. Did you do it? >> >>Learn to read... your comprehension is REALLY BAD... "confounding the >>FAE, and, now, the factory" >> >> ...Jim Thompson > >And you, too. > >Who did the PCB? Is it an eval board?
I'm not sure. The work was done in Auckland, NZ, by my client, not by me, I don't do PCB's, I only do chips... and my 64-channel LED driver is working gorgeously. FAE == LT Field Application Engineer... he couldn't figure out the problem... it was built exactly to the data sheet. Problem sent off to the factory, who, 4 months later, still haven't resolved the issue. I was asked to simulate it on LTspice, which I did, and the simulator says it works... actuality says it doesn't.
> >What part is it? What's the problem?
LTC3853, oscillates/loop-instability; running as 3-phase single-output. ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
On Thu, 27 Jun 2013 11:33:20 -0700, Jim Thompson
<To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote:

>On Thu, 27 Jun 2013 11:15:45 -0700, John Larkin ><jlarkin@highlandtechnology.com> wrote: > >>On Wed, 26 Jun 2013 17:36:11 -0700, Jim Thompson >><To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote: >> >>>On Wed, 26 Jun 2013 14:31:11 -0700, John Larkin >>><jlarkin@highlandtechnology.com> wrote:
[snip]
>>>> >>>>Likely a bad PCB design. Did you do it? >>> >>>Learn to read... your comprehension is REALLY BAD... "confounding the >>>FAE, and, now, the factory" >>> >>> ...Jim Thompson >> >>And you, too. >> >>Who did the PCB? Is it an eval board? > >I'm not sure. The work was done in Auckland, NZ, by my client, not by >me, I don't do PCB's, I only do chips... and my 64-channel LED driver >is working gorgeously. > >FAE == LT Field Application Engineer... he couldn't figure out the >problem... it was built exactly to the data sheet. Problem sent off >to the factory, who, 4 months later, still haven't resolved the issue. > >I was asked to simulate it on LTspice, which I did, and the simulator >says it works... actuality says it doesn't. > >> >>What part is it? What's the problem? > >LTC3853, oscillates/loop-instability; running as 3-phase >single-output. > > ...Jim Thompson
Adding a point... the part is peddled as a 3-output device, but the application note shows 3-phase single-output operation. I suspect this was just thrown onto the data sheet without physical testing, just simulation of a _behavioral_ model >:-} ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
On Thu, 27 Jun 2013 11:51:54 -0700, Jim Thompson
<To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote:

>On Thu, 27 Jun 2013 11:33:20 -0700, Jim Thompson ><To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote: > >>On Thu, 27 Jun 2013 11:15:45 -0700, John Larkin >><jlarkin@highlandtechnology.com> wrote: >> >>>On Wed, 26 Jun 2013 17:36:11 -0700, Jim Thompson >>><To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote: >>> >>>>On Wed, 26 Jun 2013 14:31:11 -0700, John Larkin >>>><jlarkin@highlandtechnology.com> wrote: >[snip] >>>>> >>>>>Likely a bad PCB design. Did you do it? >>>> >>>>Learn to read... your comprehension is REALLY BAD... "confounding the >>>>FAE, and, now, the factory" >>>> >>>> ...Jim Thompson >>> >>>And you, too. >>> >>>Who did the PCB? Is it an eval board? >> >>I'm not sure. The work was done in Auckland, NZ, by my client, not by >>me, I don't do PCB's, I only do chips... and my 64-channel LED driver >>is working gorgeously. >> >>FAE == LT Field Application Engineer... he couldn't figure out the >>problem... it was built exactly to the data sheet. Problem sent off >>to the factory, who, 4 months later, still haven't resolved the issue. >> >>I was asked to simulate it on LTspice, which I did, and the simulator >>says it works... actuality says it doesn't. >> >>> >>>What part is it? What's the problem? >> >>LTC3853, oscillates/loop-instability; running as 3-phase >>single-output. >> >> ...Jim Thompson > >Adding a point... the part is peddled as a 3-output device, but the >application note shows 3-phase single-output operation. I suspect >this was just thrown onto the data sheet without physical testing, >just simulation of a _behavioral_ model >:-} > > ...Jim Thompson
Those multiphase slope-compensated things are prone to all sorts of loop funnies, including sub-cycle oscillation. Cap ESR matters a lot. Running at higher frequency sometimes helps. Is the problem on an eval board, or a new design? -- John Larkin Highland Technology, Inc jlarkin at highlandtechnology dot com http://www.highlandtechnology.com Precision electronic instrumentation Picosecond-resolution Digital Delay and Pulse generators Custom laser drivers and controllers Photonics and fiberoptic TTL data links VME thermocouple, LVDT, synchro acquisition and simulation
On Wed, 26 Jun 2013 07:52:30 -0700, Joerg <invalid@invalid.invalid> =
wrote:

> >>> >>>>> If they say 5.8V, what's you gut feel it could really take if a =
surge or
>>>>> pulse salvo of a few msec comes through? It's amplitude would be >>>>> slightly over 7V. because it leans into protective diodes we have =
up
>>>>> front of the uC port. Those are regular Si-diodes against the 5V =
rail
>>>>> and GND. >>>> DC over-voltage is a no-no... ESD only. >>>> =09 >>> DC will never exceed 5V and abs max is 5.8V. So you think ESD or =
surges
>>> (the usual machine-gun style bursts in EMC tests) are ok? We have it >>> clamped to a 5V rail but it could really lean into those clamp =
diodes.
>>=20 >> This thread rattles around avoiding specifics. Is the "5V-tolerant" >> input an input that has 3.3V as VDD? >> =09 > >Yes, it is, that's what I wrote in the original post :-) > >The uC has only a 3.3V supply, no 5V supply. But some lines coming in >are from logic that is on 5V, so can't be ESD-clamped lower than 5V.
Well, Jeorg you could use two stage protection; say 50 ohms then a 5.6 V zener to ground, then another 100 ohms and a 5.1 or even 4.7 volt zener to ground. Either way, you have to decide. ?-)