Direct digital synthesis of square waves

On 2022-08-18 23:11, John Larkin wrote:
> On Thu, 18 Aug 2022 12:41:33 -0400, Phil Hobbs
> <pcdhSpamMeSenseless@electrooptical.net> wrote:
>
>> On 8/17/22 9:58 AM, jlarkin@highlandsniptechnology.com wrote:
>>> On Wed, 17 Aug 2022 06:44:18 -0000 (UTC), Jasen Betts
>>> <usenet@revmaps.no-ip.org> wrote:
>>>
>>>> On 2022-08-16, whit3rd <whit3rd@gmail.com> wrote:
>>>>>
>>>>> A smaller sine/cos table might be used with
>>>>>
>>>>> sine(a+b) = sine(a) cos(b) + cos(a)sine(b)
>>>>>
>>>>> as in, with small deviations 'b' from major steps in the table, two multiplies and
>>>>> an add give you 2^20 different accurate sines from a 2^10 size sine table.
>>>>> Since cos(b) will always be near unity ( 1 plus order of 2^-20 when b is under 2^-10),
>>>>> you can make that one multiply and an add.    Perhaps that's what the 'phase
>>>>> accumulator' is for, estimating the 'b'?
>>>>
>>>> AKA "CORDIC"
>>>
>>> In an FPGA, one could have the basic sine table and an interpolation
>>> slope table and maybe just add. Do the math at compile time, not run
>>> time.
>>>
>>> At some point, dac resolution becomes the limit, not sine table
>>> resolution.
>>>
>>
>> Apologies if somebody has pointed this out upthread--I didn't follow it all.
>>
>> If you have enough bits in the phase accumulator, and apply the right
>> amount of numerical gain ahead of the DAC, you can always get a
>> well-behaved trapezoidal waveform with a nice smooth fine-grained
>> staircase near the zero crossing, which will filter well. (Saturating
>> arithmetic is required, obviously.)
>>
>> You just need to make sure that the duration of the linear part is at
>> least twice the filter's settling time (to the required accuracy), so
>> that the ringing from the corner of the trapezoid has all settled out by
>> the time you get to the zero crossing.  If you increase the numerical
>> gain like 1/f, this works down to as low a frequency as you like.
>
> Right. The trapezoid corner happens at an XO edge, which makes output
> jitter, so the filter has to forget that corner but average as many
> samples as it can along the linear slope. The trapezoid is not
> bandlimited so violates the concept of the Sampling Theorem.
>
> [...]

Don't use a trapezoid then. Approximate one summing a series
of sinc(x).

Jeroen Belleman

On Thu, 18 Aug 2022 14:11:00 -0700, John Larkin
<jlarkin@highland_atwork_technology.com> wrote:

>On Thu, 18 Aug 2022 12:41:33 -0400, Phil Hobbs
><pcdhSpamMeSenseless@electrooptical.net> wrote:
>
>>On 8/17/22 9:58 AM, jlarkin@highlandsniptechnology.com wrote:
>>> On Wed, 17 Aug 2022 06:44:18 -0000 (UTC), Jasen Betts
>>> <usenet@revmaps.no-ip.org> wrote:
>>> 
>>>> On 2022-08-16, whit3rd <whit3rd@gmail.com> wrote:
>>>>>
>>>>> A smaller sine/cos table might be used with
>>>>>
>>>>> sine(a+b) = sine(a) cos(b) + cos(a)sine(b)
>>>>>
>>>>> as in, with small deviations 'b' from major steps in the table, two multiplies and
>>>>> an add give you 2^20 different accurate sines from a 2^10 size sine table.
>>>>> Since cos(b) will always be near unity ( 1 plus order of 2^-20 when b is under 2^-10),
>>>>> you can make that one multiply and an add.    Perhaps that's what the 'phase
>>>>> accumulator' is for, estimating the 'b'?
>>>>
>>>> AKA "CORDIC"
>>> 
>>> In an FPGA, one could have the basic sine table and an interpolation
>>> slope table and maybe just add. Do the math at compile time, not run
>>> time.
>>> 
>>> At some point, dac resolution becomes the limit, not sine table
>>> resolution.
>>> 
>>
>>Apologies if somebody has pointed this out upthread--I didn't follow it all.
>>
>>If you have enough bits in the phase accumulator, and apply the right
>>amount of numerical gain ahead of the DAC, you can always get a
>>well-behaved trapezoidal waveform with a nice smooth fine-grained
>>staircase near the zero crossing, which will filter well. (Saturating
>>arithmetic is required, obviously.)
>>
>>You just need to make sure that the duration of the linear part is at
>>least twice the filter's settling time (to the required accuracy), so
>>that the ringing from the corner of the trapezoid has all settled out by
>>the time you get to the zero crossing.  If you increase the numerical
>>gain like 1/f, this works down to as low a frequency as you like.
>
>Right. The trapezoid corner happens at an XO edge, which makes output
>jitter, so the filter has to forget that corner but average as many
>samples as it can along the linear slope. The trapezoid is not
>bandlimited so violates the concept of the Sampling Theorem.
>
>This argues for making the comparator trip at near the top of the
>trapezoid, not the mid-voltage zero crossing equivalent.
>
>One might make the trapezoid edge steeper at low synthesized
>frequencies and maybe incorporate more LSBish phase accumulator bits.
>Somehow. Seamlessly.

With a NCO implemented in a FPGA, it's pretty easy to generate a
trigger when the phase angle is at a specified distance from
roll-over, and use this (plus the bottom bits of the phase
accumulator) to implement the transition.  One can control the
transition rate by choosing which bottom bits to use.

Joe Gwinn

On Thursday, August 18, 2022 at 6:16:07 PM UTC-4, Joe Gwinn wrote:
> On Thu, 18 Aug 2022 14:11:00 -0700, John Larkin 
> <jlarkin@highland_atwork_technology.com> wrote: 
> 
> >On Thu, 18 Aug 2022 12:41:33 -0400, Phil Hobbs 
> ><pcdhSpamM...@electrooptical.net> wrote: 
> > 
> >>On 8/17/22 9:58 AM, jla...@highlandsniptechnology.com wrote: 
> >>> On Wed, 17 Aug 2022 06:44:18 -0000 (UTC), Jasen Betts 
> >>> <use...@revmaps.no-ip.org> wrote: 
> >>> 
> >>>> On 2022-08-16, whit3rd <whi...@gmail.com> wrote: 
> >>>>> 
> >>>>> A smaller sine/cos table might be used with 
> >>>>> 
> >>>>> sine(a+b) = sine(a) cos(b) + cos(a)sine(b) 
> >>>>> 
> >>>>> as in, with small deviations 'b' from major steps in the table, two multiplies and 
> >>>>> an add give you 2^20 different accurate sines from a 2^10 size sine table. 
> >>>>> Since cos(b) will always be near unity ( 1 plus order of 2^-20 when b is under 2^-10), 
> >>>>> you can make that one multiply and an add. Perhaps that's what the 'phase 
> >>>>> accumulator' is for, estimating the 'b'? 
> >>>> 
> >>>> AKA "CORDIC" 
> >>> 
> >>> In an FPGA, one could have the basic sine table and an interpolation 
> >>> slope table and maybe just add. Do the math at compile time, not run 
> >>> time. 
> >>> 
> >>> At some point, dac resolution becomes the limit, not sine table 
> >>> resolution. 
> >>> 
> >> 
> >>Apologies if somebody has pointed this out upthread--I didn't follow it all. 
> >> 
> >>If you have enough bits in the phase accumulator, and apply the right 
> >>amount of numerical gain ahead of the DAC, you can always get a 
> >>well-behaved trapezoidal waveform with a nice smooth fine-grained 
> >>staircase near the zero crossing, which will filter well. (Saturating 
> >>arithmetic is required, obviously.) 
> >> 
> >>You just need to make sure that the duration of the linear part is at 
> >>least twice the filter's settling time (to the required accuracy), so 
> >>that the ringing from the corner of the trapezoid has all settled out by 
> >>the time you get to the zero crossing. If you increase the numerical 
> >>gain like 1/f, this works down to as low a frequency as you like. 
> > 
> >Right. The trapezoid corner happens at an XO edge, which makes output 
> >jitter, so the filter has to forget that corner but average as many 
> >samples as it can along the linear slope. The trapezoid is not 
> >bandlimited so violates the concept of the Sampling Theorem. 
> > 
> >This argues for making the comparator trip at near the top of the 
> >trapezoid, not the mid-voltage zero crossing equivalent. 
> > 
> >One might make the trapezoid edge steeper at low synthesized 
> >frequencies and maybe incorporate more LSBish phase accumulator bits. 
> >Somehow. Seamlessly.
> With a NCO implemented in a FPGA, it's pretty easy to generate a 
> trigger when the phase angle is at a specified distance from 
> roll-over, and use this (plus the bottom bits of the phase 
> accumulator) to implement the transition. One can control the 
> transition rate by choosing which bottom bits to use. 

That, as you describe it, a simple "trigger" won't work.  The transition has to be queued to the long word phase generator so the transition happens as an "average" of the multiple samples and so splits the clock cycle to obtain finer resolution.  The values in the samples of the transition each have to be scaled to the lsbs of the phase word.  Perhaps that's what you meant by "implement the transition".  

But none of this is useful since this design is easily done using a standard DDS design with a 2:1 range of output frequency allowing a filter to be optimized.  Follow this with a programmable octave divider and you can cover any range of frequency you wish.  No limit to the low end.  The frequency resolution is only limited by the length of the phase word, which also determines the added jitter of the DDS, or at least is the largest contributor if designed properly.  

-- 

Rick C.

-+- Get 1,000 miles of free Supercharging
-+- Tesla referral code - https://ts.la/richard11209

On 8/18/22 5:11 PM, John Larkin wrote:
> On Thu, 18 Aug 2022 12:41:33 -0400, Phil Hobbs
> <pcdhSpamMeSenseless@electrooptical.net> wrote:
> 
>> On 8/17/22 9:58 AM, jlarkin@highlandsniptechnology.com wrote:
>>> On Wed, 17 Aug 2022 06:44:18 -0000 (UTC), Jasen Betts
>>> <usenet@revmaps.no-ip.org> wrote:
>>>
>>>> On 2022-08-16, whit3rd <whit3rd@gmail.com> wrote:
>>>>>
>>>>> A smaller sine/cos table might be used with
>>>>>
>>>>> sine(a+b) = sine(a) cos(b) + cos(a)sine(b)
>>>>>
>>>>> as in, with small deviations 'b' from major steps in the table, two multiplies and
>>>>> an add give you 2^20 different accurate sines from a 2^10 size sine table.
>>>>> Since cos(b) will always be near unity ( 1 plus order of 2^-20 when b is under 2^-10),
>>>>> you can make that one multiply and an add.    Perhaps that's what the 'phase
>>>>> accumulator' is for, estimating the 'b'?
>>>>
>>>> AKA "CORDIC"
>>>
>>> In an FPGA, one could have the basic sine table and an interpolation
>>> slope table and maybe just add. Do the math at compile time, not run
>>> time.
>>>
>>> At some point, dac resolution becomes the limit, not sine table
>>> resolution.
>>>
>>
>> Apologies if somebody has pointed this out upthread--I didn't follow it all.
>>
>> If you have enough bits in the phase accumulator, and apply the right
>> amount of numerical gain ahead of the DAC, you can always get a
>> well-behaved trapezoidal waveform with a nice smooth fine-grained
>> staircase near the zero crossing, which will filter well. (Saturating
>> arithmetic is required, obviously.)
>>
>> You just need to make sure that the duration of the linear part is at
>> least twice the filter's settling time (to the required accuracy), so
>> that the ringing from the corner of the trapezoid has all settled out by
>> the time you get to the zero crossing.  If you increase the numerical
>> gain like 1/f, this works down to as low a frequency as you like.
> 
> Right. The trapezoid corner happens at an XO edge, which makes output
> jitter, so the filter has to forget that corner but average as many
> samples as it can along the linear slope. The trapezoid is not
> bandlimited so violates the concept of the Sampling Theorem.
> 
> This argues for making the comparator trip at near the top of the
> trapezoid, not the mid-voltage zero crossing equivalent.
> 
> One might make the trapezoid edge steeper at low synthesized
> frequencies and maybe incorporate more LSBish phase accumulator bits.
> Somehow. Seamlessly.
> 

You just multiply by 1/f, using saturating arithmetic.  That keeps the
slope at the zero crossing the same at all frequencies, allows the same
amount of time for the filter to settle, produces nearly the same
settling artifacts, and so forth and so on.    At high frequencies you
do it the normal way.

You don't care about Nyquist here--you're a time domain guy, remember? ;)

Cheers

Phil Hobbs

-- 
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
https://hobbs-eo.com

fredag den 19. august 2022 kl. 18.14.35 UTC+2 skrev Phil Hobbs:
> On 8/18/22 5:11 PM, John Larkin wrote: 
> > On Thu, 18 Aug 2022 12:41:33 -0400, Phil Hobbs 
> > <pcdhSpamM...@electrooptical.net> wrote: 
> > 
> >> On 8/17/22 9:58 AM, jla...@highlandsniptechnology.com wrote: 
> >>> On Wed, 17 Aug 2022 06:44:18 -0000 (UTC), Jasen Betts 
> >>> <use...@revmaps.no-ip.org> wrote: 
> >>> 
> >>>> On 2022-08-16, whit3rd <whi...@gmail.com> wrote: 
> >>>>> 
> >>>>> A smaller sine/cos table might be used with 
> >>>>> 
> >>>>> sine(a+b) = sine(a) cos(b) + cos(a)sine(b) 
> >>>>> 
> >>>>> as in, with small deviations 'b' from major steps in the table, two multiplies and 
> >>>>> an add give you 2^20 different accurate sines from a 2^10 size sine table. 
> >>>>> Since cos(b) will always be near unity ( 1 plus order of 2^-20 when b is under 2^-10), 
> >>>>> you can make that one multiply and an add. Perhaps that's what the 'phase 
> >>>>> accumulator' is for, estimating the 'b'? 
> >>>> 
> >>>> AKA "CORDIC" 
> >>> 
> >>> In an FPGA, one could have the basic sine table and an interpolation 
> >>> slope table and maybe just add. Do the math at compile time, not run 
> >>> time. 
> >>> 
> >>> At some point, dac resolution becomes the limit, not sine table 
> >>> resolution. 
> >>> 
> >> 
> >> Apologies if somebody has pointed this out upthread--I didn't follow it all. 
> >> 
> >> If you have enough bits in the phase accumulator, and apply the right 
> >> amount of numerical gain ahead of the DAC, you can always get a 
> >> well-behaved trapezoidal waveform with a nice smooth fine-grained 
> >> staircase near the zero crossing, which will filter well. (Saturating 
> >> arithmetic is required, obviously.) 
> >> 
> >> You just need to make sure that the duration of the linear part is at 
> >> least twice the filter's settling time (to the required accuracy), so 
> >> that the ringing from the corner of the trapezoid has all settled out by 
> >> the time you get to the zero crossing. If you increase the numerical 
> >> gain like 1/f, this works down to as low a frequency as you like. 
> > 
> > Right. The trapezoid corner happens at an XO edge, which makes output 
> > jitter, so the filter has to forget that corner but average as many 
> > samples as it can along the linear slope. The trapezoid is not 
> > bandlimited so violates the concept of the Sampling Theorem. 
> > 
> > This argues for making the comparator trip at near the top of the 
> > trapezoid, not the mid-voltage zero crossing equivalent. 
> > 
> > One might make the trapezoid edge steeper at low synthesized 
> > frequencies and maybe incorporate more LSBish phase accumulator bits. 
> > Somehow. Seamlessly. 
> >
> You just multiply by 1/f, using saturating arithmetic. That keeps the 
> slope at the zero crossing the same at all frequencies, allows the same 
> amount of time for the filter to settle, produces nearly the same 
> settling artifacts, and so forth and so on. At high frequencies you 
> do it the normal way. 

and if you do it before the sine table you get sine shaped edges

sorta like S-shape acceleration/deceleration on a CNC/robot
limiting jerk

On 8/19/22 12:22 PM, Lasse Langwadt Christensen wrote:
> fredag den 19. august 2022 kl. 18.14.35 UTC+2 skrev Phil Hobbs:
>> On 8/18/22 5:11 PM, John Larkin wrote: 
>>> On Thu, 18 Aug 2022 12:41:33 -0400, Phil Hobbs 
>>> <pcdhSpamM...@electrooptical.net> wrote: 
>>>
>>>> On 8/17/22 9:58 AM, jla...@highlandsniptechnology.com wrote: 
>>>>> On Wed, 17 Aug 2022 06:44:18 -0000 (UTC), Jasen Betts 
>>>>> <use...@revmaps.no-ip.org> wrote: 
>>>>>
>>>>>> On 2022-08-16, whit3rd <whi...@gmail.com> wrote: 
>>>>>>>
>>>>>>> A smaller sine/cos table might be used with 
>>>>>>>
>>>>>>> sine(a+b) = sine(a) cos(b) + cos(a)sine(b) 
>>>>>>>
>>>>>>> as in, with small deviations 'b' from major steps in the table, two multiplies and 
>>>>>>> an add give you 2^20 different accurate sines from a 2^10 size sine table. 
>>>>>>> Since cos(b) will always be near unity ( 1 plus order of 2^-20 when b is under 2^-10), 
>>>>>>> you can make that one multiply and an add. Perhaps that's what the 'phase 
>>>>>>> accumulator' is for, estimating the 'b'? 
>>>>>>
>>>>>> AKA "CORDIC" 
>>>>>
>>>>> In an FPGA, one could have the basic sine table and an interpolation 
>>>>> slope table and maybe just add. Do the math at compile time, not run 
>>>>> time. 
>>>>>
>>>>> At some point, dac resolution becomes the limit, not sine table 
>>>>> resolution. 
>>>>>
>>>>
>>>> Apologies if somebody has pointed this out upthread--I didn't follow it all. 
>>>>
>>>> If you have enough bits in the phase accumulator, and apply the right 
>>>> amount of numerical gain ahead of the DAC, you can always get a 
>>>> well-behaved trapezoidal waveform with a nice smooth fine-grained 
>>>> staircase near the zero crossing, which will filter well. (Saturating 
>>>> arithmetic is required, obviously.) 
>>>>
>>>> You just need to make sure that the duration of the linear part is at 
>>>> least twice the filter's settling time (to the required accuracy), so 
>>>> that the ringing from the corner of the trapezoid has all settled out by 
>>>> the time you get to the zero crossing. If you increase the numerical 
>>>> gain like 1/f, this works down to as low a frequency as you like. 
>>>
>>> Right. The trapezoid corner happens at an XO edge, which makes output 
>>> jitter, so the filter has to forget that corner but average as many 
>>> samples as it can along the linear slope. The trapezoid is not 
>>> bandlimited so violates the concept of the Sampling Theorem. 
>>>
>>> This argues for making the comparator trip at near the top of the 
>>> trapezoid, not the mid-voltage zero crossing equivalent. 
>>>
>>> One might make the trapezoid edge steeper at low synthesized 
>>> frequencies and maybe incorporate more LSBish phase accumulator bits. 
>>> Somehow. Seamlessly. 
>>>
>> You just multiply by 1/f, using saturating arithmetic. That keeps the 
>> slope at the zero crossing the same at all frequencies, allows the same 
>> amount of time for the filter to settle, produces nearly the same 
>> settling artifacts, and so forth and so on. At high frequencies you 
>> do it the normal way. 
> 
> and if you do it before the sine table you get sine shaped edges
> 
> sorta like S-shape acceleration/deceleration on a CNC/robot
> limiting jerk
> 

Interesting point.

Normally, dorking a rectangle window to try to reduce the ringing is
somewhat disappointing--the first derivative is continuous, but the
second isn't.  The ringing thus asymptotically goes like one more power
of 1/t, which helps but isn't a complete fix.

On the other hand, doing it your way has the important advantage that it
switches seamlessly to the continuous-sinusoid case at high frequency,
with no nasty artifacts at the changeover frequency.

I like it.

Cheers

Phil Hobbs

-- 
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
https://hobbs-eo.com

On Fri, 19 Aug 2022 12:34:24 -0400, Phil Hobbs
<pcdhSpamMeSenseless@electrooptical.net> wrote:

>On 8/19/22 12:22 PM, Lasse Langwadt Christensen wrote:
>> fredag den 19. august 2022 kl. 18.14.35 UTC+2 skrev Phil Hobbs:
>>> On 8/18/22 5:11 PM, John Larkin wrote: 
>>>> On Thu, 18 Aug 2022 12:41:33 -0400, Phil Hobbs 
>>>> <pcdhSpamM...@electrooptical.net> wrote: 
>>>>
>>>>> On 8/17/22 9:58 AM, jla...@highlandsniptechnology.com wrote: 
>>>>>> On Wed, 17 Aug 2022 06:44:18 -0000 (UTC), Jasen Betts 
>>>>>> <use...@revmaps.no-ip.org> wrote: 
>>>>>>
>>>>>>> On 2022-08-16, whit3rd <whi...@gmail.com> wrote: 
>>>>>>>>
>>>>>>>> A smaller sine/cos table might be used with 
>>>>>>>>
>>>>>>>> sine(a+b) = sine(a) cos(b) + cos(a)sine(b) 
>>>>>>>>
>>>>>>>> as in, with small deviations 'b' from major steps in the table, two multiplies and 
>>>>>>>> an add give you 2^20 different accurate sines from a 2^10 size sine table. 
>>>>>>>> Since cos(b) will always be near unity ( 1 plus order of 2^-20 when b is under 2^-10), 
>>>>>>>> you can make that one multiply and an add. Perhaps that's what the 'phase 
>>>>>>>> accumulator' is for, estimating the 'b'? 
>>>>>>>
>>>>>>> AKA "CORDIC" 
>>>>>>
>>>>>> In an FPGA, one could have the basic sine table and an interpolation 
>>>>>> slope table and maybe just add. Do the math at compile time, not run 
>>>>>> time. 
>>>>>>
>>>>>> At some point, dac resolution becomes the limit, not sine table 
>>>>>> resolution. 
>>>>>>
>>>>>
>>>>> Apologies if somebody has pointed this out upthread--I didn't follow it all. 
>>>>>
>>>>> If you have enough bits in the phase accumulator, and apply the right 
>>>>> amount of numerical gain ahead of the DAC, you can always get a 
>>>>> well-behaved trapezoidal waveform with a nice smooth fine-grained 
>>>>> staircase near the zero crossing, which will filter well. (Saturating 
>>>>> arithmetic is required, obviously.) 
>>>>>
>>>>> You just need to make sure that the duration of the linear part is at 
>>>>> least twice the filter's settling time (to the required accuracy), so 
>>>>> that the ringing from the corner of the trapezoid has all settled out by 
>>>>> the time you get to the zero crossing. If you increase the numerical 
>>>>> gain like 1/f, this works down to as low a frequency as you like. 
>>>>
>>>> Right. The trapezoid corner happens at an XO edge, which makes output 
>>>> jitter, so the filter has to forget that corner but average as many 
>>>> samples as it can along the linear slope. The trapezoid is not 
>>>> bandlimited so violates the concept of the Sampling Theorem. 
>>>>
>>>> This argues for making the comparator trip at near the top of the 
>>>> trapezoid, not the mid-voltage zero crossing equivalent. 
>>>>
>>>> One might make the trapezoid edge steeper at low synthesized 
>>>> frequencies and maybe incorporate more LSBish phase accumulator bits. 
>>>> Somehow. Seamlessly. 
>>>>
>>> You just multiply by 1/f, using saturating arithmetic. That keeps the 
>>> slope at the zero crossing the same at all frequencies, allows the same 
>>> amount of time for the filter to settle, produces nearly the same 
>>> settling artifacts, and so forth and so on. At high frequencies you 
>>> do it the normal way. 
>> 
>> and if you do it before the sine table you get sine shaped edges
>> 
>> sorta like S-shape acceleration/deceleration on a CNC/robot
>> limiting jerk
>> 
>
>Interesting point.
>
>Normally, dorking a rectangle window to try to reduce the ringing is
>somewhat disappointing--the first derivative is continuous, but the
>second isn't.  The ringing thus asymptotically goes like one more power
>of 1/t, which helps but isn't a complete fix.
>
>On the other hand, doing it your way has the important advantage that it
>switches seamlessly to the continuous-sinusoid case at high frequency,
>with no nasty artifacts at the changeover frequency.
>
>I like it.

Yes.  To which I'll add a bit of business from the radar world:  

One must shape the RF amplitude envelope to reduce harmonic
generation, to meet NTIA (National Telecommunications and Information
Administration)  regulations.  

While one can simply limit how small the rise and fall times can be,
this is often not quite enough for very powerful radars, and so the
pulse edges are shaped into a reasonable approximation of a Gaussian
CDF, which is a S-curve.  Or a hyperbolic tangent function.  So long
as no corners survive.

Joe Gwinn

On Fri, 19 Aug 2022 12:14:25 -0400, Phil Hobbs
<pcdhSpamMeSenseless@electrooptical.net> wrote:

>On 8/18/22 5:11 PM, John Larkin wrote:
>> On Thu, 18 Aug 2022 12:41:33 -0400, Phil Hobbs
>> <pcdhSpamMeSenseless@electrooptical.net> wrote:
>> 
>>> On 8/17/22 9:58 AM, jlarkin@highlandsniptechnology.com wrote:
>>>> On Wed, 17 Aug 2022 06:44:18 -0000 (UTC), Jasen Betts
>>>> <usenet@revmaps.no-ip.org> wrote:
>>>>
>>>>> On 2022-08-16, whit3rd <whit3rd@gmail.com> wrote:
>>>>>>
>>>>>> A smaller sine/cos table might be used with
>>>>>>
>>>>>> sine(a+b) = sine(a) cos(b) + cos(a)sine(b)
>>>>>>
>>>>>> as in, with small deviations 'b' from major steps in the table, two multiplies and
>>>>>> an add give you 2^20 different accurate sines from a 2^10 size sine table.
>>>>>> Since cos(b) will always be near unity ( 1 plus order of 2^-20 when b is under 2^-10),
>>>>>> you can make that one multiply and an add.    Perhaps that's what the 'phase
>>>>>> accumulator' is for, estimating the 'b'?
>>>>>
>>>>> AKA "CORDIC"
>>>>
>>>> In an FPGA, one could have the basic sine table and an interpolation
>>>> slope table and maybe just add. Do the math at compile time, not run
>>>> time.
>>>>
>>>> At some point, dac resolution becomes the limit, not sine table
>>>> resolution.
>>>>
>>>
>>> Apologies if somebody has pointed this out upthread--I didn't follow it all.
>>>
>>> If you have enough bits in the phase accumulator, and apply the right
>>> amount of numerical gain ahead of the DAC, you can always get a
>>> well-behaved trapezoidal waveform with a nice smooth fine-grained
>>> staircase near the zero crossing, which will filter well. (Saturating
>>> arithmetic is required, obviously.)
>>>
>>> You just need to make sure that the duration of the linear part is at
>>> least twice the filter's settling time (to the required accuracy), so
>>> that the ringing from the corner of the trapezoid has all settled out by
>>> the time you get to the zero crossing.  If you increase the numerical
>>> gain like 1/f, this works down to as low a frequency as you like.
>> 
>> Right. The trapezoid corner happens at an XO edge, which makes output
>> jitter, so the filter has to forget that corner but average as many
>> samples as it can along the linear slope. The trapezoid is not
>> bandlimited so violates the concept of the Sampling Theorem.
>> 
>> This argues for making the comparator trip at near the top of the
>> trapezoid, not the mid-voltage zero crossing equivalent.
>> 
>> One might make the trapezoid edge steeper at low synthesized
>> frequencies and maybe incorporate more LSBish phase accumulator bits.
>> Somehow. Seamlessly.
>> 
>
>You just multiply by 1/f, using saturating arithmetic.  That keeps the
>slope at the zero crossing the same at all frequencies, allows the same
>amount of time for the filter to settle, produces nearly the same
>settling artifacts, and so forth and so on.    At high frequencies you
>do it the normal way.

At low frequencies, we need to use more of the bits of the phase
accumulator, and equivalently more entries in the sine lookup table,
in order to keep pumping out DAC codes at a rate the filter can
smooth.

Multiplying a sine lookup integer by 1/f just makes the amplitide
jumps bigger. 

>
>You don't care about Nyquist here--you're a time domain guy, remember? ;)

Yes. Things like trapezoids and filter responses and jitter are better
thought about in time domain. But Nyquist still lurks and leers at us.



>
>Cheers
>
>Phil Hobbs

On Fri, 19 Aug 2022 09:22:35 -0700 (PDT), Lasse Langwadt Christensen
<langwadt@fonz.dk> wrote:

>fredag den 19. august 2022 kl. 18.14.35 UTC+2 skrev Phil Hobbs:
>> On 8/18/22 5:11 PM, John Larkin wrote: 
>> > On Thu, 18 Aug 2022 12:41:33 -0400, Phil Hobbs 
>> > <pcdhSpamM...@electrooptical.net> wrote: 
>> > 
>> >> On 8/17/22 9:58 AM, jla...@highlandsniptechnology.com wrote: 
>> >>> On Wed, 17 Aug 2022 06:44:18 -0000 (UTC), Jasen Betts 
>> >>> <use...@revmaps.no-ip.org> wrote: 
>> >>> 
>> >>>> On 2022-08-16, whit3rd <whi...@gmail.com> wrote: 
>> >>>>> 
>> >>>>> A smaller sine/cos table might be used with 
>> >>>>> 
>> >>>>> sine(a+b) = sine(a) cos(b) + cos(a)sine(b) 
>> >>>>> 
>> >>>>> as in, with small deviations 'b' from major steps in the table, two multiplies and 
>> >>>>> an add give you 2^20 different accurate sines from a 2^10 size sine table. 
>> >>>>> Since cos(b) will always be near unity ( 1 plus order of 2^-20 when b is under 2^-10), 
>> >>>>> you can make that one multiply and an add. Perhaps that's what the 'phase 
>> >>>>> accumulator' is for, estimating the 'b'? 
>> >>>> 
>> >>>> AKA "CORDIC" 
>> >>> 
>> >>> In an FPGA, one could have the basic sine table and an interpolation 
>> >>> slope table and maybe just add. Do the math at compile time, not run 
>> >>> time. 
>> >>> 
>> >>> At some point, dac resolution becomes the limit, not sine table 
>> >>> resolution. 
>> >>> 
>> >> 
>> >> Apologies if somebody has pointed this out upthread--I didn't follow it all. 
>> >> 
>> >> If you have enough bits in the phase accumulator, and apply the right 
>> >> amount of numerical gain ahead of the DAC, you can always get a 
>> >> well-behaved trapezoidal waveform with a nice smooth fine-grained 
>> >> staircase near the zero crossing, which will filter well. (Saturating 
>> >> arithmetic is required, obviously.) 
>> >> 
>> >> You just need to make sure that the duration of the linear part is at 
>> >> least twice the filter's settling time (to the required accuracy), so 
>> >> that the ringing from the corner of the trapezoid has all settled out by 
>> >> the time you get to the zero crossing. If you increase the numerical 
>> >> gain like 1/f, this works down to as low a frequency as you like. 
>> > 
>> > Right. The trapezoid corner happens at an XO edge, which makes output 
>> > jitter, so the filter has to forget that corner but average as many 
>> > samples as it can along the linear slope. The trapezoid is not 
>> > bandlimited so violates the concept of the Sampling Theorem. 
>> > 
>> > This argues for making the comparator trip at near the top of the 
>> > trapezoid, not the mid-voltage zero crossing equivalent. 
>> > 
>> > One might make the trapezoid edge steeper at low synthesized 
>> > frequencies and maybe incorporate more LSBish phase accumulator bits. 
>> > Somehow. Seamlessly. 
>> >
>> You just multiply by 1/f, using saturating arithmetic. That keeps the 
>> slope at the zero crossing the same at all frequencies, allows the same 
>> amount of time for the filter to settle, produces nearly the same 
>> settling artifacts, and so forth and so on. At high frequencies you 
>> do it the normal way. 
>
>and if you do it before the sine table you get sine shaped edges
>
>sorta like S-shape acceleration/deceleration on a CNC/robot
>limiting jerk

The "sine" table could have an s-shaped waveform to steepen the zero
crossing into the comparator. The waveform need not be time symmetric,
since the comparator only cares about the rising edge.

Sort of a soft sawtooth?

fredag den 19. august 2022 kl. 20.37.59 UTC+2 skrev John Larkin:
> On Fri, 19 Aug 2022 09:22:35 -0700 (PDT), Lasse Langwadt Christensen 
> <lang...@fonz.dk> wrote: 
> 
> >fredag den 19. august 2022 kl. 18.14.35 UTC+2 skrev Phil Hobbs: 
> >> On 8/18/22 5:11 PM, John Larkin wrote: 
> >> > On Thu, 18 Aug 2022 12:41:33 -0400, Phil Hobbs 
> >> > <pcdhSpamM...@electrooptical.net> wrote: 
> >> > 
> >> >> On 8/17/22 9:58 AM, jla...@highlandsniptechnology.com wrote: 
> >> >>> On Wed, 17 Aug 2022 06:44:18 -0000 (UTC), Jasen Betts 
> >> >>> <use...@revmaps.no-ip.org> wrote: 
> >> >>> 
> >> >>>> On 2022-08-16, whit3rd <whi...@gmail.com> wrote: 
> >> >>>>> 
> >> >>>>> A smaller sine/cos table might be used with 
> >> >>>>> 
> >> >>>>> sine(a+b) = sine(a) cos(b) + cos(a)sine(b) 
> >> >>>>> 
> >> >>>>> as in, with small deviations 'b' from major steps in the table, two multiplies and 
> >> >>>>> an add give you 2^20 different accurate sines from a 2^10 size sine table. 
> >> >>>>> Since cos(b) will always be near unity ( 1 plus order of 2^-20 when b is under 2^-10), 
> >> >>>>> you can make that one multiply and an add. Perhaps that's what the 'phase 
> >> >>>>> accumulator' is for, estimating the 'b'? 
> >> >>>> 
> >> >>>> AKA "CORDIC" 
> >> >>> 
> >> >>> In an FPGA, one could have the basic sine table and an interpolation 
> >> >>> slope table and maybe just add. Do the math at compile time, not run 
> >> >>> time. 
> >> >>> 
> >> >>> At some point, dac resolution becomes the limit, not sine table 
> >> >>> resolution. 
> >> >>> 
> >> >> 
> >> >> Apologies if somebody has pointed this out upthread--I didn't follow it all. 
> >> >> 
> >> >> If you have enough bits in the phase accumulator, and apply the right 
> >> >> amount of numerical gain ahead of the DAC, you can always get a 
> >> >> well-behaved trapezoidal waveform with a nice smooth fine-grained 
> >> >> staircase near the zero crossing, which will filter well. (Saturating 
> >> >> arithmetic is required, obviously.) 
> >> >> 
> >> >> You just need to make sure that the duration of the linear part is at 
> >> >> least twice the filter's settling time (to the required accuracy), so 
> >> >> that the ringing from the corner of the trapezoid has all settled out by 
> >> >> the time you get to the zero crossing. If you increase the numerical 
> >> >> gain like 1/f, this works down to as low a frequency as you like. 
> >> > 
> >> > Right. The trapezoid corner happens at an XO edge, which makes output 
> >> > jitter, so the filter has to forget that corner but average as many 
> >> > samples as it can along the linear slope. The trapezoid is not 
> >> > bandlimited so violates the concept of the Sampling Theorem. 
> >> > 
> >> > This argues for making the comparator trip at near the top of the 
> >> > trapezoid, not the mid-voltage zero crossing equivalent. 
> >> > 
> >> > One might make the trapezoid edge steeper at low synthesized 
> >> > frequencies and maybe incorporate more LSBish phase accumulator bits. 
> >> > Somehow. Seamlessly. 
> >> > 
> >> You just multiply by 1/f, using saturating arithmetic. That keeps the 
> >> slope at the zero crossing the same at all frequencies, allows the same 
> >> amount of time for the filter to settle, produces nearly the same 
> >> settling artifacts, and so forth and so on. At high frequencies you 
> >> do it the normal way. 
> > 
> >and if you do it before the sine table you get sine shaped edges 
> > 
> >sorta like S-shape acceleration/deceleration on a CNC/robot 
> >limiting jerk
> The "sine" table could have an s-shaped waveform to steepen the zero 
> crossing into the comparator. The waveform need not be time symmetric, 
> since the comparator only cares about the rising edge. 
> 
> Sort of a soft sawtooth?

why not a sine? https://imgur.com/6KqpCW9