Electronics-Related.com
Forums

Free/Open Source PCB autorouter in development; help wanted

Started by lynchaj July 9, 2011
On Sun, 10 Jul 2011 13:30:01 -0700, Joerg <invalid@invalid.invalid> wrote:

>John Larkin wrote: >> On Sun, 10 Jul 2011 12:36:39 -0700, Joerg <invalid@invalid.invalid> >> wrote: >> >>> John Larkin wrote: >>>> On Sun, 10 Jul 2011 00:25:08 -0700 (PDT), Glenn <glenn2233@gmail.com> >>>> wrote: >>>> >>>>> And why aren't we using asynchronous logic/circuits everywhere? >>>>> >>>>> Why do still relay on a global clock - it sucks ;-) >>>>> >>>>> It asks for glitches and to much power. >>>>> >>>>> Asynchronous circuit: >>>>> http://en.wikipedia.org/wiki/Asynchronous_circuit >>>> >>>> Look at the list of implementations. Looks to me like zero are >>>> commercially available. >>>> >>>> I read somewhere that parts of some x86 chips are/were async. >>>> >>>> Imagine designing a nontrivial state machine with async logic. >>>> >>>> Imagine simulating it. >>>> >>> Imagine running a noise-sensitive system such as an ultrasound scanner >>> if it had non-synchronous clocking. That would be horrid. >>> >>> [...] >> >> I assume that the switching noise would sort of happen all over the >> place, vaguely spread-spectrum, but would of course follow any and all >> signal inputs. Nightmare. >> >> Async logic is like multi-level logic, fuzzy logic, neural networks, >> and other recurrent fads. It might make sense as subsystems inside >> synchronous processes, like maybe a brutally parallel floating-point >> ALU. >> > >Yeah, what ever happened to fuzzy logic? 20-30 year ago it was all the >rage, now not much is heard about it anymore.
It's all Washington uses.
On Sun, 10 Jul 2011 13:30:01 -0700, the renowned Joerg
<invalid@invalid.invalid> wrote:
> >Yeah, what ever happened to fuzzy logic? 20-30 year ago it was all the >rage, now not much is heard about it anymore.
People are still getting papers out of it: http://sipi.usc.edu/~kosko/Preprint-SMC-B-Bayes-fuzzy-approximation-8April2011.pdf http://sipi.usc.edu/~kosko/SMCFinal.D05.pdf Best regards, Spehro Pefhany -- "it's the network..." "The Journey is the reward" speff@interlog.com Info for manufacturers: http://www.trexon.com Embedded software/hardware/analog Info for designers: http://www.speff.com
On 7/10/2011 7:46 AM, John Larkin wrote:

>>>>> >>>>> >>>>> All the times I've seen an autorouter used, it did horrible layouts. >>>>> Between the extensive setup, and the extensive cleanup, they haven't >>>>> been worth it. >>>> >>>> Autorouters for chips work pretty well. There is still cleanup to do on >>>> critical nets but processors (or most FPGA designs) wouldn't be possible >>>> without auto-placement/routing. >>> >>> Big digital ICs probably wouldn't be possible without autorouting, but >>> I bet there's a lot of human guidance involved, still. People are >>> still best at strategy. >>> >>> At the board level it seems they're of a lot >>>> less utility, perhaps because boards aren't "regular" and there is a lot to be >>>> gained by intuition. It could also be that there is a lot of the design that >>>> isn't stated in the schematic. I have a pretty good idea what a board should >>>> look like long before placement starts. >>> >>> Placement is key to routability. And auto-placers are worse than >>> auto-routers. >>> >>> The layout guy often seems to be in >>>> disagreement, though. ;-) He often doesn't even read the hints in the >>>> schematic ("layout notes"). :-( >>> >>> It's best to work in physical proximity to the layout person, and >>> interact. "Oh, I forgot to tell you, those clock lines can't run near >>> those output traces" or "flip that connector over, please." Our >>> manufacturing people get consulted, too, before it's too late. >>> >>>> >>>>> Besides, routing and designing pours is the fun part. >>>> >>>> Is that why you have the brat do it? >>> >>> I lay out a small board now and then, but I just don't have the time >>> to do serious boards. She just finished a laser controller that took >>> about three weeks. I do take her boards home and check/tweak them, >>> because I know stuff that she doesn't, or stuff we forgot to mention. >>> I mostly look at impedances, terminations, bypassing, and look for >>> obvious mistakes. I tweak the schematics for style, too. >>> >>> I often do placement for tricky sections, like GHz stuff, and let her >>> take over. >>> >>> We did screw up one board recently. It had been extensively design >>> reviewed, and two people, including me, checked the schematics and the >>> layout. None of the power nets (+5, +12, -12, ground) were connected >>> to pins on the VME connector. >>> >>> John >>> >> >> 100% routed by hand by me: >> >> http://www.rocketresearch.org/new/FPGA%20control%20module/FPGA%20control%20module%20PCB.png >> > > Nice. It shows a lot of strategy.
Thanks! cheers, Jamie
> > John > >
Back in the days of multiple parallel buses with lots of devices on
each bus, running fairly slowly, there was a need for a really good
auto-router. I have used the best (supposedly) and ultimately came up
with my first rule of board design.

All auto-routers are crap, although some are less crap than others.

Simple boards can be auto-routed by pressing go on the cheapest auto-
routers, complex boards take ages, you spend nearly as long driving
them as you would have spent hand routing and they always cost you at
least 2 extra layers.

I'm about to put a board through layout with three big FPGAs, about 40
Gigabytes of DDR3 on about 9 banks, a DSP, 10 Gigabit ethernet and a
couple of the latest and greatest ARMs. We have an unlimited CAD
budget and the autorouter is licensed but we won't use it. We will
have several contractors using mentors ability to have multiple users
working on the same database.

On the other hand the latest mentor cad system has excellent push and
shove with clever undo and very good length matching and all sorts of
other useful similar stuff which is fantastic for routing the sorts of
boards that the industry now makes. Any effort to open source this
sort of thing would be very welcome. Kicad and similar software is
still not hand routing friendly, at least not as friendly as my 15
year old copy of ORCAD (which has lots of other faults, but the hand
routing look and feel isn't one of them).

Colin
krw@att.bizzzzzzzzzzzz wrote:
> The layout guy often seems to be in > disagreement, though. ;-) He often doesn't even read the hints in > the schematic ("layout notes"). :-(
What are the academic requirements of a "layout guy" anyway? -- Reply in group, but if emailing add one more zero, and remove the last word.
On Mon, 11 Jul 2011 22:36:02 -0400, "Tom Del Rosso"
<td_03@verizon.net.invalid> wrote:

> >krw@att.bizzzzzzzzzzzz wrote: >> The layout guy often seems to be in >> disagreement, though. ;-) He often doesn't even read the hints in >> the schematic ("layout notes"). :-( > >What are the academic requirements of a "layout guy" anyway?
My kid does our PCB design, and she's very good and very fast. She went to Cornell, and majored in softball and beer pong. John
>Tom Del Rosso wrote: >>What are the academic requirements of a "layout guy" anyway? >>
John Larkin wrote:
>My kid does our PCB design, and she's very good and very fast. >She went to Cornell, and majored in softball and beer pong. >
What was her minor and with what other companies did she interview?
On Mon, 11 Jul 2011 22:36:02 -0400, "Tom Del Rosso"
<td_03@verizon.net.invalid> wrote:

> >krw@att.bizzzzzzzzzzzz wrote: >> The layout guy often seems to be in >> disagreement, though. ;-) He often doesn't even read the hints in >> the schematic ("layout notes"). :-( > >What are the academic requirements of a "layout guy" anyway?
For us? Dunno. He isn't an engineer (electrical, anyway) but has a lot of years experience with several other companies (including contracting for himself).
On Tue, 12 Jul 2011 18:23:08 -0500, "krw@att.bizzzzzzzzzzzz"
<krw@att.bizzzzzzzzzzzz> wrote:

>On Mon, 11 Jul 2011 22:36:02 -0400, "Tom Del Rosso" ><td_03@verizon.net.invalid> wrote: > >> >>krw@att.bizzzzzzzzzzzz wrote: >>> The layout guy often seems to be in >>> disagreement, though. ;-) He often doesn't even read the hints in >>> the schematic ("layout notes"). :-( >> >>What are the academic requirements of a "layout guy" anyway? > >For us? Dunno. He isn't an engineer (electrical, anyway) but has a lot of >years experience with several other companies (including contracting for >himself).
Interesting, but the best three layout people that I've known were all women, with no electronics education as such. John
On Tue, 12 Jul 2011 16:28:32 -0700, John Larkin
<jjlarkin@highNOTlandTHIStechnologyPART.com> wrote:

>On Tue, 12 Jul 2011 18:23:08 -0500, "krw@att.bizzzzzzzzzzzz" ><krw@att.bizzzzzzzzzzzz> wrote: > >>On Mon, 11 Jul 2011 22:36:02 -0400, "Tom Del Rosso" >><td_03@verizon.net.invalid> wrote: >> >>> >>>krw@att.bizzzzzzzzzzzz wrote: >>>> The layout guy often seems to be in >>>> disagreement, though. ;-) He often doesn't even read the hints in >>>> the schematic ("layout notes"). :-( >>> >>>What are the academic requirements of a "layout guy" anyway? >> >>For us? Dunno. He isn't an engineer (electrical, anyway) but has a lot of >>years experience with several other companies (including contracting for >>himself). > >Interesting, but the best three layout people that I've known were all >women, with no electronics education as such.
I don't find that too surprising; the artsy vs. logical thing. You've also mentioned before that you've not seen one female design engineer. Besides, sometimes the layouter needs to ask for directions. ;-)