On Sun, 10 Jul 2011 00:25:08 -0700 (PDT), Glenn <glenn2233@gmail.com> wrote:>And why aren't we using asynchronous logic/circuits everywhere? > >Why do still relay on a global clock - it sucks ;-) > >It asks for glitches and to much power. > >Asynchronous circuit: >http://en.wikipedia.org/wiki/Asynchronous_circuit >Quote: "... >Benefits >... >* Early completion of a circuit when it is known that the inputs which >have not yet arrived are irrelevant. >* 70% lower power consumption compared to synchronous design[3] >* Possibly lower power consumption because no transistor ever >transitions unless it is performing useful computation (clock gating >in synchronous designs is an imperfect approximation of this ideal). >Also, clock drivers can be removed which can significantly reduce >power consumption.... >... >* Better modularity and composability. >... >* Far fewer assumptions about the manufacturing process are required >(most assumptions are timing assumptions). >* Circuit speed adapts to changing temperature and voltage conditions >rather than being locked at the speed mandated by worst-case >assumptions. >* Immunity to transistor-to-transistor variability in the >manufacturing process, which is one of the most serious problems >facing the semiconductor industry as dies shrink. >* Less severe electromagnetic interference (EMI). Synchronous circuits >create a great deal of EMI in the frequency band at (or very near) >their clock frequency and its harmonics; asynchronous circuits >generate EMI patterns which are much more evenly spread across the >spectrum. >* In asynchronous circuits, local signaling eliminates the need for >global synchronization which exploits some potential advantages in >comparison with synchronous ones. They have shown potential >specifications in low power consumption, design reuse, improved noise >immunity and electromagnetic compatibility. Asynchronous circuits are >more tolerant to process variations and external voltage >fluctuations?[1]. >* Less stress on the power distribution network. Synchronous circuits >tend to draw a large amount of current right at the clock edge and >shortly thereafter.... >... >Disadvantages >..." > >Asynchronous logic: >http://apt.cs.man.ac.uk/async/ > >2/8/2006, ARM offers first clockless processor core: >http://www.eetimes.com/electronics-products/processors/4082174/ARM-offers-first-clockless-processor-core > >GlennMeta stable states?
Free/Open Source PCB autorouter in development; help wanted
Started by ●July 9, 2011
Reply by ●July 10, 20112011-07-10
Reply by ●July 10, 20112011-07-10
On 10 Jul., 13:07, Rich Webb <bbew...@mapson.nozirev.ten> wrote: ...> What is the unit cost of a ARM996HS-based processor? > > The ARM Cortex M3 was introduced at about the same time as the clockless > core touted above. Compare and contrast the number of units shipped. > > -- > Rich Webb =A0 =A0 Norfolk, VAHi Rich I think SmartMX P5CD072 is asynchronous: November 25, 2008, NXP Ships 100 millionth ePassport Chip: http://www.nxp.com/news/content/file_1504.html http://web.archive.org/web/20090201204323/www.handshakesolutions.com/Articl= e-15030.html http://www.nxp.com/products/identification_and_security/smart_card_ics/smar= tmx_contact_interface_controllers/ Quote: "... P5CC081UA Secure dual interface and contact PKI smart card controller ... low-power, performance optimized asynchronous technology. ..." The International Symposium on Asynchronous Circuits and Systems (ASYNC): http://asyncsymposium.org/ Quote: "... ASYNC 2012 will be co-located with the 6th ACM/IEEE International Symposium on Networks-on-Chip (NOCS 2012) ..." - Alta: The 4th generation switch chip from Fulcrum Microsystems: http://asyncsymposium.org/async2011/Program.html http://www.fulcrummicro.com/documents/products/FM4000_Product_Brief.pdf Quote: "... Process and Power The FM4000 Series devices are implemented in TSMC=92s 130nm FSG process and consume less than 1.5 Watt per active 10G interface with typical traffic activity. Unused interfaces that are disabled consume no power, and power scales directly with the level of activity. ..." http://www.minatec.org/nocs2010/programmes.htm Proteus Automated Design of GHz Asynchronous Circuits: http://www.minatec.org/nocs2010/Presentations/ASYNC2010%20-%20A3%20-%20Pete= r%20Beerel%20-%20Proteus%20-%20TimeLess%20Design%20Automation.pdf http://asyncsymposium.org/async2009/Program.html GHz Asynchronous SRAM in 65nm: http://asyncsymposium.org/async2009/slides/dama-async2009.pdf - I do not know for shure if this chip is genuinely Asynchronous: June 2, 2011, Qualcomm=92s Dual-core is asynchronous, demonstrated at Computex 2011: http://armdevices.net/2011/06/02/qualcomms-dual-core-is-asynchronous-demons= trated-at-computex-2011/ Qualcomm's Dual-core is asynchronous, demonstrated at Computex 2011: http://www.youtube.com/watch?v=3D8qAemoivm30 MSM8660 Apr 2nd 2011, Qualcomm's 1.5GHz dual-core MSM8660 destroys the competition in majestic benchmark run: http://www.engadget.com/2011/04/02/qualcomms-1-5ghz-dual-core-msm8660-destr= oys-the-competition-in/ http://developer.qualcomm.com/dev/development-devices/snapdragon-mdp Video: http://www.qualcomm.com/partials/service/video/20559?primary=3D0xffffff&sec= ondary=3D0xffffff&simple_endScreen=3Dtrue&disable_embed=3Dtrue&disable_send= =3Dtrue&send_mailto=3Dtrue&disable_embedViewMore=3Dtrue&simple_infoPanel=3D= true&iframe=3Dtrue Glenn
Reply by ●July 10, 20112011-07-10
On Sun, 10 Jul 2011 06:20:42 -0700 (PDT), Glenn <glenn2233@gmail.com> wrote:>On 10 Jul., 13:07, Rich Webb <bbew...@mapson.nozirev.ten> wrote: >... >> What is the unit cost of a ARM996HS-based processor? >> >> The ARM Cortex M3 was introduced at about the same time as the clockless >> core touted above. Compare and contrast the number of units shipped. >> >> -- >> Rich Webb � � Norfolk, VA > >Hi Rich > >I think SmartMX P5CD072 is asynchronous:Why in the world would you think that? Even a brief look at the datasheet reveals lots of discussion of clocks, CLOCKSTOP sleep modes, and tidbits like an architecture built around a "dedicated Secure_MX51 Smart Card CPU (Memory eXtended/enhanced 80C51)." 8051?! "Asynchronous" isn't even mentioned in the datasheet. Sorry. Looks like you're just a troll. Bye bye. -- Rich Webb Norfolk, VA
Reply by ●July 10, 20112011-07-10
On Sat, 09 Jul 2011 23:08:36 -0700, Jamie <jmorken@shaw.ca> wrote:>On 7/9/2011 1:24 PM, John Larkin wrote: > >>>>> -----BEGIN PGP SIGNED MESSAGE----- >>>>> Hash: SHA1 >>>>> >>>>> Hi All, >>>>> >>>>> I'm working on a project here >>>>> http://sourceforge.net/projects/qautorouter/ >>>>> >>>>> It is an auto-router that is written in C++ on Qt application >>>>> framework, >>>>> reads/writes specctra file format and uses a plug-in style of >>>>> interface >>>>> for the router engines. >>>>> >>>>> It is very alpha at this stage, I have much of the UI, file I/O, and >>>>> the >>>>> plug-in API operational. I am working on a "Simple Router" plug-in at >>>>> the moment that is implementing a simplified version of the expanding >>>>> box algorithm. The Simple Router will be used as a sort of template >>>>> for >>>>> debugging the plugin-api and as a template for developing more >>>>> sophisticated plug-ins. Toporouter would be a good one. >>>>> >>>>> In any case, it would be great to get a few other people on-board, a >>>>> developer or two that is quite proficient in C++ would be very >>>>> helpful, >>>>> some hands-on with Qt would help a lot too. >>>>> >>>>> Someone to look after the Windows(tm) and Mac OS-X build and release >>>>> would be very helpful. >>>>> >>>>> Someone to help with packaging; windows installer, Mac OSX installer, >>>>> and linux .deb, .rpm packages would be helpful as well. >>>>> >>>>> If you're interested, please just send me a little about what you can >>>>> contribute, and your sourceforge id. >>>>> >>>>> Kind Regards, >>>>> >>>>> Mike Sharkey >>>>> >>>>> -----BEGIN PGP SIGNATURE----- >>>>> Version: GnuPG v1.4.10 (GNU/Linux) >>>>> Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org/ >>>>> >>>>> iQEcBAEBAgAGBQJOEAlnAAoJEEzVYN3s3Af7lqIIALSmDzQGxAjYBIcZsAcjw++D >>>>> gw8LQAvUytUY+4xX6kVkdeA+wjvywZw0+OZKoZXeOjvY39ZNMayKvzWN4zBoUjbc >>>>> YMSx9wZ7j6QYU9EBh25hpyGmMg97L5XubY/6zRV/xkvSs9qm8/gMyayBBVBU0sMM >>>>> 43blOHuELx5WYsFS2uyz/WLWE8vdpxWnDpsqfxOvp2aaRZzzEzvuP5rnj7XTN9KV >>>>> TCFe+vT/auZZIEfKzGe9lYLMHgBpccBCr0IYOiRRS3LuCytTTnoscTdzXCiTX1sE >>>>> iNBJqbMHjrb64oOs+6P4x10gOSQB8rSRmFOlpQG8puNk7ZRh6ggFxgRTzYM3oZc= >>>>> =abfU >>>>> -----END PGP SIGNATURE----- >>>> >>>> >>>> All the times I've seen an autorouter used, it did horrible layouts. >>>> Between the extensive setup, and the extensive cleanup, they haven't >>>> been worth it. >>> >>> Autorouters for chips work pretty well. There is still cleanup to do on >>> critical nets but processors (or most FPGA designs) wouldn't be possible >>> without auto-placement/routing. >> >> Big digital ICs probably wouldn't be possible without autorouting, but >> I bet there's a lot of human guidance involved, still. People are >> still best at strategy. >> >> At the board level it seems they're of a lot >>> less utility, perhaps because boards aren't "regular" and there is a lot to be >>> gained by intuition. It could also be that there is a lot of the design that >>> isn't stated in the schematic. I have a pretty good idea what a board should >>> look like long before placement starts. >> >> Placement is key to routability. And auto-placers are worse than >> auto-routers. >> >> The layout guy often seems to be in >>> disagreement, though. ;-) He often doesn't even read the hints in the >>> schematic ("layout notes"). :-( >> >> It's best to work in physical proximity to the layout person, and >> interact. "Oh, I forgot to tell you, those clock lines can't run near >> those output traces" or "flip that connector over, please." Our >> manufacturing people get consulted, too, before it's too late. >> >>> >>>> Besides, routing and designing pours is the fun part. >>> >>> Is that why you have the brat do it? >> >> I lay out a small board now and then, but I just don't have the time >> to do serious boards. She just finished a laser controller that took >> about three weeks. I do take her boards home and check/tweak them, >> because I know stuff that she doesn't, or stuff we forgot to mention. >> I mostly look at impedances, terminations, bypassing, and look for >> obvious mistakes. I tweak the schematics for style, too. >> >> I often do placement for tricky sections, like GHz stuff, and let her >> take over. >> >> We did screw up one board recently. It had been extensively design >> reviewed, and two people, including me, checked the schematics and the >> layout. None of the power nets (+5, +12, -12, ground) were connected >> to pins on the VME connector. >> >> John >> > >100% routed by hand by me: > >http://www.rocketresearch.org/new/FPGA%20control%20module/FPGA%20control%20module%20PCB.png >Nice. It shows a lot of strategy. John
Reply by ●July 10, 20112011-07-10
On Sun, 10 Jul 2011 00:25:08 -0700 (PDT), Glenn <glenn2233@gmail.com> wrote:>And why aren't we using asynchronous logic/circuits everywhere? > >Why do still relay on a global clock - it sucks ;-) > >It asks for glitches and to much power. > >Asynchronous circuit: >http://en.wikipedia.org/wiki/Asynchronous_circuitLook at the list of implementations. Looks to me like zero are commercially available. I read somewhere that parts of some x86 chips are/were async. Imagine designing a nontrivial state machine with async logic. Imagine simulating it. I do occasional async logic, small stuff. My co-workers are horrified. But it doesn't scale. John
Reply by ●July 10, 20112011-07-10
On Sun, 10 Jul 2011 08:01:18 -0700, John Larkin <jjlarkin@highNOTlandTHIStechnologyPART.com> wrote:>On Sun, 10 Jul 2011 00:25:08 -0700 (PDT), Glenn <glenn2233@gmail.com> >wrote: > >>And why aren't we using asynchronous logic/circuits everywhere? >> >>Why do still relay on a global clock - it sucks ;-) >> >>It asks for glitches and to much power. >> >>Asynchronous circuit: >>http://en.wikipedia.org/wiki/Asynchronous_circuit > > >Look at the list of implementations. Looks to me like zero are >commercially available. > >I read somewhere that parts of some x86 chips are/were async.It appears that there are "asynchronous dual core" CPUs out there, but in this case the asynchrosity (?) relates to the ability to put the cores to sleep independently, rather than to a processor core built out of non-clocked combinatorial logic. -- Rich Webb Norfolk, VA
Reply by ●July 10, 20112011-07-10
John Larkin wrote:> On Sun, 10 Jul 2011 00:25:08 -0700 (PDT), Glenn <glenn2233@gmail.com> > wrote: > >> And why aren't we using asynchronous logic/circuits everywhere? >> >> Why do still relay on a global clock - it sucks ;-) >> >> It asks for glitches and to much power. >> >> Asynchronous circuit: >> http://en.wikipedia.org/wiki/Asynchronous_circuit > > > Look at the list of implementations. Looks to me like zero are > commercially available. > > I read somewhere that parts of some x86 chips are/were async. > > Imagine designing a nontrivial state machine with async logic. > > Imagine simulating it. >Imagine running a noise-sensitive system such as an ultrasound scanner if it had non-synchronous clocking. That would be horrid. [...] -- Regards, Joerg http://www.analogconsultants.com/
Reply by ●July 10, 20112011-07-10
On Sun, 10 Jul 2011 12:36:39 -0700, Joerg <invalid@invalid.invalid> wrote:>John Larkin wrote: >> On Sun, 10 Jul 2011 00:25:08 -0700 (PDT), Glenn <glenn2233@gmail.com> >> wrote: >> >>> And why aren't we using asynchronous logic/circuits everywhere? >>> >>> Why do still relay on a global clock - it sucks ;-) >>> >>> It asks for glitches and to much power. >>> >>> Asynchronous circuit: >>> http://en.wikipedia.org/wiki/Asynchronous_circuit >> >> >> Look at the list of implementations. Looks to me like zero are >> commercially available. >> >> I read somewhere that parts of some x86 chips are/were async. >> >> Imagine designing a nontrivial state machine with async logic. >> >> Imagine simulating it. >> > >Imagine running a noise-sensitive system such as an ultrasound scanner >if it had non-synchronous clocking. That would be horrid. > >[...]I assume that the switching noise would sort of happen all over the place, vaguely spread-spectrum, but would of course follow any and all signal inputs. Nightmare. Async logic is like multi-level logic, fuzzy logic, neural networks, and other recurrent fads. It might make sense as subsystems inside synchronous processes, like maybe a brutally parallel floating-point ALU. John
Reply by ●July 10, 20112011-07-10
John Larkin wrote:> On Sun, 10 Jul 2011 12:36:39 -0700, Joerg <invalid@invalid.invalid> > wrote: > >> John Larkin wrote: >>> On Sun, 10 Jul 2011 00:25:08 -0700 (PDT), Glenn <glenn2233@gmail.com> >>> wrote: >>> >>>> And why aren't we using asynchronous logic/circuits everywhere? >>>> >>>> Why do still relay on a global clock - it sucks ;-) >>>> >>>> It asks for glitches and to much power. >>>> >>>> Asynchronous circuit: >>>> http://en.wikipedia.org/wiki/Asynchronous_circuit >>> >>> Look at the list of implementations. Looks to me like zero are >>> commercially available. >>> >>> I read somewhere that parts of some x86 chips are/were async. >>> >>> Imagine designing a nontrivial state machine with async logic. >>> >>> Imagine simulating it. >>> >> Imagine running a noise-sensitive system such as an ultrasound scanner >> if it had non-synchronous clocking. That would be horrid. >> >> [...] > > I assume that the switching noise would sort of happen all over the > place, vaguely spread-spectrum, but would of course follow any and all > signal inputs. Nightmare. > > Async logic is like multi-level logic, fuzzy logic, neural networks, > and other recurrent fads. It might make sense as subsystems inside > synchronous processes, like maybe a brutally parallel floating-point > ALU. >Yeah, what ever happened to fuzzy logic? 20-30 year ago it was all the rage, now not much is heard about it anymore. -- Regards, Joerg http://www.analogconsultants.com/
Reply by ●July 10, 20112011-07-10
On Sun, 10 Jul 2011 12:53:31 -0700, John Larkin <jjlarkin@highNOTlandTHIStechnologyPART.com> wrote:>On Sun, 10 Jul 2011 12:36:39 -0700, Joerg <invalid@invalid.invalid> >wrote: > >>John Larkin wrote: >>> On Sun, 10 Jul 2011 00:25:08 -0700 (PDT), Glenn <glenn2233@gmail.com> >>> wrote: >>> >>>> And why aren't we using asynchronous logic/circuits everywhere? >>>> >>>> Why do still relay on a global clock - it sucks ;-) >>>> >>>> It asks for glitches and to much power. >>>> >>>> Asynchronous circuit: >>>> http://en.wikipedia.org/wiki/Asynchronous_circuit >>> >>> >>> Look at the list of implementations. Looks to me like zero are >>> commercially available. >>> >>> I read somewhere that parts of some x86 chips are/were async. >>> >>> Imagine designing a nontrivial state machine with async logic. >>> >>> Imagine simulating it. >>> >> >>Imagine running a noise-sensitive system such as an ultrasound scanner >>if it had non-synchronous clocking. That would be horrid. >> >>[...] > >I assume that the switching noise would sort of happen all over the >place, vaguely spread-spectrum, but would of course follow any and all >signal inputs. Nightmare. > >Async logic is like multi-level logic, fuzzy logic, neural networks, >and other recurrent fads. It might make sense as subsystems inside >synchronous processes, like maybe a brutally parallel floating-point >ALU.Domino logic is pretty common for such things. It's set up synchronously and sampled synchronously but in between it's dominoes. ;-)
