There is a new-to-me power supply architecture, an H-bridge driving a load, but with the phases on the two sides slid around to control delivered power. TI does that in some chips, like UCC2895. I may have seen the architecture first in this ng. Anyhow, I was thinking about a high-voltage power supply with the phase-shifted bridge driving a series-resonant transformer. https://www.dropbox.com/scl/fi/tbiioti0gt2emknjc61p7/Res_HV_Supply.jpg?rlkey=f1gryr8vr4jdu2y46wsz6ch2k&raw=1 I wonder if one of the cores of an RP2040 could do this without an FPGA. It would of course need a voltage feedback loop in software too.
HV power supply maybe
Started by ●January 3, 2024
Reply by ●January 3, 20242024-01-03
onsdag den 3. januar 2024 kl. 20.29.19 UTC+1 skrev john larkin:> There is a new-to-me power supply architecture, an H-bridge driving a > load, but with the phases on the two sides slid around to control > delivered power. TI does that in some chips, like UCC2895. I may have > seen the architecture first in this ng. > > Anyhow, I was thinking about a high-voltage power supply with the > phase-shifted bridge driving a series-resonant transformer. > > https://www.dropbox.com/scl/fi/tbiioti0gt2emknjc61p7/Res_HV_Supply.jpg?rlkey=f1gryr8vr4jdu2y46wsz6ch2k&raw=1 > > I wonder if one of the cores of an RP2040 could do this without an > FPGA. It would of course need a voltage feedback loop in software too.should easily do that with the PIOs
Reply by ●January 3, 20242024-01-03
john larkin <jl@650pot.com> wrote:> > There is a new-to-me power supply architecture, an H-bridge driving a > load, but with the phases on the two sides slid around to control > delivered power. TI does that in some chips, like UCC2895. I may have > seen the architecture first in this ng. > > Anyhow, I was thinking about a high-voltage power supply with the > phase-shifted bridge driving a series-resonant transformer. > > https://www.dropbox.com/scl/fi/tbiioti0gt2emknjc61p7/Res_HV_Supply.jpg?rlkey=f1gryr8vr4jdu2y46wsz6ch2k&raw=1 > > I wonder if one of the cores of an RP2040 could do this without an > FPGA. It would of course need a voltage feedback loop in software too. > > >Yes, I first read about phase shifted bridge 1990 in ED or maybe EDN. Because all the gates are driven 50:50 it lends itself easily to gate transformer drive. Going into an LLC is very workable. I am thinking of using that topology myself. I thought it was novel until I found a TRW paper from the early 1960s ! -- piglet
Reply by ●January 3, 20242024-01-03
On Wed, 3 Jan 2024 12:44:24 -0800 (PST), Lasse Langwadt Christensen <langwadt@fonz.dk> wrote:>onsdag den 3. januar 2024 kl. 20.29.19 UTC+1 skrev john larkin: >> There is a new-to-me power supply architecture, an H-bridge driving a >> load, but with the phases on the two sides slid around to control >> delivered power. TI does that in some chips, like UCC2895. I may have >> seen the architecture first in this ng. >> >> Anyhow, I was thinking about a high-voltage power supply with the >> phase-shifted bridge driving a series-resonant transformer. >> >> https://www.dropbox.com/scl/fi/tbiioti0gt2emknjc61p7/Res_HV_Supply.jpg?rlkey=f1gryr8vr4jdu2y46wsz6ch2k&raw=1 >> >> I wonder if one of the cores of an RP2040 could do this without an >> FPGA. It would of course need a voltage feedback loop in software too. > >should easily do that with the PIOsIf I did a 2-channel HV supply, that would need, I guess, three square waves. On as the "reference" side of both supplies, and then a phase shiftable square wave for each supply. The frequency might be, say, 50 to 100 KHz and I'd want to shift the phases with 10s of ns resolution. Probably needs an FPGA.
Reply by ●January 3, 20242024-01-03
onsdag den 3. januar 2024 kl. 20.29.19 UTC+1 skrev john larkin:> There is a new-to-me power supply architecture, an H-bridge driving a > load, but with the phases on the two sides slid around to control > delivered power. TI does that in some chips, like UCC2895. I may have > seen the architecture first in this ng. > > Anyhow, I was thinking about a high-voltage power supply with the > phase-shifted bridge driving a series-resonant transformer. > > https://www.dropbox.com/scl/fi/tbiioti0gt2emknjc61p7/Res_HV_Supply.jpg?rlkey=f1gryr8vr4jdu2y46wsz6ch2k&raw=1 > > I wonder if one of the cores of an RP2040 could do this without an > FPGA. It would of course need a voltage feedback loop in software too.I wonder if regular pwm into an FF clocked by raising and one FF clocked by falling give you the two signals?
Reply by ●January 3, 20242024-01-03
On Wed, 3 Jan 2024 22:56:13 -0000 (UTC), piglet <erichpwagner@hotmail.com> wrote:>john larkin <jl@650pot.com> wrote: >> >> There is a new-to-me power supply architecture, an H-bridge driving a >> load, but with the phases on the two sides slid around to control >> delivered power. TI does that in some chips, like UCC2895. I may have >> seen the architecture first in this ng. >> >> Anyhow, I was thinking about a high-voltage power supply with the >> phase-shifted bridge driving a series-resonant transformer. >> >> https://www.dropbox.com/scl/fi/tbiioti0gt2emknjc61p7/Res_HV_Supply.jpg?rlkey=f1gryr8vr4jdu2y46wsz6ch2k&raw=1 >> >> I wonder if one of the cores of an RP2040 could do this without an >> FPGA. It would of course need a voltage feedback loop in software too. >> >> >> > >Yes, I first read about phase shifted bridge 1990 in ED or maybe EDN. >Because all the gates are driven 50:50 it lends itself easily to gate >transformer drive.It is more elegant than PWM.> >Going into an LLC is very workable. I am thinking of using that topology >myself. I thought it was novel until I found a TRW paper from the early >1960s !I hate it when my brilliant inventions turn out to be 50 years old. Series resonating gives a free voltage boost and takes out the transformer parasitics and probably reduces spike noise.
Reply by ●January 3, 20242024-01-03
On Wed, 3 Jan 2024 15:41:57 -0800 (PST), Lasse Langwadt Christensen <langwadt@fonz.dk> wrote:>onsdag den 3. januar 2024 kl. 20.29.19 UTC+1 skrev john larkin: >> There is a new-to-me power supply architecture, an H-bridge driving a >> load, but with the phases on the two sides slid around to control >> delivered power. TI does that in some chips, like UCC2895. I may have >> seen the architecture first in this ng. >> >> Anyhow, I was thinking about a high-voltage power supply with the >> phase-shifted bridge driving a series-resonant transformer. >> >> https://www.dropbox.com/scl/fi/tbiioti0gt2emknjc61p7/Res_HV_Supply.jpg?rlkey=f1gryr8vr4jdu2y46wsz6ch2k&raw=1 >> >> I wonder if one of the cores of an RP2040 could do this without an >> FPGA. It would of course need a voltage feedback loop in software too. > >I wonder if regular pwm into an FF clocked by raising and one FF clocked by falling give you the two signals?Yeah, the RP2040 has some fancy counter-timers. Maybe they can do it, possibly with a little help.
Reply by ●January 3, 20242024-01-03
torsdag den 4. januar 2024 kl. 00.42.02 UTC+1 skrev john larkin:> On Wed, 3 Jan 2024 12:44:24 -0800 (PST), Lasse Langwadt Christensen > <lang...@fonz.dk> wrote: > > >onsdag den 3. januar 2024 kl. 20.29.19 UTC+1 skrev john larkin: > >> There is a new-to-me power supply architecture, an H-bridge driving a > >> load, but with the phases on the two sides slid around to control > >> delivered power. TI does that in some chips, like UCC2895. I may have > >> seen the architecture first in this ng. > >> > >> Anyhow, I was thinking about a high-voltage power supply with the > >> phase-shifted bridge driving a series-resonant transformer. > >> > >> https://www.dropbox.com/scl/fi/tbiioti0gt2emknjc61p7/Res_HV_Supply.jpg?rlkey=f1gryr8vr4jdu2y46wsz6ch2k&raw=1 > >> > >> I wonder if one of the cores of an RP2040 could do this without an > >> FPGA. It would of course need a voltage feedback loop in software too. > > > >should easily do that with the PIOs > If I did a 2-channel HV supply, that would need, I guess, three square > waves. On as the "reference" side of both supplies, and then a phase > shiftable square wave for each supply. > > The frequency might be, say, 50 to 100 KHz and I'd want to shift the > phases with 10s of ns resolution. Probably needs an FPGA.PIOs run at the full up to 133MHz pico clock
Reply by ●January 3, 20242024-01-03
On Thursday, January 4, 2024 at 10:57:28 AM UTC+11, Lasse Langwadt Christensen wrote:> torsdag den 4. januar 2024 kl. 00.42.02 UTC+1 skrev john larkin: > > On Wed, 3 Jan 2024 12:44:24 -0800 (PST), Lasse Langwadt Christensen > > <lang...@fonz.dk> wrote: onsdag den 3. januar 2024 kl. 20.29.19 UTC+1 skrev john larkin: > > >> There is a new-to-me power supply architecture, an H-bridge driving a > > >> load, but with the phases on the two sides slid around to control > > >> delivered power. TI does that in some chips, like UCC2895. I may have > > >> seen the architecture first in this ng. > > >> > > >> Anyhow, I was thinking about a high-voltage power supply with the > > >> phase-shifted bridge driving a series-resonant transformer. > > >> > > >> https://www.dropbox.com/scl/fi/tbiioti0gt2emknjc61p7/Res_HV_Supply.jpg?rlkey=f1gryr8vr4jdu2y46wsz6ch2k&raw=1 > > >> > > >> I wonder if one of the cores of an RP2040 could do this without an > > >> FPGA. It would of course need a voltage feedback loop in software too. > > > > > >should easily do that with the PIOs > > If I did a 2-channel HV supply, that would need, I guess, three square > > waves. On as the "reference" side of both supplies, and then a phase > > shiftable square wave for each supply. > > > > The frequency might be, say, 50 to 100 KHz and I'd want to shift the > > phases with 10s of ns resolution. Probably needs an FPGA. > PIOs run at the full up to 133MHz pico clockhttps://www.onsemi.com/pdf/datasheet/mc100ep196-d.pdf offers up to 10.6nsec digitally tunable in steps of 10ps and is analog fine tunable below that. Similar parts from Motorola date back to about the early 1990's. The delay has some temperature drift, but if you are fine tuning for a specific output voltage the feedback loop can take that out. -- Bill Sloman, Sydney
Reply by ●January 3, 20242024-01-03
On 4/01/2024 10:47 am, john larkin wrote:> On Wed, 3 Jan 2024 22:56:13 -0000 (UTC), piglet > <erichpwagner@hotmail.com> wrote: > >> john larkin <jl@650pot.com> wrote: >>> >>> There is a new-to-me power supply architecture, an H-bridge driving a >>> load, but with the phases on the two sides slid around to control >>> delivered power. TI does that in some chips, like UCC2895. I may have >>> seen the architecture first in this ng. >>> >>> Anyhow, I was thinking about a high-voltage power supply with the >>> phase-shifted bridge driving a series-resonant transformer. >>> >>> https://www.dropbox.com/scl/fi/tbiioti0gt2emknjc61p7/Res_HV_Supply.jpg?rlkey=f1gryr8vr4jdu2y46wsz6ch2k&raw=1 >>> >>> I wonder if one of the cores of an RP2040 could do this without an >>> FPGA. It would of course need a voltage feedback loop in software too >> >> Yes, I first read about phase shifted bridge 1990 in ED or maybe EDN. >> Because all the gates are driven 50:50 it lends itself easily to gate >> transformer drive. > > It is more elegant than PWM. > >> Going into an LLC is very workable. I am thinking of using that topology >> myself. I thought it was novel until I found a TRW paper from the early >> 1960s ! > > I hate it when my brilliant inventions turn out to be 50 years old.But it's nice when a neat, but impractical, idea you had in 1975 turns out to be useful in 1993 when the technology had moved on a bit. Most inventions get invented in several places at much the same time, but this one wasn't.> Series resonating gives a free voltage boost and takes out the > transformer parasitics and probably reduces spike noise.Some of the parasitics, and as long as there is switching there is always some switching noise. And you can do some fine phase shifting on clock edges with the MC100EP195/6 part - 10psec steps on an up to 10.6nsec delay, and the MC100EO196 lets you (slowly) analog tweak below that. -- Bill Sloman, Sydney
