On 07/11/2022 9:04 pm, Lamont Cranston wrote:> On Monday, November 7, 2022 at 1:37:09 PM UTC-6, erichp...@hotmail.com wrote: > >>> Thanks, Mikek >> The BJT is a jelly bean NPN, I suspect typo for the once popular 2N3643 >> (I found some in my junk box even!). Use 2N3904 or 2N2222 or BC548 >> whatever. The BF256 you used in the first version should be a fine >> substitute for 2N4416 - they are both listed as process 50 parts. >> >> 1uF is crazy too big unless do infrasound. Electrolytic leakage would be >> terrible at the front end. For the gate bias bootstrap even 1nF is >> massive, you can probably omit that part since even 10meg from the >> unbootstrapped resistor is more than you are aiming at. For the drain >> bootstrap a capacitor of 0.01uF would be OK down to a few kHz. I think >> your range is 0.5-30MHz? >> >> Everything between your Zin input test resistance and the gate should >> have minimal stray capacity - i.e. built up in the air a few mm above >> the board. >> >> piglet > > If you haven't read my previous post, IT WORKS! > I used the BF256C and MPHS10. > I understand the 1uF is wrong, and it should be 0.1uF. > I'll be changing both. > I had some internal debate, on how to place the 2.2MΩ, 1MΩ voltage divider that drives the 10MΩ gate resistor. > So, I ended up running the input under the 2.2MΩ resistor, I have removed the ground plane from both sides > of the pcb in that area. > Thank, MikekI am very pleased for you. Thanks for letting us know. My first reply mentioned bootstrapping away the drain capacity and that seems (along with minimising wiring strays) to have been one of the factors. You might be able to get rid of the gate bias bootstrap since at your frequencies it won't be helping much? piglet
Help with high input impedance amp.
Started by ●November 5, 2022
Reply by ●November 7, 20222022-11-07
Reply by ●November 7, 20222022-11-07
I have added the bypass caps and changed the 1uF to 0.1uF. Also fixed the lack of ground on the input, it was soldered but I had cut the foil to that section of ground plane. grounding the input made it susceptible to a 200MHz oscillation, comes and goes depending position, if I'm reaching to adjust the sig gen and maybe how I'm holding my tongue. I"ll try the bead and if the doesn't help, I'll shorten the FET leads. After the changes it is a lot tamer, it is a very gradual rise in amplitude as frequency increase, no peak (at least to 30MHz) and only 6% from 1MHz to 30MHz. Ok, I just added a piece of aluminum foil on the underside of the pcb to act as a ground plane That makes takes away the level rise with frequency, much better. Also no more 200MHz oscillation seen. I'll try a more permanent underside ground plane, I have some wide copper tape, I'll apply and solder. I added a underside groundplane, it tamed the 200MHz oscillation and flattened the response. Here's a picture at ~1MHz and 30MHz, only a 2% rise at 30MHz. https://www.dropbox.com/s/svdhh7mmr52hxcj/Linear%20freq%20response.jpg?dl=0 Mikek
Reply by ●November 8, 20222022-11-08
piglet wrote:> Fred Bloggs wrote: >> Lamont Cranston wrote: >>> Fred Bloggs wrote: >>>> Lamont Cranston wrote: >>>>> Years ago on this group, someone worked this circuit out for me and I >>>>> have finally built it. It has two problems. The input impedance is about >>>>> 30kΩ not 500MΩ, and it rolls of way to early. >>>>> I may have created the problems, I don't have the FET and transistor >>>>> recommended, 2N4416 and MMBTH10. I used a BF256C and a MPSH10 through hole >>>>> parts. Although I doubt that created the low input impedance. >>>>> https://www.dropbox.com/s/kdwhcxmbk53ugqm/Dagmar%27s%20Fast%20high%20Imp%20amp%20with%20voltage%20labelsand%20RF%20voltages.jpg?dl=0 >>>>> Anyone care to tell me why such low input impedance and how to make the >>>>> frequency flat to 30MHz? >>>>> Mikek >>>> You have something in the drain of T1 introducing excessive negative >>>> feedback on the gate drive. That's only way to explain the combination >>>> low input impedance and low frequency gain rolloff. If you can't do better >>>> with your layout, install a high frequency decoupling capacitor at T1 drain >>>> to ground there. >>> I installed a small cap right at the drain to ground, no change. >>> I'm posting a picture of the PCB, to learn, not for harassment. :-) Tempted >>> to shrink the the picture, but no. >>> Note: I have changed semi conductors about 6 times. >>> https://www.dropbox.com/s/w8psnbud9b6z2se/PCB.jpg?dl=0 >>> I have had the A, B, and C dc voltages vary over the various T1, Q2 changes >>> , as I write I get A=2.4, B= 6.5 and C=5.8. >>> My first dc measurements were A=1.48 B=8.55 and C=7.83. I have also had >>> A=1.0, B= 5.24, and C=4.63. (A is altered by the 10MΩ meter impedance.) >>> This doesn't have much effect on Gain. >>> Mikek >> >> Okay I was afraid of that. It's intrinsic to your FET/ construction, >> assuming your signal source is 50R or even remotely close. Looking at >> your circuit board, it looks like you may have significant coupling >> capacitance shunts to ac ground all over the place. The most damaging >> ones will be at high impedance nodes. That will do it. > > Good point. If the pcb is double sided with vast ground plane then the > strays to ground might explain all. Perhaps Lamont/Mikek can try peeling > off a section of groundplane under the gate nodes and measure if there > is an improvement.This seems like a big part of the solution given how Mikek's circuit now functions (even with wrong component values) on his new PCB with a minimal groundplane. Danke, -- Don, KB7RPU, https://www.qsl.net/kb7rpu There was a young lady named Bright Whose speed was far faster than light; She set out one day In a relative way And returned on the previous night.
Reply by ●November 8, 20222022-11-08
Anyone care to look at this Chinese design for a high input impedance amp, and give me their thoughts about it? Two FETs, two transistors, a little different than I have been looking at. https://www.dropbox.com/s/ypvmq9ushs4d2cf/High%20input%20impedance%20amp%20Chinese%20Crystal%20Radio%20Forum.jpg?dl=0 Thanks, Mikek
Reply by ●November 8, 20222022-11-08
On Tuesday, November 8, 2022 at 6:05:45 PM UTC-4, Lamont Cranston wrote:> Anyone care to look at this Chinese design for a high input impedance amp, > and give me their thoughts about it? > Two FETs, two transistors, a little different than I have been looking at. > https://www.dropbox.com/s/ypvmq9ushs4d2cf/High%20input%20impedance%20amp%20Chinese%20Crystal%20Radio%20Forum.jpg?dl=0Wow! This almost seems Rube Goldberg. T2 is a current source. T3 is a voltage source. The net result when combined with T1 is to produce a very high input impedance. T4 is to provide more isolation to provide a lower output impedance. Interesting. Wait! I missed C2, which will provide positive feedback, raising the input impedance further. Yes, interesting circuit. -- Rick C. - Get 1,000 miles of free Supercharging - Tesla referral code - https://ts.la/richard11209
Reply by ●November 9, 20222022-11-09
On 08/11/2022 10:05 pm, Lamont Cranston wrote:> Anyone care to look at this Chinese design for a high input impedance amp, > and give me their thoughts about it? > Two FETs, two transistors, a little different than I have been looking at. > https://www.dropbox.com/s/ypvmq9ushs4d2cf/High%20input%20impedance%20amp%20Chinese%20Crystal%20Radio%20Forum.jpg?dl=0 > > Thanks, MikekIt is fundamentally the same as the one you did yesterday. T3 and C2 bootstrap away the FET drain capacitance, the other circuit didn't bother with the T3 follower using merely an RC. Not sure if the added complexity is worthwhile or risks more instability. Behavior with large signals may be different but at first glance can't say which is better or worse, need further thought! In the real world performance will be dominated by physical layout strays. If you build it please let us know. piglet
Reply by ●November 9, 20222022-11-09
On 09/11/2022 7:53 am, piglet wrote:> On 08/11/2022 10:05 pm, Lamont Cranston wrote: >> Anyone care to look at this Chinese design for a high input impedance >> amp, >> and give me their thoughts about it? >> Two FETs, two transistors, a little different than I have been >> looking at. >> https://www.dropbox.com/s/ypvmq9ushs4d2cf/High%20input%20impedance%20amp%20Chinese%20Crystal%20Radio%20Forum.jpg?dl=0 >> >> >> Thanks, Mikek > > It is fundamentally the same as the one you did yesterday. T3 and C2 > bootstrap away the FET drain capacitance, the other circuit didn't > bother with the T3 follower using merely an RC. Not sure if the added > complexity is worthwhile or risks more instability. Behavior with large > signals may be different but at first glance can't say which is better > or worse, need further thought! > > In the real world performance will be dominated by physical layout > strays. If you build it please let us know. > > pigletFollowup #2 - both give roughly similar results - if you can afford the higher supply voltage of the simpler circuit use that, if you want to operate from 9V use the more complex circuit? piglet
Reply by ●November 9, 20222022-11-09
On 2022-11-08 23:05, Lamont Cranston wrote:> Anyone care to look at this Chinese design for a high input impedance amp, > and give me their thoughts about it? > Two FETs, two transistors, a little different than I have been looking at. > https://www.dropbox.com/s/ypvmq9ushs4d2cf/High%20input%20impedance%20amp%20Chinese%20Crystal%20Radio%20Forum.jpg?dl=0 > > Thanks, Mikek >It's very similar to your previous circuit. Again there is the JFET follower T1, followed by an NPN follower T4. T2 is a current source, so that the gain of follower T1 will be very close to unity. There will be virtually no AC voltage across R2, nor across R1, multiplying the apparent resistance of the latter a lot. C2 applies the output signal to follower T3 which bootstraps the drain of T1, reducing the effect of Cgd of that JFET. In conclusion, it should work fine. Jeroen Belleman
Reply by ●November 9, 20222022-11-09
> In the real world performance will be dominated by physical layout > strays.There is the rub, proper layout, on iteration 3, I followed a couple of the ideas given here, removing the ground plane and getting the parts raised above the board, although without the ground plane I don't think raising the parts mattered. I suspect removing the ground plane from the enter circuit was, not as important as for the high impedance FET area? I used long leads to keep the parts physically separated, but I know that leads to inductive strays, so... l 'll be reading up on how to mitigate pcb strays before my next build. If anyone has a favorite site on the subject of stray mitigation, please post. Is there any advantage using smd components? I thought there was, but the last build did pretty well with leaded components. Is it worth using a pcb software program, so I could make thinner tracks to help minimize strays? >If you build it please let us know.> pigletI did order the transistors and FETs last night, so there is a possibility, but other projects first. I can think of only one way to test the input impedance, that is with my Q meter. Set up a LC at resonance and then add the high input impedance circuit across the tuning capacitor. Then read out the change of the tuning capacitor and how much the Q drops, then do the math on the Q change. With the input current so low, is there another way? Thanks, Mikek
Reply by ●November 9, 20222022-11-09
On 09/11/2022 11:02 am, Lamont Cranston wrote:> >> In the real world performance will be dominated by physical layout >> strays. > > There is the rub, proper layout, on iteration 3, I followed a couple of the ideas given here, > removing the ground plane and getting the parts raised above the board, although > without the ground plane I don't think raising the parts mattered. I suspect removing the ground plane > from the enter circuit was, > > not as important as for the high impedance FET area? > > I used long leads to keep the parts physically separated, but I know that leads to inductive strays, > so... > l 'll be reading up on how to mitigate pcb strays before my next build. > If anyone has a favorite site on the subject of stray mitigation, please post. > > Is there any advantage using smd components? > > I thought there was, but the last build did pretty well with leaded components. > > Is it worth using a pcb software program, so I could make thinner tracks to help minimize strays? > > >If you build it please let us know. >> piglet > > I did order the transistors and FETs last night, so there is a possibility, > but other projects first. > > I can think of only one way to test the input impedance, that is with my Q meter. > Set up a LC at resonance and then add the high input impedance circuit across the > tuning capacitor. Then read out the change of the tuning capacitor and how > much the Q drops, then do the math on the Q change. > > With the input current so low, is there another way? > Thanks, MikekIf 30MHz is your max frequency then lead length inductance of THT components is unlikely to be a big problem. Your goal of Hi-Z means low stray C and capacitance is proportional to area divided by distance. THT parts will get you distance between nodes whereas SMD parts will reduce node area. Usually SMD wins but with care you could get THT to work. Don't forget the dielectric constant of pcb substrate is 4-5 times that of air (and lossy). The BF256 is similar to 2SK192 and none of the parts in the new circuit are special. Didn't you say before you measured input impedance by inserting variable high resistances between input jack and FET gate and finding values that gave 3dB drop? I recall the figure 30kohm from an early post? The Q meter method should work too and since that appears to be your end application that method might be the gold standard even though tedious? piglet
