Help with high input impedance amp.

On Sunday, November 6, 2022 at 9:21:35 AM UTC-6, John Larkin wrote:

> > 
> >For the low input impedance I would suspect that the FET you use 
> >turns up forward biased gate-source, can't think of another 
> >explanation if the FET is healthy etc.
> Idss is 3 mA min on that fet, if it's good, so the gate shouldn't be 
> forward biased. 

Forward biased, meaning more voltage on the Gate than source? I don't have that.
 2.4V gate and 6.5V source.

> 
> Who is Dagmar?
 He was a pretty heavy contributor here for quite awhile, he posted this 5 years ago, I have seen any posts from him
for a long time.
              Mikek

On 06/11/2022 15:15, John Larkin wrote:
> Most jfets develop a lot of gate current if the drain voltage goes
> above, say, 5 volts. It's called "hot carrier injection" or something.
> AoE mentions that effect and has some graphs.
> 

Is that "impact ionization"?  Worsens gate current from pA to nA or 
something? Could be happening here, OP could add a series resistor in 
drain to drop D-S voltage below 5, can then try bypassing drain to 
ground or bootstrapping it from emitter too. Tons of solder-smoke fun!

piglet

On 06/11/2022 15:21, John Larkin wrote:
> Who is Dagmar?
> 

Wasn't that James Arthur?

piglet

On Sunday, November 6, 2022 at 10:34:23 AM UTC-6, erichp...@hotmail.com wrote:
> On 06/11/2022 15:21, John Larkin wrote: 
> > Who is Dagmar? 
> > 
> 
> Wasn't that James Arthur? 
> 
> piglet

 I think that is right.
          Mikek

On 06/11/2022 15:03, Fred Bloggs wrote:
> On Sunday, November 6, 2022 at 9:22:33 AM UTC-5, Lamont Cranston wrote:
>> On Sunday, November 6, 2022 at 7:22:24 AM UTC-6, Fred Bloggs wrote:
>>> On Saturday, November 5, 2022 at 8:59:49 PM UTC-4, Lamont Cranston wrote:
>>>> Years ago on this group, someone worked this circuit out for me and I have finally built it. It has two problems. The input impedance is about 30kΩ not 500MΩ, and it rolls of way to early.
>>>> I may have created the problems, I don't have the FET and transistor recommended, 2N4416 and MMBTH10. I used a BF256C and a MPSH10 through hole parts. Although I doubt that created the low input impedance.
>>>> https://www.dropbox.com/s/kdwhcxmbk53ugqm/Dagmar%27s%20Fast%20high%20Imp%20amp%20with%20voltage%20labelsand%20RF%20voltages.jpg?dl=0
>>>> Anyone care to tell me why such low input impedance and how to make the frequency flat to 30MHz?
>>>> Mikek
>>> You have something in the drain of T1 introducing excessive negative feedback on the gate drive. That's only way to explain the combination low input impedance and low frequency gain rolloff. If you can't do better with your layout, install a high frequency decoupling capacitor at T1 drain to ground there.
>> I installed a small cap right at the drain to ground, no change.
>> I'm posting a picture of the PCB, to learn, not for harassment. :-) Tempted to shrink the the picture, but no.
>> Note: I have changed semi conductors about 6 times.
>> https://www.dropbox.com/s/w8psnbud9b6z2se/PCB.jpg?dl=0
>> I have had the A, B, and C dc voltages vary over the various T1, Q2 changes, as I write I get A=2.4, B= 6.5 and C=5.8.
>> My first dc measurements were A=1.48 B=8.55 and C=7.83. I have also had A=1.0, B= 5.24, and C=4.63. (A is altered by the 10MΩ meter impedance.)
>> This doesn't have much effect on Gain.
>> Mikek
> 
> Okay I was afraid of that.  It's intrinsic to your FET/ construction, assuming your signal source is 50R or even remotely close. Looking at your circuit board, it looks like you may have significant coupling capacitance shunts to ac ground all over the place. The most damaging ones will be at high impedance nodes. That will do it.

Good point. If the pcb is double sided with vast ground plane then the 
strays to ground might explain all. Perhaps Lamont/Mikek can try peeling 
off a section of groundplane under the gate nodes and measure if there 
is an improvement.

piglet

On Sun, 6 Nov 2022 07:32:42 -0800 (PST), Lamont Cranston
<amdx62@gmail.com> wrote:

>On Sunday, November 6, 2022 at 9:21:35 AM UTC-6, John Larkin wrote:
>
>> > 
>> >For the low input impedance I would suspect that the FET you use 
>> >turns up forward biased gate-source, can't think of another 
>> >explanation if the FET is healthy etc.
>> Idss is 3 mA min on that fet, if it's good, so the gate shouldn't be 
>> forward biased. 
>
>Forward biased, meaning more voltage on the Gate than source? I don't have that.
> 2.4V gate and 6.5V source.
>
>> 
>> Who is Dagmar?
> He was a pretty heavy contributor here for quite awhile, he posted this 5 years ago, I have seen any posts from him
>for a long time.
>              Mikek

Oh, that's my friend James. He skis in short pants.

I all the idiotic flaming and OT nastiness here drove him away.

On Sunday, November 6, 2022 at 10:56:09 AM UTC-6, erichp...@hotmail.com wrote:
> On 06/11/2022 15:03, Fred Bloggs wrote: 

> > Okay I was afraid of that. It's intrinsic to your FET/ construction, assuming your signal source is 50R or even remotely close. Looking at your circuit board, it looks like you may have significant coupling capacitance shunts to ac ground all over the place. The most damaging ones will be at high impedance nodes. That will do it.
> Good point. If the pcb is double sided with vast ground plane then the 
> strays to ground might explain all. Perhaps Lamont/Mikek can try peeling 
> off a section of groundplane under the gate nodes and measure if there 
> is an improvement. 
> 
> piglet

 The goal here is a high input impedance circuit flat from 50kHz to 30MHz.  
 I'm willing to make another board, should I just remove all the copper and have a positive and ground rail on either side.
 I can superglue islands for the connection points. I punch and cut islands from Rogers 5880 1/16" teflon PCB and glue
it to the pcb. Or I can Dremel another board.  
Should I use leaded components and space them off the board or just remove all the groundplane and stick with the surface mount resistors?
 That's all I have, not smd caps or semiconductors.
              
 Also, is this a better circuit to try, this one is tried and proven, I think it is out of Linear's databook or some other company.
https://www.dropbox.com/s/6n78s84gd9kaouu/High%20impedance%20input%20-%20Copy.jpg?dl=0
 With the limitation of the parts I have BF256C, J310, 2N3819 2N5485 >> MPSH10, 2N3866, 2n4401, BC549.    
                            Mikek
  

On Sun, 6 Nov 2022 16:31:12 +0000, piglet <erichpwagner@hotmail.com>
wrote:

>On 06/11/2022 15:15, John Larkin wrote:
>> Most jfets develop a lot of gate current if the drain voltage goes
>> above, say, 5 volts. It's called "hot carrier injection" or something.
>> AoE mentions that effect and has some graphs.
>> 
>
>Is that "impact ionization"? 

Yeah, that's it.

 Worsens gate current from pA to nA or 
>something? 

Microamps!

Could be happening here, OP could add a series resistor in 
>drain to drop D-S voltage below 5, can then try bypassing drain to 
>ground or bootstrapping it from emitter too. Tons of solder-smoke fun!
>
>piglet
>
>

On Sun, 6 Nov 2022 07:09:58 -0800 (PST), Fred Bloggs
<bloggs.fredbloggs.fred@gmail.com> wrote:

>On Sunday, November 6, 2022 at 9:22:33 AM UTC-5, Lamont Cranston wrote:
>> On Sunday, November 6, 2022 at 7:22:24 AM UTC-6, Fred Bloggs wrote: 
>> > On Saturday, November 5, 2022 at 8:59:49 PM UTC-4, Lamont Cranston wrote: 
>> > > Years ago on this group, someone worked this circuit out for me and I have finally built it. It has two problems. The input impedance is about 30k? not 500M?, and it rolls of way to early. 
>> > > I may have created the problems, I don't have the FET and transistor recommended, 2N4416 and MMBTH10. I used a BF256C and a MPSH10 through hole parts. Although I doubt that created the low input impedance. 
>> > > https://www.dropbox.com/s/kdwhcxmbk53ugqm/Dagmar%27s%20Fast%20high%20Imp%20amp%20with%20voltage%20labelsand%20RF%20voltages.jpg?dl=0 
>> > > Anyone care to tell me why such low input impedance and how to make the frequency flat to 30MHz? 
>> > > Mikek 
>> > You have something in the drain of T1 introducing excessive negative feedback on the gate drive. That's only way to explain the combination low input impedance and low frequency gain rolloff. If you can't do better with your layout, install a high frequency decoupling capacitor at T1 drain to ground there.
>> I installed a small cap right at the drain to ground, no change. 
>> I'm posting a picture of the PCB, to learn, not for harassment. :-) Tempted to shrink the the picture, but no. 
>> Note: I have changed semi conductors about 6 times. 
>> https://www.dropbox.com/s/w8psnbud9b6z2se/PCB.jpg?dl=0 
>> I have had the A, B, and C dc voltages vary over the various T1, Q2 changes, as I write I get A=2.4, B= 6.5 and C=5.8. 
>> My first dc measurements were A=1.48 B=8.55 and C=7.83. I have also had A=1.0, B= 5.24, and C=4.63. (A is altered by the 10M? meter impedance.) 
>> This doesn't have much effect on Gain. 
>> Mikek
>
>You might consider re-doing the board. Use all leaded components. Keep about 100 mils clearance from every node to any of the power planes, keep the body of the components 100 mils up and away from the planes too. This should not present a problem at your frequency. Main thing is to eliminate stray shunts and couplings you have all over the place.

You can do impedance-matched GHz circuits on dremeled copperclad with
surface-mount parts.

On Sun, 6 Nov 2022 16:56:02 +0000, piglet <erichpwagner@hotmail.com>
wrote:

>On 06/11/2022 15:03, Fred Bloggs wrote:
>> On Sunday, November 6, 2022 at 9:22:33 AM UTC-5, Lamont Cranston wrote:
>>> On Sunday, November 6, 2022 at 7:22:24 AM UTC-6, Fred Bloggs wrote:
>>>> On Saturday, November 5, 2022 at 8:59:49 PM UTC-4, Lamont Cranston wrote:
>>>>> Years ago on this group, someone worked this circuit out for me and I have finally built it. It has two problems. The input impedance is about 30k? not 500M?, and it rolls of way to early.
>>>>> I may have created the problems, I don't have the FET and transistor recommended, 2N4416 and MMBTH10. I used a BF256C and a MPSH10 through hole parts. Although I doubt that created the low input impedance.
>>>>> https://www.dropbox.com/s/kdwhcxmbk53ugqm/Dagmar%27s%20Fast%20high%20Imp%20amp%20with%20voltage%20labelsand%20RF%20voltages.jpg?dl=0
>>>>> Anyone care to tell me why such low input impedance and how to make the frequency flat to 30MHz?
>>>>> Mikek
>>>> You have something in the drain of T1 introducing excessive negative feedback on the gate drive. That's only way to explain the combination low input impedance and low frequency gain rolloff. If you can't do better with your layout, install a high frequency decoupling capacitor at T1 drain to ground there.
>>> I installed a small cap right at the drain to ground, no change.
>>> I'm posting a picture of the PCB, to learn, not for harassment. :-) Tempted to shrink the the picture, but no.
>>> Note: I have changed semi conductors about 6 times.
>>> https://www.dropbox.com/s/w8psnbud9b6z2se/PCB.jpg?dl=0
>>> I have had the A, B, and C dc voltages vary over the various T1, Q2 changes, as I write I get A=2.4, B= 6.5 and C=5.8.
>>> My first dc measurements were A=1.48 B=8.55 and C=7.83. I have also had A=1.0, B= 5.24, and C=4.63. (A is altered by the 10M? meter impedance.)
>>> This doesn't have much effect on Gain.
>>> Mikek
>> 
>> Okay I was afraid of that.  It's intrinsic to your FET/ construction, assuming your signal source is 50R or even remotely close. Looking at your circuit board, it looks like you may have significant coupling capacitance shunts to ac ground all over the place. The most damaging ones will be at high impedance nodes. That will do it.
>
>Good point. If the pcb is double sided with vast ground plane then the 
>strays to ground might explain all. Perhaps Lamont/Mikek can try peeling 
>off a section of groundplane under the gate nodes and measure if there 
>is an improvement.
>
>piglet
>

At 30 MHz, capacitance to the backside copper won't matter. At a
couple GHz, trace impedances might matter some.

It might benefit from vias from top to bottom ground. I like 2-56
screws, which are good ground lugs too.