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bit about transistor cost

Started by Unknown December 6, 2021
John Larkin wrote:
> On Mon, 6 Dec 2021 14:21:23 -0500, Phil Hobbs > <pcdhSpamMeSenseless@electrooptical.net> wrote: > >> Dimiter_Popoff wrote: >>> On 12/6/2021 20:47, John Larkin wrote: >>>> On Mon, 6 Dec 2021 20:36:17 +0200, Dimiter_Popoff <dp@tgi-sci.com> >>>> wrote: >>>> >>>>> On 12/6/2021 19:42, jlarkin@highlandsniptechnology.com wrote: >>>>>> https://www.fabricatedknowledge.com/p/the-rising-tide-of-semiconductor >>>>>> >>>>>> I've also heard that the cost of one next-gen euv scanner is well over >>>>>> $200M, and that the design and mask set for a high-end chip costs a >>>>>> billion dollars. >>>>>> >>>>>> We just don't need few-nm chips. >>>>>> >>>>>> >>>>>> >>>>> >>>>> Gradually electronics design without having access to a silicon factory >>>>> becomes useless, hopefully the process is slow enough so we don't see >>>>> that in full. >>>>> Sort of like nowadays you can somehow master an internal combustion >>>>> engine if you have a lathe and a milling machine but you have no chance >>>>> to make it comparable to those car makers make, not to speak about cost. >>>> >>>> Some things have got good enough. Hammers, spoons, beds, LED lights, >>>> microwave ovens. Moore's Law can't go on forever, and is probably at >>>> or in same cases past its practical limit. >>>> >>>> We don't need 3 nm chips to text and twitter. I can't imagine my cell >>>> phone needing to be better hardware. >>> >>> Oh they have already bloated the software so the need for todays >>> (and way back from today) hardware would be there. Just have faith, >>> they'll manage it for 3 nm if say TSMC get there. >>> >>>> >>>> I need a dumb, last-gen FPGA that is less fancy inside but fast >>>> pin-to-pin. The trend is in the opposite directions. >>> >>> I get this obviously, I have similar needs (not yet your ps thing >>> but for how long). >>> But this is my point, so you can make what you want to make you >>> will need access to a silicon factory... Clearly you can do better >>> if you design your silicon instead of tweaking an fpga. >> >> Depends. There are very few applications that will support the sheer >> NRE cost of a full custom chip down at single-nanometer nodes. >> >> Cheers >> >> Phil Hobbs > > I can imagine some serious head slapping when someone finds a fatal > flaw in this mask set. > > >
They can be edited, up to a point. Dunno how easy that is for a < 10-nm mask though. Cheers Phil Hobbs -- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC / Hobbs ElectroOptics Optics, Electro-optics, Photonics, Analog Electronics Briarcliff Manor NY 10510 http://electrooptical.net http://hobbs-eo.com
On Monday, December 6, 2021 at 10:30:28 AM UTC-8, gnuarm.del...@gmail.com wrote:
> On Monday, December 6, 2021 at 12:44:06 PM UTC-5, jla...@highlandsniptechnology.com wrote: > > https://www.fabricatedknowledge.com/p/the-rising-tide-of-semiconductor > > > > I've also heard that the cost of one next-gen euv scanner is well over > > $200M, and that the design and mask set for a high-end chip costs a > > billion dollars. > > > > We just don't need few-nm chips.
> "If they weren't so good, why would I buy so many?" Anyone remember that Volvo ad?
Part of the problem, is that those chips go into disposables. Auto computers are wedded to one particular model and option set of auto, cannot be easily made generic replaceables. PC high tech components are churned into landfills on circa 5 year timescales. Cellphone processing is even less open; my service provider is now nagging me to do yet another upgrade of my pocketable. Tablets, same story. RAMBUS-memory motherboards got recycled lots sooner than most owners liked. Face it, we buy many because we can't repurpose the old ones. The future of high-tech LSI CPUs is to go into NUC or MacMini disposables, or server-class boxes that die of energy effiiciency issues, and even the socketed RAM is the wrong generation for their replacements. Power cords, RETMA racks, we reuse; no shortages there. Maybe, someday, auto networks will accept generic plug-ins, and an auto chassis can expect a lifespan that goes longer than the lifespan of its irreplaceable data-handling bits. And, maybe I can cluster old PCs, with ethernet, and using NAS disks...
mandag den 6. december 2021 kl. 23.00.57 UTC+1 skrev Phil Hobbs:
> John Larkin wrote: > > On Mon, 6 Dec 2021 14:21:23 -0500, Phil Hobbs > > <pcdhSpamM...@electrooptical.net> wrote: > > > >> Dimiter_Popoff wrote: > >>> On 12/6/2021 20:47, John Larkin wrote: > >>>> On Mon, 6 Dec 2021 20:36:17 +0200, Dimiter_Popoff <d...@tgi-sci.com> > >>>> wrote: > >>>> > >>>>> On 12/6/2021 19:42, jla...@highlandsniptechnology.com wrote: > >>>>>> https://www.fabricatedknowledge.com/p/the-rising-tide-of-semiconductor > >>>>>> > >>>>>> I've also heard that the cost of one next-gen euv scanner is well over > >>>>>> $200M, and that the design and mask set for a high-end chip costs a > >>>>>> billion dollars. > >>>>>> > >>>>>> We just don't need few-nm chips. > >>>>>> > >>>>>> > >>>>>> > >>>>> > >>>>> Gradually electronics design without having access to a silicon factory > >>>>> becomes useless, hopefully the process is slow enough so we don't see > >>>>> that in full. > >>>>> Sort of like nowadays you can somehow master an internal combustion > >>>>> engine if you have a lathe and a milling machine but you have no chance > >>>>> to make it comparable to those car makers make, not to speak about cost. > >>>> > >>>> Some things have got good enough. Hammers, spoons, beds, LED lights, > >>>> microwave ovens. Moore's Law can't go on forever, and is probably at > >>>> or in same cases past its practical limit. > >>>> > >>>> We don't need 3 nm chips to text and twitter. I can't imagine my cell > >>>> phone needing to be better hardware. > >>> > >>> Oh they have already bloated the software so the need for todays > >>> (and way back from today) hardware would be there. Just have faith, > >>> they'll manage it for 3 nm if say TSMC get there. > >>> > >>>> > >>>> I need a dumb, last-gen FPGA that is less fancy inside but fast > >>>> pin-to-pin. The trend is in the opposite directions. > >>> > >>> I get this obviously, I have similar needs (not yet your ps thing > >>> but for how long). > >>> But this is my point, so you can make what you want to make you > >>> will need access to a silicon factory... Clearly you can do better > >>> if you design your silicon instead of tweaking an fpga. > >> > >> Depends. There are very few applications that will support the sheer > >> NRE cost of a full custom chip down at single-nanometer nodes. > >> > >> Cheers > >> > >> Phil Hobbs > > > > I can imagine some serious head slapping when someone finds a fatal > > flaw in this mask set. > > > > > > > They can be edited, up to a point. Dunno how easy that is for a < 10-nm > mask though.
afaik there is a lot of masks to a chip and you can change only some of them
On Tuesday, December 7, 2021 at 4:44:06 AM UTC+11, jla...@highlandsniptechnology.com wrote:
> https://www.fabricatedknowledge.com/p/the-rising-tide-of-semiconductor > > I've also heard that the cost of one next-gen euv scanner is well over > $200M, and that the design and mask set for a high-end chip costs a > billion dollars. > > We just don't need few-nm chips.
Semiconductor manufacturing is all about producing chips that have mass market applications and can sell in huge numbers into the relevant mass market If you have a big enough market to pay for the next generation euv-scanner and the billion dollar mask set required for the chip that will dominate that market, it is a great investment. The rest of us exploit those chips to serve different - smaller, but more numerous - markets. We don't need few-nm chips to do that, but if we can buy one more or less suitable for our application, we will do it, because it's going to be faster and use less current than it's predecessor. The interface to produce the outputs we can sell is always a mess, but it's been like that forever. -- Bill Sloman, Sydney
On Tuesday, December 7, 2021 at 12:14:43 PM UTC+11, Martin Brown wrote:
> On 06/12/2021 19:04, Dimiter_Popoff wrote: > > On 12/6/2021 20:47, John Larkin wrote: > >> On Mon, 6 Dec 2021 20:36:17 +0200, Dimiter_Popoff <d...@tgi-sci.com> wrote: > >>> On 12/6/2021 19:42, jla...@highlandsniptechnology.com wrote:
<snip>
> It may yet swing the other way when simulations are so good that the conversion to masks is essentially error free.
That happened around 1990. The electron beam tester I was working on back then was the next generation of a unit which famously trimmed three months off the development time of the Motorola 68k processor chip set. The project wasn't canned because out machine didn't work - we did get it working quite well enough to demonstrate that it was an order of magnitude faster than it's predecessor - but because simulation had got good enough that most mask sets produced chips that worked. The older, slower, machines were quite fast enough to check out that the simulation software was predicting what actually happened on the chip and that killed our market. -- Bill Sloman, Sydney
On 07-Dec-21 12:14 pm, Anthony William Sloman wrote:
> On Tuesday, December 7, 2021 at 4:44:06 AM UTC+11, jla...@highlandsniptechnology.com wrote: >> https://www.fabricatedknowledge.com/p/the-rising-tide-of-semiconductor >> >> I've also heard that the cost of one next-gen euv scanner is well over >> $200M, and that the design and mask set for a high-end chip costs a >> billion dollars. >> >> We just don't need few-nm chips. > > Semiconductor manufacturing is all about producing chips that have mass market applications and can sell in huge numbers into the relevant mass market > > If you have a big enough market to pay for the next generation euv-scanner and the billion dollar mask set required for the chip that will dominate that market, it is a great investment. > > The rest of us exploit those chips to serve different - smaller, but more numerous - markets. We don't need few-nm chips to do that, but if we can buy one more or less suitable for our application, we will do it, because it's going to be faster and use less current than it's predecessor. The interface to produce the outputs we can sell is always a mess, but it's been like that forever. >
A few nm is not many silicon atoms, so I have to wonder about the longevity of these chips. People generally may recycle their phones every couple of years (though I don't), and manufacturers may be willing just to replace those that die during the warranty period, but for most things one wants the electronics to work for a reasonable time. Sylvia.
Lasse Langwadt Christensen wrote:
> mandag den 6. december 2021 kl. 23.00.57 UTC+1 skrev Phil Hobbs: >> John Larkin wrote: >>> On Mon, 6 Dec 2021 14:21:23 -0500, Phil Hobbs >>> <pcdhSpamM...@electrooptical.net> wrote: >>> >>>> Dimiter_Popoff wrote: >>>>> On 12/6/2021 20:47, John Larkin wrote: >>>>>> On Mon, 6 Dec 2021 20:36:17 +0200, Dimiter_Popoff <d...@tgi-sci.com> >>>>>> wrote: >>>>>> >>>>>>> On 12/6/2021 19:42, jla...@highlandsniptechnology.com wrote: >>>>>>>> https://www.fabricatedknowledge.com/p/the-rising-tide-of-semiconductor >>>>>>>> >>>>>>>> I've also heard that the cost of one next-gen euv scanner is well over >>>>>>>> $200M, and that the design and mask set for a high-end chip costs a >>>>>>>> billion dollars. >>>>>>>> >>>>>>>> We just don't need few-nm chips. >>>>>>>> >>>>>>>> >>>>>>>> >>>>>>> >>>>>>> Gradually electronics design without having access to a silicon factory >>>>>>> becomes useless, hopefully the process is slow enough so we don't see >>>>>>> that in full. >>>>>>> Sort of like nowadays you can somehow master an internal combustion >>>>>>> engine if you have a lathe and a milling machine but you have no chance >>>>>>> to make it comparable to those car makers make, not to speak about cost. >>>>>> >>>>>> Some things have got good enough. Hammers, spoons, beds, LED lights, >>>>>> microwave ovens. Moore's Law can't go on forever, and is probably at >>>>>> or in same cases past its practical limit. >>>>>> >>>>>> We don't need 3 nm chips to text and twitter. I can't imagine my cell >>>>>> phone needing to be better hardware. >>>>> >>>>> Oh they have already bloated the software so the need for todays >>>>> (and way back from today) hardware would be there. Just have faith, >>>>> they'll manage it for 3 nm if say TSMC get there. >>>>> >>>>>> >>>>>> I need a dumb, last-gen FPGA that is less fancy inside but fast >>>>>> pin-to-pin. The trend is in the opposite directions. >>>>> >>>>> I get this obviously, I have similar needs (not yet your ps thing >>>>> but for how long). >>>>> But this is my point, so you can make what you want to make you >>>>> will need access to a silicon factory... Clearly you can do better >>>>> if you design your silicon instead of tweaking an fpga. >>>> >>>> Depends. There are very few applications that will support the sheer >>>> NRE cost of a full custom chip down at single-nanometer nodes. >>>> >>>> Cheers >>>> >>>> Phil Hobbs >>> >>> I can imagine some serious head slapping when someone finds a fatal >>> flaw in this mask set. >>> >>> >>> >> They can be edited, up to a point. Dunno how easy that is for a < 10-nm >> mask though. > > afaik there is a lot of masks to a chip and you can change only some of them > >
Well, if you've got 13 metal layers, various ion implant steps, and so on and so forth, plus 8-exposure litho for the fine stuff, that can add up, for sure. ;) Cheers Phil Hobbs -- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC / Hobbs ElectroOptics Optics, Electro-optics, Photonics, Analog Electronics Briarcliff Manor NY 10510 http://electrooptical.net http://hobbs-eo.com
On 12/6/2021 23:34, Martin Brown wrote:
> On 06/12/2021 19:04, Dimiter_Popoff wrote: >> On 12/6/2021 20:47, John Larkin wrote: >>> On Mon, 6 Dec 2021 20:36:17 +0200, Dimiter_Popoff <dp@tgi-sci.com> >>> wrote: >>> >>>> On 12/6/2021 19:42, jlarkin@highlandsniptechnology.com wrote: >>>>> https://www.fabricatedknowledge.com/p/the-rising-tide-of-semiconductor >>>>> >>>>> I've also heard that the cost of one next-gen euv scanner is well over >>>>> $200M, and that the design and mask set for a high-end chip costs a >>>>> billion dollars. >>>>> >>>>> We just don't need few-nm chips. >>>> >>>> Gradually electronics design without having access to a silicon factory >>>> becomes useless, hopefully the process is slow enough so we don't see >>>> that in full. >>>> Sort of like nowadays you can somehow master an internal combustion >>>> engine if you have a lathe and a milling machine but you have no chance >>>> to make it comparable to those car makers make, not to speak about >>>> cost. >>> >>> Some things have got good enough. Hammers, spoons, beds, LED lights, >>> microwave ovens. Moore's Law can't go on forever, and is probably at >>> or in same cases past its practical limit. >>> >>> We don't need 3 nm chips to text and twitter. I can't imagine my cell >>> phone needing to be better hardware. > > I would like a *lot* more battery life - the speed is more than adequate > for my needs. I'd trade slower when idle for longer life. > > Likewise with PC's. I'm in the market for a new one right now but I'm > not convinced that any of them offer single threaded performance that is > 3x better than the ancient i7-3770 I have now. That has always been my > upgrade heuristic (used to be every 3 years). Clock speeds have maxed > out and now they are adding more cores (many of which are idle most of > the time). Performance cores and efficient cores is the new selling > point. It looks on paper like the i5-12600K might just pass this test. > >> Oh they have already bloated the software so the need for todays >> (and way back from today) hardware would be there. Just have faith, >> they'll manage it for 3 nm if say TSMC get there. > > Software will always grow to use the memory and speed available. > CPU cycles are cheap and getting cheaper and humans are expensive. > > IBM claim to have 2nm chip fab technology as of this year. > > https://newsroom.ibm.com/2021-05-06-IBM-Unveils-Worlds-First-2-Nanometer-Chip-Technology,-Opening-a-New-Frontier-for-Semiconductors#assets_all
Actually I think I had seen that of IBM... and had forgotten. I am not sure software just grows to saturate the hardware (which it of course does, we all do it). Sometimes I think they bloat it on purpose in order to have the market for the next generation of silicon (not that this is a bad thing, better silicon is welcome, just the secrecy about it is not). Or may be it is not "on purpose" in some sinister conspiracy-like way, may be it just regulates itself like this. But the software is *way* too bloated for me to just disregard the conspiracy idea...
> >>> I need a dumb, last-gen FPGA that is less fancy inside but fast >>> pin-to-pin. The trend is in the opposite directions. >> >> I get this obviously, I have similar needs (not yet your ps thing >> but for how long). >> But this is my point, so you can make what you want to make you >> will need access to a silicon factory... Clearly you can do better >> if you design your silicon instead of tweaking an fpga. However >> this is unlikely to become a viable alternative simply because of >> cost - and well, only the large ones will be allowed to design. >> Does not get much shittier than that (not just for the likes of us) >> but this is where the world is heading. > > It may yet swing the other way when simulations are so good that the > conversion to masks is essentially error free. Where it gets tricky is > when the AI is designing new chips for us that no-one understands. > > This years BBC Rieth lectures are about the rise of AI and the future by > Stuart Russell of Berkley (starts this Wednesday). > > https://www.bbc.co.uk/programmes/articles/1N0w5NcK27Tt041LPVLZ51k/reith-lectures-2021-living-with-artificial-intelligence > > >>> Maybe Moore's law is running on psychological momentum, fear of >>> getting behind. I think I can see that happening. > > It is still at least partially holding for number density of transistors > if not for actual computing performance. We must be very close to the > limits where quantum effects mess things up (but 3D stacks allow some > alternative ways of gaining number density on a chip). > >> I don't give that much thought, I think it is gone since the clock >> frequencies for processors etc. stopped getting higher but I am >> neither sure not interested in what exacltly that "law" means. > > It was originally specified in terms of transistors per chip. >
So it may still be working then? These figures keep on getting more and more insane, no wonder only a few factories on the planet can do it.
On 12/7/2021 3:25, Anthony William Sloman wrote:
> On Tuesday, December 7, 2021 at 12:14:43 PM UTC+11, Martin Brown wrote: >> On 06/12/2021 19:04, Dimiter_Popoff wrote: >>> On 12/6/2021 20:47, John Larkin wrote: >>>> On Mon, 6 Dec 2021 20:36:17 +0200, Dimiter_Popoff <d...@tgi-sci.com> wrote: >>>>> On 12/6/2021 19:42, jla...@highlandsniptechnology.com wrote: > > <snip> > >> It may yet swing the other way when simulations are so good that the conversion to masks is essentially error free. > > That happened around 1990. The electron beam tester I was working on back then was the next generation of a unit which famously trimmed three months off the development time of the Motorola 68k processor chip set. > > The project wasn't canned because out machine didn't work - we did get it working quite well enough to demonstrate that it was an order of magnitude faster than it's predecessor - but because simulation had got good enough that most mask sets produced chips that worked. > > The older, slower, machines were quite fast enough to check out that the simulation software was predicting what actually happened on the chip and that killed our market. >
It is a shame such an advanced machinery has been lost (or did it survive for some niche applications?)
On 12/7/2021 3:40, Sylvia Else wrote:
> On 07-Dec-21 12:14 pm, Anthony William Sloman wrote: >> On Tuesday, December 7, 2021 at 4:44:06 AM UTC+11, >> jla...@highlandsniptechnology.com wrote: >>> https://www.fabricatedknowledge.com/p/the-rising-tide-of-semiconductor >>> >>> I've also heard that the cost of one next-gen euv scanner is well over >>> $200M, and that the design and mask set for a high-end chip costs a >>> billion dollars. >>> >>> We just don't need few-nm chips. >> >> Semiconductor manufacturing is all about producing chips that have >> mass market applications and can sell in huge numbers into the >> relevant mass market >> >> If you have a big enough market to pay for the next generation >> euv-scanner and the billion dollar mask set required for the chip that >> will dominate that market, it is a great investment. >> >> The rest of us exploit those chips to serve different - smaller, but >> more numerous - markets. We don't need few-nm chips to do that, but if >> we can buy one more or less suitable for our application, we will do >> it, because it's going to be faster and use less current than it's >> predecessor. The interface to produce the outputs we can sell is >> always a mess, but it's been like that forever. >> > > A few nm is not many silicon atoms, so I have to wonder about the > longevity of these chips. > > People generally may recycle their phones every couple of years (though > I don't), and manufacturers may be willing just to replace those that > die during the warranty period, but for most things one wants the > electronics to work for a reasonable time. > > Sylvia.
I think I saw something somewhere about longevity, figures were not great (if my memory is real, far from being sure). My older phone lasted for 5 years and its micro-USB got broken so I replaced the phone. The current one is 4 years old and still works, though about a year (or was it 18 months) ago its battery got swollen (bad micro USB again, probably it damaged the battery by perpetual power cycling) but I managed to buy locally both the connector and a new battery at some negligible cost and replaced these so it still works.