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Broadband impedance matching of series RL load

Started by Unknown March 14, 2018
Could some electronics guru please help ? I am running some SPICE 
simulations on wideband impedance matching of the following setup.
The source and load resistances are equal
The source is a pure resistor 
Yhe load consists of a resistor(same value as source resistor) and
a series inductor
The matching network is a 6th order low pass filter with a 
series inductor as the last element. 
The RMS input power and the RMS output power are measured. 
The ratio RMS output power/RMS input power is very low, indicating
poor matching and large invident signal reflection. How would the
load inductor be bullified in a physically realizable way ? All
hints/suggestions are welcome. Thanks in advance.

 
On Tue, 13 Mar 2018 23:39:57 -0700 (PDT), dakupoto@gmail.com wrote:

>Could some electronics guru please help ? I am running some SPICE >simulations on wideband impedance matching of the following setup. >The source and load resistances are equal >The source is a pure resistor >Yhe load consists of a resistor(same value as source resistor) and >a series inductor >The matching network is a 6th order low pass filter with a >series inductor as the last element. >The RMS input power and the RMS output power are measured. >The ratio RMS output power/RMS input power is very low, indicating >poor matching and large invident signal reflection. How would the >load inductor be bullified in a physically realizable way ? All >hints/suggestions are welcome. Thanks in advance. > >
That's hard to think about. Got a schematic? What is the ultimate goal? -- John Larkin Highland Technology, Inc lunatic fringe electronics
On Wednesday, March 14, 2018 at 10:19:16 AM UTC-4, John Larkin wrote:
> On Tue, 13 Mar 2018 23:39:57 -0700 (PDT), dakupoto@gmail.com wrote: > > >Could some electronics guru please help ? I am running some SPICE > >simulations on wideband impedance matching of the following setup. > >The source and load resistances are equal > >The source is a pure resistor > >Yhe load consists of a resistor(same value as source resistor) and > >a series inductor > >The matching network is a 6th order low pass filter with a > >series inductor as the last element. > >The RMS input power and the RMS output power are measured. > >The ratio RMS output power/RMS input power is very low, indicating > >poor matching and large invident signal reflection. How would the > >load inductor be bullified in a physically realizable way ? All > >hints/suggestions are welcome. Thanks in advance. > > > > > > That's hard to think about. Got a schematic? > > What is the ultimate goal?
. He could add the 'right' parallel R+C to make it look purely resistive. That does nothing for the load but keeps the amp happy. (RC = L/R) George H.
> > > -- > > John Larkin Highland Technology, Inc > > lunatic fringe electronics
On Wed, 14 Mar 2018 08:37:47 -0700 (PDT), George Herold
<gherold@teachspin.com> wrote:

>On Wednesday, March 14, 2018 at 10:19:16 AM UTC-4, John Larkin wrote: >> On Tue, 13 Mar 2018 23:39:57 -0700 (PDT), dakupoto@gmail.com wrote: >> >> >Could some electronics guru please help ? I am running some SPICE >> >simulations on wideband impedance matching of the following setup. >> >The source and load resistances are equal >> >The source is a pure resistor >> >Yhe load consists of a resistor(same value as source resistor) and >> >a series inductor >> >The matching network is a 6th order low pass filter with a >> >series inductor as the last element. >> >The RMS input power and the RMS output power are measured. >> >The ratio RMS output power/RMS input power is very low, indicating >> >poor matching and large invident signal reflection. How would the >> >load inductor be bullified in a physically realizable way ? All >> >hints/suggestions are welcome. Thanks in advance. >> > >> > >> >> That's hard to think about. Got a schematic? >> >> What is the ultimate goal? >. >He could add the 'right' parallel R+C to make it look purely resistive. >That does nothing for the load but keeps the amp happy. >(RC = L/R) > >George H.
Amp? "The source is a pure resistor." -- John Larkin Highland Technology, Inc lunatic fringe electronics
On Wednesday, March 14, 2018 at 11:56:25 AM UTC-4, John Larkin wrote:
> On Wed, 14 Mar 2018 08:37:47 -0700 (PDT), George Herold > <gherold@teachspin.com> wrote: > > >On Wednesday, March 14, 2018 at 10:19:16 AM UTC-4, John Larkin wrote: > >> On Tue, 13 Mar 2018 23:39:57 -0700 (PDT), dakupoto@gmail.com wrote: > >> > >> >Could some electronics guru please help ? I am running some SPICE > >> >simulations on wideband impedance matching of the following setup. > >> >The source and load resistances are equal > >> >The source is a pure resistor > >> >Yhe load consists of a resistor(same value as source resistor) and > >> >a series inductor > >> >The matching network is a 6th order low pass filter with a > >> >series inductor as the last element. > >> >The RMS input power and the RMS output power are measured. > >> >The ratio RMS output power/RMS input power is very low, indicating > >> >poor matching and large invident signal reflection. How would the > >> >load inductor be bullified in a physically realizable way ? All > >> >hints/suggestions are welcome. Thanks in advance. > >> > > >> > > >> > >> That's hard to think about. Got a schematic? > >> > >> What is the ultimate goal? > >. > >He could add the 'right' parallel R+C to make it look purely resistive. > >That does nothing for the load but keeps the amp happy. > >(RC = L/R) > > > >George H. > > Amp? > > "The source is a pure resistor."
Right, my mistake. He could post the spice file. George H.
> > > -- > > John Larkin Highland Technology, Inc > > lunatic fringe electronics
On Wed, 14 Mar 2018 09:15:19 -0700 (PDT), George Herold
<gherold@teachspin.com> wrote:

>On Wednesday, March 14, 2018 at 11:56:25 AM UTC-4, John Larkin wrote: >> On Wed, 14 Mar 2018 08:37:47 -0700 (PDT), George Herold >> <gherold@teachspin.com> wrote: >> >> >On Wednesday, March 14, 2018 at 10:19:16 AM UTC-4, John Larkin wrote: >> >> On Tue, 13 Mar 2018 23:39:57 -0700 (PDT), dakupoto@gmail.com wrote: >> >> >> >> >Could some electronics guru please help ? I am running some SPICE >> >> >simulations on wideband impedance matching of the following setup. >> >> >The source and load resistances are equal >> >> >The source is a pure resistor >> >> >Yhe load consists of a resistor(same value as source resistor) and >> >> >a series inductor >> >> >The matching network is a 6th order low pass filter with a >> >> >series inductor as the last element. >> >> >The RMS input power and the RMS output power are measured. >> >> >The ratio RMS output power/RMS input power is very low, indicating >> >> >poor matching and large invident signal reflection. How would the >> >> >load inductor be bullified in a physically realizable way ? All >> >> >hints/suggestions are welcome. Thanks in advance. >> >> > >> >> > >> >> >> >> That's hard to think about. Got a schematic? >> >> >> >> What is the ultimate goal? >> >. >> >He could add the 'right' parallel R+C to make it look purely resistive. >> >That does nothing for the load but keeps the amp happy. >> >(RC = L/R) >> > >> >George H. >> >> Amp? >> >> "The source is a pure resistor." >Right, my mistake. He could post the spice file. > >George H.
Yes. The problem is not well defined. -- John Larkin Highland Technology, Inc picosecond timing precision measurement jlarkin att highlandtechnology dott com http://www.highlandtechnology.com
> >> >> > >> >> >Could some electronics guru please help ? I am running some SPICE > >> >> >simulations on wideband impedance matching of the following setup. > >> >> >The source and load resistances are equal > >> >> >The source is a pure resistor > >> >> >Yhe load consists of a resistor(same value as source resistor) and > >> >> >a series inductor
start simple, use a series capacitor to tune out the reactance of the inductor at a single frequency. m
On Wednesday, March 14, 2018 at 1:54:16 PM UTC-4, mako...@yahoo.com wrote:
> > >> >> > > >> >> >Could some electronics guru please help ? I am running some SPICE > > >> >> >simulations on wideband impedance matching of the following setup. > > >> >> >The source and load resistances are equal > > >> >> >The source is a pure resistor > > >> >> >Yhe load consists of a resistor(same value as source resistor) and > > >> >> >a series inductor > > > start simple, > > use a series capacitor to tune out the reactance of the inductor at a single frequency. > > m
also this re antennas https://en.wikipedia.org/wiki/Chu%E2%80%93Harrington_limit
On Wed, 14 Mar 2018 10:54:10 -0700 (PDT), makolber@yahoo.com wrote:

> >> >> >> >> >> >> >Could some electronics guru please help ? I am running some SPICE >> >> >> >simulations on wideband impedance matching of the following setup. >> >> >> >The source and load resistances are equal >> >> >> >The source is a pure resistor >> >> >> >Yhe load consists of a resistor(same value as source resistor) and >> >> >> >a series inductor > > >start simple, > >use a series capacitor to tune out the reactance of the inductor at a single frequency. > >m
One thing that was clearly defined is "broadband." -- John Larkin Highland Technology, Inc picosecond timing precision measurement jlarkin att highlandtechnology dott com http://www.highlandtechnology.com
On Tue, 13 Mar 2018 23:39:57 -0700 (PDT), dakupoto@gmail.com wrote:

>Could some electronics guru please help ? I am running some SPICE >simulations on wideband impedance matching of the following setup. >The source and load resistances are equal >The source is a pure resistor >Yhe load consists of a resistor(same value as source resistor) and >a series inductor >The matching network is a 6th order low pass filter with a >series inductor as the last element. >The RMS input power and the RMS output power are measured. >The ratio RMS output power/RMS input power is very low, indicating >poor matching and large invident signal reflection. How would the >load inductor be bullified in a physically realizable way ? All >hints/suggestions are welcome. Thanks in advance. > >
Schematic? What does "wideband" mean? fL, fH, dB's? ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | STV, Queen Creek, AZ 85142 Skype: skypeanalog | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | It's what you learn, after you know it all, that counts.