On Fri, 16 Mar 2018 04:50:54 -0700 (PDT), dakupoto@gmail.com wrote:>On Friday, March 16, 2018 at 3:42:04 AM UTC+5:30, Jim Thompson wrote:[snip]>> >> Schematic? What does "wideband" mean? fL, fH, dB's? >> >> >> >> ...Jim Thompson >> [snip] >> >[snip]>> > >> >Any hints/suggestions would be very helpful. >> >Thanks in advance. >> >> Gozinta/gozouta specification? You're exhibiting the standard failure >> here of thinking you can force what you think the solution should be >> rather than specifying the desired results... sort like the "Searching >> for an Op-Amp" fiasco >:-} >> >> (I actually have symbols in my spice library: gozinta, gozouta, and >> gozbi... prettied-up _small_ port symbols ;-) >>[snip] NGspice, HSpice noted. LTspice requires all kinds of extra steps to get to a numerically analyzable set of data points Unless HSpice has been recently neutered, I'd hazard a guess that it's .PRINT statement will produce a table in the .OUT file that can pasted into Excel or a curve-fitting program (which is what I mostly use it for... for behavioral modeling ;-)> >I am not forcing anything on anyone. Please read my previous response to your previous message.Then I missed that post... perhaps during my surgery yesterday? I'd like an answer to "What does "wideband" mean? fL, fH, dB's?" If your desired LP corner is > 2*pi*Rload/Lload you've got problems, if < 2*pi*Rload/Lload, piece-a-cake. A definitive statement of the problem will produce definitive answers, otherwise blather and bloviations >:-} ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | STV, Queen Creek, AZ 85142 Skype: skypeanalog | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | Understanding is a fountain of life to one who has it, But the instruction of fools is folly. Proverbs 16:22
Broadband impedance matching of series RL load
Started by ●March 14, 2018
Reply by ●March 16, 20182018-03-16
Reply by ●March 16, 20182018-03-16
<dakupoto@gmail.com> wrote in message news:aba0b960-e495-4153-920e-28e02eaeb7b1@googlegroups.com...> As an addendum to my previous message, I am trying to come up with a > generalized scheme to tackle one-end reflections. I have drawn ideas from > published literature by Randy Rhea. I have > successfully tackled the parallel/series RC > case, and am trying to tackle parallel/series > RL loads. The basic idea is that based on energy conservation, the total > energy entering the matching network must be equal(within some applicable > tolerances) to the energy delivered to the load. Therefore I want to > measure the > RMS input/output power.If you [think you]'ve solved it for one case, then invert R --> 1/R, C --> 1/L (at w=1) and you're done here. Tim -- Seven Transistor Labs, LLC Electrical Engineering Consultation and Contract Design Website: https://www.seventransistorlabs.com/
Reply by ●March 17, 20182018-03-17
On Friday, March 16, 2018 at 10:05:40 PM UTC+5:30, Jim Thompson wrote:> On Fri, 16 Mar 2018 04:50:54 -0700 (PDT), dakupoto@gmail.com wrote: > > >On Friday, March 16, 2018 at 3:42:04 AM UTC+5:30, Jim Thompson wrote: > [snip] > >> >> Schematic? What does "wideband" mean? fL, fH, dB's? > >> >> > >> >> ...Jim Thompson > >> [snip] > >> > > [snip] > >> > > >> >Any hints/suggestions would be very helpful. > >> >Thanks in advance. > >> > >> Gozinta/gozouta specification? You're exhibiting the standard failure > >> here of thinking you can force what you think the solution should be > >> rather than specifying the desired results... sort like the "Searching > >> for an Op-Amp" fiasco >:-} > >> > >> (I actually have symbols in my spice library: gozinta, gozouta, and > >> gozbi... prettied-up _small_ port symbols ;-) > >> > [snip] > > NGspice, HSpice noted. LTspice requires all kinds of extra steps to > get to a numerically analyzable set of data points > > Unless HSpice has been recently neutered, I'd hazard a guess that it's > .PRINT statement will produce a table in the .OUT file that can pasted > into Excel or a curve-fitting program (which is what I mostly use it > for... for behavioral modeling ;-) > > > > >I am not forcing anything on anyone. Please read my previous response to your previous message. > > Then I missed that post... perhaps during my surgery yesterday? > > I'd like an answer to "What does "wideband" mean? fL, fH, dB's?" > > If your desired LP corner is > 2*pi*Rload/Lload you've got problems, > if < 2*pi*Rload/Lload, piece-a-cake. > > A definitive statement of the problem will produce definitive answers, > otherwise blather and bloviations >:-} > > ...Jim Thompson > -- > | James E.Thompson | mens | > | Analog Innovations | et | > | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | > | STV, Queen Creek, AZ 85142 Skype: skypeanalog | | > | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | > | E-mail Icon at http://www.analog-innovations.com | 1962 | > > Understanding is a fountain of life to one who has it, > But the instruction of fools is folly. Proverbs 16:22So, let us start with the LP corner < 2.0*PI*RLoad*Lload, What would be the solution ?
Reply by ●March 17, 20182018-03-17
On Friday, March 16, 2018 at 8:27:40 PM UTC+5:30, John Larkin wrote:> On Fri, 16 Mar 2018 04:12:22 -0700 (PDT), dakupoto@gmail.com wrote: > > >On Thursday, March 15, 2018 at 9:27:10 PM UTC+5:30, John Larkin wrote: > >> On Thu, 15 Mar 2018 05:30:38 -0700 (PDT), dakupoto@gmail.com wrote: > >> > >> >On Thursday, March 15, 2018 at 5:15:38 AM UTC+5:30, Jim Thompson wrote: > >> >> On Tue, 13 Mar 2018 23:39:57 -0700 (PDT), dakupoto@gmail.com wrote: > >> >> > >> >> >Could some electronics guru please help ? I am running some SPICE > >> >> >simulations on wideband impedance matching of the following setup. > >> >> >The source and load resistances are equal > >> >> >The source is a pure resistor > >> >> >Yhe load consists of a resistor(same value as source resistor) and > >> >> >a series inductor > >> >> >The matching network is a 6th order low pass filter with a > >> >> >series inductor as the last element. > >> >> >The RMS input power and the RMS output power are measured. > >> >> >The ratio RMS output power/RMS input power is very low, indicating > >> >> >poor matching and large invident signal reflection. How would the > >> >> >load inductor be bullified in a physically realizable way ? All > >> >> >hints/suggestions are welcome. Thanks in advance. > >> >> > > >> >> > > >> >> > >> >> Schematic? What does "wideband" mean? fL, fH, dB's? > >> >> > >> >> ...Jim Thompson > >> >> -- > >> >> | James E.Thompson | mens | > >> >> | Analog Innovations | et | > >> >> | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | > >> >> | STV, Queen Creek, AZ 85142 Skype: skypeanalog | | > >> >> | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | > >> >> | E-mail Icon at http://www.analog-innovations.com | 1962 | > >> >> > >> >> It's what you learn, after you know it all, that counts. > >> > > >> >The SPICE netlist is listed below: > >> >Low pass filter impedance matching > >> >* Identical load source resistance > >> >* and series load inductor > >> > > >> >.PARAMS FREQ=3.453144e+08 LLIM=1.726572e+07 HLIM=6.043003e+08 AMPL=10 > >> > > >> >.SUBCKT LPFILT 1 2 > >> >* 1 IN > >> >* 2 OUT > >> >C1 1 0 2.353875e-10 > >> >L2 1 3 6.431530e-10 > >> >C3 3 0 8.787569e-10 > >> >L4 3 4 8.791318e-10 > >> >C5 4 0 6.441774e-10 > >> >L6 4 2 2.367870e-10 > >> >.ENDS > >> > > >> >* COMMENT OUT TRANSIENT ANALYSIS > >> >* TO RUN AC ANALYSIS AND VICE-VERSA > >> > > >> >LLOAD 6 7 1.200000e-08 > >> >LCOMP 5 6 1.772026e-11 > >> >RSRC 1 2 50.000000 > >> >RLOAD 7 0 50.000000 > >> >XLP 3 4 LPFILT > >> >VTST0 2 3 DC 0.0 AC 0.0 > >> >VTST1 4 5 DC 0.0 AC 0.0 > >> > > >> >* FOR TRANSIENT ANALYSIS > >> >VSIG 1 0 DC 0.005 SIN(0 {AMPL} {FREQ} 0 0 0) > >> >* FOR AC(SMALL SIGNAL) ANALYSIS > >> >VSIG 1 0 DC 0.005 AC {AMPL}) > >> > > >> >.OPTIONS METHOD=GEAR NOPAGE RELTOL=1m MINBREAK=5ps > >> >.IC > >> >.TRAN 75.0ns 500.0us 50.0ns UIC > >> >* INPUT/SOURCE SIDE > >> >.PRINT TRAN V(3) I(VTST0) > >> >* LOAD/OUTPUT SIDE > >> >.PRINT TRAN V(4) I(VTST1) > >> > > >> >.AC LIN 20000 {LLIM} {HLIM} > >> >.PRINT AC V(5) > >> >** FOR REFLECTION COEFFICIENT ETC., > >> >.PRINT AC V(2) > >> >.END > >> > > >> >Any hints/suggestions would be very helpful. > >> >Thanks in advance. > >> > >> Can you post a visible schematic? > >> > >> I still don't know what you are trying to do. > >> > >> I've done some work lately on one-end-reflectionless lowpass filters, > >> based on Jeroen's concepts. Mini-Circuits has some interesting new > >> symmetric filters, both-ends-reflectionless. > >> > >> > >> -- > >> > >> John Larkin Highland Technology, Inc > >> > >> lunatic fringe electronics > > > >I am afraid I do not have a visible schematic. I use HSpice at work, and Ngspice at home, both of which use the text input. It is sometimes bothersome to enter a new large netlist, but > >editing is very easy. > > Just a sketch would help. I don't know what you are trying to do. > > LT Spice lets you draw a schematic instantly. Typing (and reading!) > netlists is really old-fashioned. > > > > > -- > > John Larkin Highland Technology, Inc > > lunatic fringe electronicsThe setup is simple : A signal source feeds a low pass ladder matching network, e.g., of order 6. The source impedance is purely resistive (NO source reactance). The load is a resistor in series with an inductor. The load and source resistors have the same value So how do I compensate for the frequency dependent load inductor ?
Reply by ●March 17, 20182018-03-17
On Saturday, March 17, 2018 at 12:03:41 AM UTC+5:30, Tim Williams wrote:> <dakupoto@gmail.com> wrote in message > news:aba0b960-e495-4153-920e-28e02eaeb7b1@googlegroups.com... > > As an addendum to my previous message, I am trying to come up with a > > generalized scheme to tackle one-end reflections. I have drawn ideas from > > published literature by Randy Rhea. I have > > successfully tackled the parallel/series RC > > case, and am trying to tackle parallel/series > > RL loads. The basic idea is that based on energy conservation, the total > > energy entering the matching network must be equal(within some applicable > > tolerances) to the energy delivered to the load. Therefore I want to > > measure the > > RMS input/output power. > > If you [think you]'ve solved it for one case, then invert R --> 1/R, C --> > 1/L (at w=1) and you're done here. > > Tim > > -- > Seven Transistor Labs, LLC > Electrical Engineering Consultation and Contract Design > Website: https://www.seventransistorlabs.com/I am afraid your suggested solution is very vague. Suppose the load inductor is 1 microHenry. Inverting this, the corresponding capacitor would have a value if 1 Mega Farad -- not physically realizable. Are you talking in terms of reactance in Ohms ? If so, what would be the frequency ?
Reply by ●March 17, 20182018-03-17
<dakupoto@gmail.com> wrote in message news:cebd7825-b7be-4dd0-9442-0a22f5a5d686@googlegroups.com...> I am afraid your suggested solution is very vague. Suppose the load > inductor is 1 microHenry. > Inverting this, the corresponding capacitor > would have a value if 1 Mega Farad -- not physically realizable. Are you > talking in terms of reactance in Ohms ? If so, what would be the > frequency ?Filters are designed at unity frequency. I can't write lowercase omega, so I said w=1 which looks similar. Use the same transformations as from any filter table to get Zo and Fo. Tim -- Seven Transistor Labs, LLC Electrical Engineering Consultation and Contract Design Website: https://www.seventransistorlabs.com/
Reply by ●March 17, 20182018-03-17
On Sat, 17 Mar 2018 00:09:28 -0700 (PDT), dakupoto@gmail.com wrote:>On Friday, March 16, 2018 at 8:27:40 PM UTC+5:30, John Larkin wrote: >> On Fri, 16 Mar 2018 04:12:22 -0700 (PDT), dakupoto@gmail.com wrote: >> >> >On Thursday, March 15, 2018 at 9:27:10 PM UTC+5:30, John Larkin wrote: >> >> On Thu, 15 Mar 2018 05:30:38 -0700 (PDT), dakupoto@gmail.com wrote: >> >> >> >> >On Thursday, March 15, 2018 at 5:15:38 AM UTC+5:30, Jim Thompson wrote: >> >> >> On Tue, 13 Mar 2018 23:39:57 -0700 (PDT), dakupoto@gmail.com wrote: >> >> >> >> >> >> >Could some electronics guru please help ? I am running some SPICE >> >> >> >simulations on wideband impedance matching of the following setup. >> >> >> >The source and load resistances are equal >> >> >> >The source is a pure resistor >> >> >> >Yhe load consists of a resistor(same value as source resistor) and >> >> >> >a series inductor >> >> >> >The matching network is a 6th order low pass filter with a >> >> >> >series inductor as the last element. >> >> >> >The RMS input power and the RMS output power are measured. >> >> >> >The ratio RMS output power/RMS input power is very low, indicating >> >> >> >poor matching and large invident signal reflection. How would the >> >> >> >load inductor be bullified in a physically realizable way ? All >> >> >> >hints/suggestions are welcome. Thanks in advance. >> >> >> > >> >> >> > >> >> >> >> >> >> Schematic? What does "wideband" mean? fL, fH, dB's? >> >> >> >> >> >> ...Jim Thompson >> >> >> -- >> >> >> | James E.Thompson | mens | >> >> >> | Analog Innovations | et | >> >> >> | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | >> >> >> | STV, Queen Creek, AZ 85142 Skype: skypeanalog | | >> >> >> | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | >> >> >> | E-mail Icon at http://www.analog-innovations.com | 1962 | >> >> >> >> >> >> It's what you learn, after you know it all, that counts. >> >> > >> >> >The SPICE netlist is listed below: >> >> >Low pass filter impedance matching >> >> >* Identical load source resistance >> >> >* and series load inductor >> >> > >> >> >.PARAMS FREQ=3.453144e+08 LLIM=1.726572e+07 HLIM=6.043003e+08 AMPL=10 >> >> > >> >> >.SUBCKT LPFILT 1 2 >> >> >* 1 IN >> >> >* 2 OUT >> >> >C1 1 0 2.353875e-10 >> >> >L2 1 3 6.431530e-10 >> >> >C3 3 0 8.787569e-10 >> >> >L4 3 4 8.791318e-10 >> >> >C5 4 0 6.441774e-10 >> >> >L6 4 2 2.367870e-10 >> >> >.ENDS >> >> > >> >> >* COMMENT OUT TRANSIENT ANALYSIS >> >> >* TO RUN AC ANALYSIS AND VICE-VERSA >> >> > >> >> >LLOAD 6 7 1.200000e-08 >> >> >LCOMP 5 6 1.772026e-11 >> >> >RSRC 1 2 50.000000 >> >> >RLOAD 7 0 50.000000 >> >> >XLP 3 4 LPFILT >> >> >VTST0 2 3 DC 0.0 AC 0.0 >> >> >VTST1 4 5 DC 0.0 AC 0.0 >> >> > >> >> >* FOR TRANSIENT ANALYSIS >> >> >VSIG 1 0 DC 0.005 SIN(0 {AMPL} {FREQ} 0 0 0) >> >> >* FOR AC(SMALL SIGNAL) ANALYSIS >> >> >VSIG 1 0 DC 0.005 AC {AMPL}) >> >> > >> >> >.OPTIONS METHOD=GEAR NOPAGE RELTOL=1m MINBREAK=5ps >> >> >.IC >> >> >.TRAN 75.0ns 500.0us 50.0ns UIC >> >> >* INPUT/SOURCE SIDE >> >> >.PRINT TRAN V(3) I(VTST0) >> >> >* LOAD/OUTPUT SIDE >> >> >.PRINT TRAN V(4) I(VTST1) >> >> > >> >> >.AC LIN 20000 {LLIM} {HLIM} >> >> >.PRINT AC V(5) >> >> >** FOR REFLECTION COEFFICIENT ETC., >> >> >.PRINT AC V(2) >> >> >.END >> >> > >> >> >Any hints/suggestions would be very helpful. >> >> >Thanks in advance. >> >> >> >> Can you post a visible schematic? >> >> >> >> I still don't know what you are trying to do. >> >> >> >> I've done some work lately on one-end-reflectionless lowpass filters, >> >> based on Jeroen's concepts. Mini-Circuits has some interesting new >> >> symmetric filters, both-ends-reflectionless. >> >> >> >> >> >> -- >> >> >> >> John Larkin Highland Technology, Inc >> >> >> >> lunatic fringe electronics >> > >> >I am afraid I do not have a visible schematic. I use HSpice at work, and Ngspice at home, both of which use the text input. It is sometimes bothersome to enter a new large netlist, but >> >editing is very easy. >> >> Just a sketch would help. I don't know what you are trying to do. >> >> LT Spice lets you draw a schematic instantly. Typing (and reading!) >> netlists is really old-fashioned. >> >> >> >> >> -- >> >> John Larkin Highland Technology, Inc >> >> lunatic fringe electronics > >The setup is simple : >A signal source feeds a low pass ladder matching network, e.g., of order 6. The source impedance is purely resistive (NO source reactance). The load is a resistor in series with an inductor. The load and source resistors have the same value >So how do I compensate for the frequency dependent load inductor ?I think the answer is trivial, but if you refuse to show a sketch, I refuse to talk about it. -- John Larkin Highland Technology, Inc lunatic fringe electronics
Reply by ●March 17, 20182018-03-17
On Fri, 16 Mar 2018 23:57:38 -0700 (PDT), dakupoto@gmail.com wrote:>On Friday, March 16, 2018 at 10:05:40 PM UTC+5:30, Jim Thompson wrote: >> On Fri, 16 Mar 2018 04:50:54 -0700 (PDT), dakupoto@gmail.com wrote: >> >> >On Friday, March 16, 2018 at 3:42:04 AM UTC+5:30, Jim Thompson wrote: >> [snip] >> >> >> Schematic? What does "wideband" mean? fL, fH, dB's? >> >> >> >> >> >> ...Jim Thompson >> >> [snip] >> >> > >> [snip] >> >> > >> >> >Any hints/suggestions would be very helpful. >> >> >Thanks in advance. >> >> >> >> Gozinta/gozouta specification? You're exhibiting the standard failure >> >> here of thinking you can force what you think the solution should be >> >> rather than specifying the desired results... sort like the "Searching >> >> for an Op-Amp" fiasco >:-} >> >> >> >> (I actually have symbols in my spice library: gozinta, gozouta, and >> >> gozbi... prettied-up _small_ port symbols ;-) >> >> >> [snip] >> >> NGspice, HSpice noted. LTspice requires all kinds of extra steps to >> get to a numerically analyzable set of data points >> >> Unless HSpice has been recently neutered, I'd hazard a guess that it's >> .PRINT statement will produce a table in the .OUT file that can pasted >> into Excel or a curve-fitting program (which is what I mostly use it >> for... for behavioral modeling ;-) >> >> > >> >I am not forcing anything on anyone. Please read my previous response to your previous message. >> >> Then I missed that post... perhaps during my surgery yesterday? >> >> I'd like an answer to "What does "wideband" mean? fL, fH, dB's?" >> >> If your desired LP corner is > 2*pi*Rload/Lload you've got problems, >> if < 2*pi*Rload/Lload, piece-a-cake. >> >> A definitive statement of the problem will produce definitive answers, >> otherwise blather and bloviations >:-} >> >> ...Jim Thompson[snip]> >So, let us start with the LP corner < 2.0*PI*RLoad*Lload, > >What would be the solution ?I'll post later today. Hope I got that right for frequency... bit foggy-brained after the surgery... it's _lower_ than the natural corner of Rload and LLoad ;-) ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | STV, Queen Creek, AZ 85142 Skype: skypeanalog | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | Understanding is a fountain of life to one who has it, But the instruction of fools is folly. Proverbs 16:22
Reply by ●March 17, 20182018-03-17
On 03/17/18 02:57, dakupoto@gmail.com wrote:> On Friday, March 16, 2018 at 10:05:40 PM UTC+5:30, Jim Thompson wrote: >> On Fri, 16 Mar 2018 04:50:54 -0700 (PDT), dakupoto@gmail.com wrote: >> >>> On Friday, March 16, 2018 at 3:42:04 AM UTC+5:30, Jim Thompson wrote: >> [snip] >>>>>> Schematic? What does "wideband" mean? fL, fH, dB's? >>>>>> >>>>>> ...Jim Thompson >>>> [snip] >>>>> >> [snip] >>>>> >>>>> Any hints/suggestions would be very helpful. >>>>> Thanks in advance. >>>> >>>> Gozinta/gozouta specification? You're exhibiting the standard failure >>>> here of thinking you can force what you think the solution should be >>>> rather than specifying the desired results... sort like the "Searching >>>> for an Op-Amp" fiasco >:-} >>>> >>>> (I actually have symbols in my spice library: gozinta, gozouta, and >>>> gozbi... prettied-up _small_ port symbols ;-) >>>> >> [snip] >> >> NGspice, HSpice noted. LTspice requires all kinds of extra steps to >> get to a numerically analyzable set of data points >> >> Unless HSpice has been recently neutered, I'd hazard a guess that it's >> .PRINT statement will produce a table in the .OUT file that can pasted >> into Excel or a curve-fitting program (which is what I mostly use it >> for... for behavioral modeling ;-) >> >>> >>> I am not forcing anything on anyone. Please read my previous response to your previous message. >> >> Then I missed that post... perhaps during my surgery yesterday? >> >> I'd like an answer to "What does "wideband" mean? fL, fH, dB's?" >> >> If your desired LP corner is > 2*pi*Rload/Lload you've got problems, >> if < 2*pi*Rload/Lload, piece-a-cake. >> >> A definitive statement of the problem will produce definitive answers, >> otherwise blather and bloviations >:-} >> >> ...Jim Thompson >> -- >> | James E.Thompson | mens | >> | Analog Innovations | et | >> | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | >> | STV, Queen Creek, AZ 85142 Skype: skypeanalog | | >> | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | >> | E-mail Icon at http://www.analog-innovations.com | 1962 | >> >> Understanding is a fountain of life to one who has it, >> But the instruction of fools is folly. Proverbs 16:22 > > So, let us start with the LP corner < 2.0*PI*RLoad*Lload, > > What would be the solution ? >There's a tradeoff between the log of the return loss and bandwidth--it's a theorem of Bode's, so of course it's called the Fano-Bode limit. See e.g. http://www.ece.ucsb.edu/~long/ece145a/zmatch.pdf Cheers Phil Hobbs -- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC / Hobbs ElectroOptics Optics, Electro-optics, Photonics, Analog Electronics Briarcliff Manor NY 10510 http://electrooptical.net http://hobbs-eo.com
Reply by ●March 17, 20182018-03-17
On Sat, 17 Mar 2018 08:54:00 -0700, John Larkin <jjlarkin@highlandtechnology.com> wrote: [snip]> >I think the answer is trivial, but if you refuse to show a sketch, I >refuse to talk about it.Larkin's "gentleman/scholar" attitude speaks for itself. ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | STV, Queen Creek, AZ 85142 Skype: skypeanalog | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | Understanding is a fountain of life to one who has it, But the instruction of fools is folly. Proverbs 16:22
