On Tuesday, March 13, 2018 at 7:46:37 PM UTC-7, John Larkin wrote:> On Wed, 14 Mar 2018 00:24:34 GMT, Steve Wilson <no@spam.com> wrote: > > >John Larkin <jjlarkin@highland_snip_technology.com> wrote: > > > >> "Deck" means "punched card deck." Punch cards were a huge improvement > >> over paper tape. > > > >Except when you drop a box of 4,000 cards:) > > Once you have a program, draw a big diagonal line across the top of > the cards. > > You could also color-code subroutines and data blocks and such.That's easy for YOU to say: you got the box of 24!
Dot allowed as characters allowed in netlist?
Started by ●March 11, 2018
Reply by ●March 14, 20182018-03-14
Reply by ●March 14, 20182018-03-14
John Larkin <jjlarkin@highlandtechnology.com> wrote:> On Wed, 14 Mar 2018 00:24:34 GMT, Steve Wilson <no@spam.com> wrote:>>John Larkin <jjlarkin@highland_snip_technology.com> wrote:>>> "Deck" means "punched card deck." Punch cards were a huge improvement >>> over paper tape.>>Except when you drop a box of 4,000 cards:)Actually, a box has 2,000 cards.> Once you have a program, draw a big diagonal line across the top of > the cards.This is mentioned in a number of places: https://en.wikipedia.org/wiki/Computer_programming_in_the_punched_card_era http://www.columbia.edu/cu/computinghistory/sorter.html http://wiki.c2.com/?HollerithPunchCard (url was double-checked and correct) The problem with a diagonal line is it may not give the exact sequence position of every card, especially for a large deck.> You could also color-code subroutines and data blocks and such.Also mentioned.
Reply by ●March 14, 20182018-03-14
On 2018-03-13 19:44, John Larkin wrote:> On Tue, 13 Mar 2018 16:14:52 -0700, Joerg <news@analogconsultants.com> > wrote: > >> On 2018-03-13 15:31, John Larkin wrote:[...]>>> I don't manually check PCB netlists for connectivity; it's never >>> wrong. I do sometimes read a netlist to make sure I haven't mis-named >>> nets, like CLOCK12 on one sheet and CLK12 on another. >>> >> >> That's another error that can happen. Then there is the run of a wire >> into the wrong net and it got overlooked because the schematic is very >> busy. When tracing off the netlist in the schematic it's "Hey, wait a >> minute, why does this connect to the 7th line and not the 8th?". > > I don't like busses. One of my guys once named a bus ADDR[15:0] on one > sheet and ADDR[0:15] on another. So we had to write a program to > shuffle the programming file for an EPROM. >Can be worse. Designing an ultrasound machine a 32-bit analog bus between boards became mangled that way. So a cable had to be made that had sort of a Moebius loop in it. Since this was all coaxes it was quite stiff, meaning shield and bezel could not be locked in place anymore. -- Regards, Joerg http://www.analogconsultants.com/
Reply by ●March 14, 20182018-03-14
On Wednesday, March 14, 2018 at 2:43:29 AM UTC+11, John Larkin wrote:> On Mon, 12 Mar 2018 17:43:07 -0700 (PDT), whit3rd <whit3rd@gmail.com> > wrote: > > >On Sunday, March 11, 2018 at 1:59:26 PM UTC-7, John Larkin wrote: > > > >> The original justification was that decimal points were somehow > >> fragile and got lost on drawings, so the wrong parts values got > >> installed. It was nonsense of course. > > > >Too young to recall thermal fax machines? > >Lines that crossed got rather fat at the intersection, > >and the images faded over time. > > I started with hand-drawn schematics on vellum, and blueprint > machines. And I still use both. And I never lose or mistake decimal > points or tie points. Maybe that's because I had two semisters of > engineering drawing in college.The remedial spelling didn't work. It's "semesters". And decimal points are smaller than other characters, and less reliably detectable in consequence. That's elementary physics ...> I don't think that a D-size schematic could be FAXd, then or now. > > A lot of current "wisdom" is left over from olden days, and especially > bad, amateur habits of olden days. We have computers now. Parts lists > are generated automatically from our schematics, and computers don't > mistake decimal points for coffee stains. Software gets the net lists > right even when two wires cross.But the people who read the schematics haven't been up-graded in the same way.> Scientific notation and SI units are correct. The 4K7 thing is amateur > audio nonsense.Professional audio, and a whole lot of other high-value electronics, would beg to differ. It's certainly the drawing convention that was in use where I worked in the UK and the Netherlands, on million-dollar electron-beam microfabricators and other high end gear. US physicists have funny ideas about electronics, which show up from time to time Rev.Sci. Instrum. Phil Hobbs is more the exception than the rule. -- Bill Sloman, Sydney
Reply by ●March 14, 20182018-03-14
On 2018-03-13 17:11, krw@notreal.com wrote:> On Tue, 13 Mar 2018 14:38:35 -0700, Joerg <news@analogconsultants.com> > wrote: > >> On 2018-03-13 08:43, John Larkin wrote:[...]>>> Scientific notation and SI units are correct. The 4K7 thing is amateur >>> audio nonsense. >>> >> >> It was worse in the old days. Often a schematic said .001 with no units >> whatsoever and you had to guess from the function of the circuit what >> that meant. Not a problem for us seasoned guys but that could throw >> freshly minted engineers a curve. > > There was usually a note that said something like "all capacitance > values in microfarads and all resistance values in k-ohms, unless > otherwise noted). >A group of engineers from Europe joined a US team. A prototype had to be made in the machine shop. A few days and $800 cross-charged Dollars later ... "This is way off in size!" ... "No, it's accurate. For example, you said this side should be 342 mils and it is" (holding caliper to it) ... "But, but, no, with mil I meant millimeters". -- Regards, Joerg http://www.analogconsultants.com/
Reply by ●March 14, 20182018-03-14
On 2018-03-13 17:16, krw@notreal.com wrote:> On Tue, 13 Mar 2018 16:03:57 -0700, Joerg <news@analogconsultants.com> > wrote: > >> On 2018-03-13 15:11, Lasse Langwadt Christensen wrote: >>> Den tirsdag den 13. marts 2018 kl. 22.38.37 UTC+1 skrev Joerg: >>>> On 2018-03-13 08:43, John Larkin wrote: >>>>> On Mon, 12 Mar 2018 17:43:07 -0700 (PDT), whit3rd <whit3rd@gmail.com> >>>>> wrote: >>>>> >>>>>> On Sunday, March 11, 2018 at 1:59:26 PM UTC-7, John Larkin wrote: >>>>>> >>>>>>> The original justification was that decimal points were somehow >>>>>>> fragile and got lost on drawings, so the wrong parts values got >>>>>>> installed. It was nonsense of course. >>>>>> >>>>>> Too young to recall thermal fax machines? >>>>>> Lines that crossed got rather fat at the intersection, >>>>>> and the images faded over time. >>>>> >>>>> I started with hand-drawn schematics on vellum, and blueprint >>>>> machines. And I still use both. And I never lose or mistake decimal >>>>> points or tie points. Maybe that's because I had two semisters of >>>>> engineering drawing in college. >>>>> >>>>> I don't think that a D-size schematic could be FAXd, then or now. >>>>> >>>>> A lot of current "wisdom" is left over from olden days, and especially >>>>> bad, amateur habits of olden days. We have computers now. Parts lists >>>>> are generated automatically from our schematics, and computers don't >>>>> mistake decimal points for coffee stains. Software gets the net lists >>>>> right even when two wires cross. >>>>> >>>> >>>> I have found bugs in netlists. Mostly where wires looked like they >>>> connected to a component but didn't. I check every schematic on all my >>>> designs against the netlist by hand. Doing one right now. It's tedious >>>> grunt work but better safe that sorry. >>> >>> missing connections to a component should be caught by ERC >>> >> >> Not if, for example, the pin is declared as output in the symbol because >> leaving outputs unconnected is perfectly ok. Same for I/O or passive. > > These pins should (have to) be marked as not connected. >The x's like Lasse showed aren't very customary anymore these days. Some CAD systems could even choke on those if you placed some. -- Regards, Joerg http://www.analogconsultants.com/
Reply by ●March 14, 20182018-03-14
On Wed, 14 Mar 2018 08:00:27 -0700, Joerg <news@analogconsultants.com> wrote:>On 2018-03-13 17:16, krw@notreal.com wrote: >> On Tue, 13 Mar 2018 16:03:57 -0700, Joerg <news@analogconsultants.com> >> wrote: >> >>> On 2018-03-13 15:11, Lasse Langwadt Christensen wrote: >>>> Den tirsdag den 13. marts 2018 kl. 22.38.37 UTC+1 skrev Joerg: >>>>> On 2018-03-13 08:43, John Larkin wrote: >>>>>> On Mon, 12 Mar 2018 17:43:07 -0700 (PDT), whit3rd <whit3rd@gmail.com> >>>>>> wrote: >>>>>> >>>>>>> On Sunday, March 11, 2018 at 1:59:26 PM UTC-7, John Larkin wrote: >>>>>>> >>>>>>>> The original justification was that decimal points were somehow >>>>>>>> fragile and got lost on drawings, so the wrong parts values got >>>>>>>> installed. It was nonsense of course. >>>>>>> >>>>>>> Too young to recall thermal fax machines? >>>>>>> Lines that crossed got rather fat at the intersection, >>>>>>> and the images faded over time. >>>>>> >>>>>> I started with hand-drawn schematics on vellum, and blueprint >>>>>> machines. And I still use both. And I never lose or mistake decimal >>>>>> points or tie points. Maybe that's because I had two semisters of >>>>>> engineering drawing in college. >>>>>> >>>>>> I don't think that a D-size schematic could be FAXd, then or now. >>>>>> >>>>>> A lot of current "wisdom" is left over from olden days, and especially >>>>>> bad, amateur habits of olden days. We have computers now. Parts lists >>>>>> are generated automatically from our schematics, and computers don't >>>>>> mistake decimal points for coffee stains. Software gets the net lists >>>>>> right even when two wires cross. >>>>>> >>>>> >>>>> I have found bugs in netlists. Mostly where wires looked like they >>>>> connected to a component but didn't. I check every schematic on all my >>>>> designs against the netlist by hand. Doing one right now. It's tedious >>>>> grunt work but better safe that sorry. >>>> >>>> missing connections to a component should be caught by ERC >>>> >>> >>> Not if, for example, the pin is declared as output in the symbol because >>> leaving outputs unconnected is perfectly ok. Same for I/O or passive. >> >> These pins should (have to) be marked as not connected. >> > >The x's like Lasse showed aren't very customary anymore these days. Some >CAD systems could even choke on those if you placed some.There is a strong tendency among tekkies to automate things that they should just do themselves. Why do the grunt work of checking your design or code when you can buy some fancy tools/toys to do it for you? Problem is, the fancy tools can't understand your parts, requirements, or intent. Some tools, like PCB clearance and connectivity checks are great and don't (much) encourage bad habits. Some tools switch off thinking. But you *can* blame the tools/toys when the board doesn't work. -- John Larkin Highland Technology, Inc lunatic fringe electronics
Reply by ●March 14, 20182018-03-14
On Wed, 14 Mar 2018 08:00:27 -0700, Joerg <news@analogconsultants.com> wrote:>On 2018-03-13 17:16, krw@notreal.com wrote: >> On Tue, 13 Mar 2018 16:03:57 -0700, Joerg <news@analogconsultants.com> >> wrote: >> >>> On 2018-03-13 15:11, Lasse Langwadt Christensen wrote: >>>> Den tirsdag den 13. marts 2018 kl. 22.38.37 UTC+1 skrev Joerg: >>>>> On 2018-03-13 08:43, John Larkin wrote: >>>>>> On Mon, 12 Mar 2018 17:43:07 -0700 (PDT), whit3rd <whit3rd@gmail.com> >>>>>> wrote: >>>>>> >>>>>>> On Sunday, March 11, 2018 at 1:59:26 PM UTC-7, John Larkin wrote: >>>>>>> >>>>>>>> The original justification was that decimal points were somehow >>>>>>>> fragile and got lost on drawings, so the wrong parts values got >>>>>>>> installed. It was nonsense of course. >>>>>>> >>>>>>> Too young to recall thermal fax machines? >>>>>>> Lines that crossed got rather fat at the intersection, >>>>>>> and the images faded over time. >>>>>> >>>>>> I started with hand-drawn schematics on vellum, and blueprint >>>>>> machines. And I still use both. And I never lose or mistake decimal >>>>>> points or tie points. Maybe that's because I had two semisters of >>>>>> engineering drawing in college. >>>>>> >>>>>> I don't think that a D-size schematic could be FAXd, then or now. >>>>>> >>>>>> A lot of current "wisdom" is left over from olden days, and especially >>>>>> bad, amateur habits of olden days. We have computers now. Parts lists >>>>>> are generated automatically from our schematics, and computers don't >>>>>> mistake decimal points for coffee stains. Software gets the net lists >>>>>> right even when two wires cross. >>>>>> >>>>> >>>>> I have found bugs in netlists. Mostly where wires looked like they >>>>> connected to a component but didn't. I check every schematic on all my >>>>> designs against the netlist by hand. Doing one right now. It's tedious >>>>> grunt work but better safe that sorry. >>>> >>>> missing connections to a component should be caught by ERC >>>> >>> >>> Not if, for example, the pin is declared as output in the symbol because >>> leaving outputs unconnected is perfectly ok. Same for I/O or passive. >> >> These pins should (have to) be marked as not connected. >> > >The x's like Lasse showed aren't very customary anymore these days. Some >CAD systems could even choke on those if you placed some.That's really dumb. ...but ours is all that and worse.
Reply by ●March 14, 20182018-03-14
On Tue, 13 Mar 2018 19:44:19 -0700, John Larkin <jjlarkin@highlandtechnology.com> wrote:>On Tue, 13 Mar 2018 16:14:52 -0700, Joerg <news@analogconsultants.com> >wrote: > >>On 2018-03-13 15:31, John Larkin wrote: >>> On Tue, 13 Mar 2018 14:38:35 -0700, Joerg <news@analogconsultants.com> >>> wrote: >>> >>>> On 2018-03-13 08:43, John Larkin wrote: >>>>> On Mon, 12 Mar 2018 17:43:07 -0700 (PDT), whit3rd <whit3rd@gmail.com> >>>>> wrote: >>>>> >>>>>> On Sunday, March 11, 2018 at 1:59:26 PM UTC-7, John Larkin wrote: >>>>>> >>>>>>> The original justification was that decimal points were somehow >>>>>>> fragile and got lost on drawings, so the wrong parts values got >>>>>>> installed. It was nonsense of course. >>>>>> >>>>>> Too young to recall thermal fax machines? >>>>>> Lines that crossed got rather fat at the intersection, >>>>>> and the images faded over time. >>>>> >>>>> I started with hand-drawn schematics on vellum, and blueprint >>>>> machines. And I still use both. And I never lose or mistake decimal >>>>> points or tie points. Maybe that's because I had two semisters of >>>>> engineering drawing in college. >>>>> >>>>> I don't think that a D-size schematic could be FAXd, then or now. >>>>> >>>>> A lot of current "wisdom" is left over from olden days, and especially >>>>> bad, amateur habits of olden days. We have computers now. Parts lists >>>>> are generated automatically from our schematics, and computers don't >>>>> mistake decimal points for coffee stains. Software gets the net lists >>>>> right even when two wires cross. >>>>> >>>> >>>> I have found bugs in netlists. Mostly where wires looked like they >>>> connected to a component but didn't. I check every schematic on all my >>>> designs against the netlist by hand. Doing one right now. It's tedious >>>> grunt work but better safe that sorry. >>> >>> Some bad schematic software, like OrCad, allowed one to miss a >>> connection by a single pixel, and get an open circuit. LT Spice can do >>> things like that. PADS does not allow a wire to terminate into free >>> space; every wire end must terminate connected to a part pin, or a big >>> fat dot to another wire. It's impossible to create an open end or a >>> free-floating wire segment. >>> >> >>That's how it should be. Even Eagle misses that at times so the drill is >>to move all the parts at the end and see if everything rubber-bands >>along. Other than that it is fairly good though I won't make the >>transition to the new owner's "license tax model". >> >> >>> I don't manually check PCB netlists for connectivity; it's never >>> wrong. I do sometimes read a netlist to make sure I haven't mis-named >>> nets, like CLOCK12 on one sheet and CLK12 on another. >>> >> >>That's another error that can happen. Then there is the run of a wire >>into the wrong net and it got overlooked because the schematic is very >>busy. When tracing off the netlist in the schematic it's "Hey, wait a >>minute, why does this connect to the 7th line and not the 8th?". > >I don't like busses. One of my guys once named a bus ADDR[15:0] on one >sheet and ADDR[0:15] on another. So we had to write a program to >shuffle the programming file for an EPROM....and you didn't check that in your design review? Tsk. Tsk.
Reply by ●March 14, 20182018-03-14
On Wed, 14 Mar 2018 07:51:56 -0700, Joerg <news@analogconsultants.com> wrote:>On 2018-03-13 19:44, John Larkin wrote: >> On Tue, 13 Mar 2018 16:14:52 -0700, Joerg <news@analogconsultants.com> >> wrote: >> >>> On 2018-03-13 15:31, John Larkin wrote: > >[...] > >>>> I don't manually check PCB netlists for connectivity; it's never >>>> wrong. I do sometimes read a netlist to make sure I haven't mis-named >>>> nets, like CLOCK12 on one sheet and CLK12 on another. >>>> >>> >>> That's another error that can happen. Then there is the run of a wire >>> into the wrong net and it got overlooked because the schematic is very >>> busy. When tracing off the netlist in the schematic it's "Hey, wait a >>> minute, why does this connect to the 7th line and not the 8th?". >> >> I don't like busses. One of my guys once named a bus ADDR[15:0] on one >> sheet and ADDR[0:15] on another. So we had to write a program to >> shuffle the programming file for an EPROM. >> > >Can be worse. Designing an ultrasound machine a 32-bit analog bus >between boards became mangled that way. So a cable had to be made that >had sort of a Moebius loop in it. Since this was all coaxes it was quite >stiff, meaning shield and bezel could not be locked in place anymore.That's the _one_ thing I like about our schematic entry system. Busses are really just a collection of wires. The individual strands in the bundle can be named anything. They make the schematics more readable but there is no implied order (though that should never be a problem - you should know big-endian from little-endian). So, I'll have an I2C bus, for instance, named "UC_DACS_I2C" (UC owns the bus, it used for the DACs, and its type is I2C). The strands of the bundle might be named "UC_DACS_SDA", "UC_DACS_SCL", "UC_DACS_DAC0IRQ", and "UC_DACS_DAC1IRQ".
