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AN: TL598 Spice Model

Started by Jim Thompson August 9, 2015
Awhile back someone on the LTspice List requested a TL598 Spice model.

While somewhat obsolete, it intrigued me, and proved to be somewhat of
a !#$* to model... but it caused me to develop a few new functions in
my behavioral modeling repertoire.

It can be found at TL598.zip on the Device Models & Subcircuits Page
of my website... including an LTspice symbol.

Modeling is based only from information given in the datasheet and an
ap-note... so it may be lacking.

As usual direct comments/questions/suggestions to the LTspice List or
via the E-mail envelope icon on my Home Page.

Enjoy!  (I hope ;-)
		
                                        ...Jim Thompson
-- 
| James E.Thompson                                 |    mens     |
| Analog Innovations                               |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| San Tan Valley, AZ 85142     Skype: skypeanalog  |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |
             
I love to cook with wine.     Sometimes I even put it in the food.
Hi, Jim,

If you've got some spare bandwidth, I could really use an improved OPA2140 model.

It's a very good part for moderate speed, low current, high linearity TIAs, but it's a bear to simulate because the model won't converge on an operating point in LTspice.  

 I took the TINA model TI supplies and replaced the VSWITCH cards with LTspice SW cards with negative hysteresis (more or less like your fave tanh curve), but it still won't converge on ac or noise sims. 

Thanks

Phil Hobbs
On Sun, 9 Aug 2015 16:24:53 -0700 (PDT), Phil Hobbs
<pcdhobbs@gmail.com> wrote:

>Hi, Jim, > >If you've got some spare bandwidth, I could really use an improved OPA2140 model. > >It's a very good part for moderate speed, low current, high linearity TIAs, but it's a bear to simulate because the model won't converge on an operating point in LTspice. > > I took the TINA model TI supplies and replaced the VSWITCH cards with LTspice SW cards with negative hysteresis (more or less like your fave tanh curve), but it still won't converge on ac or noise sims. > >Thanks > >Phil Hobbs
I'm doing random models on a "fill-in" basis, so I'll take a look... might be two or more weeks. Usually TI also provides a PSpice model. Have you looked for that? They usually will run on LTspice. ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: skypeanalog | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
On Sun, 9 Aug 2015 16:24:53 -0700 (PDT), Phil Hobbs
<pcdhobbs@gmail.com> wrote:

>Hi, Jim, > >If you've got some spare bandwidth, I could really use an improved OPA2140 model. > >It's a very good part for moderate speed, low current, high linearity TIAs, but it's a bear to simulate because the model won't converge on an operating point in LTspice. > > I took the TINA model TI supplies and replaced the VSWITCH cards with LTspice SW cards with negative hysteresis (more or less like your fave tanh curve), but it still won't converge on ac or noise sims. > >Thanks > >Phil Hobbs
Took a quicky peek at the PSpice OPA2140 model... it doesn't like to queue up with input starting at rail... so I'm guessing all that switch crap is swing limiting... but works just fine from zero +/- I did an AC at +/-5V supplies... shows serious feed-thru starting just above 60MHz. How are you using it, and what do you need modeled? What are your conditions when you have convergence issues? Could be that a significantly simplified model would serve your purpose? ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: skypeanalog | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
On 08/10/2015 11:03 AM, Jim Thompson wrote:
> On Sun, 9 Aug 2015 16:24:53 -0700 (PDT), Phil Hobbs > <pcdhobbs@gmail.com> wrote: > >> Hi, Jim, >> >> If you've got some spare bandwidth, I could really use an improved OPA2140 model. >> >> It's a very good part for moderate speed, low current, high linearity TIAs, but it's a bear to simulate because the model won't converge on an operating point in LTspice. >> >> I took the TINA model TI supplies and replaced the VSWITCH cards with LTspice SW cards with negative hysteresis (more or less like your fave tanh curve), but it still won't converge on ac or noise sims. >> >> Thanks >> >> Phil Hobbs > > Took a quicky peek at the PSpice OPA2140 model... it doesn't like to > queue up with input starting at rail... so I'm guessing all that > switch crap is swing limiting... but works just fine from zero +/- > > I did an AC at +/-5V supplies... shows serious feed-thru starting just > above 60MHz. > > How are you using it, and what do you need modeled? > > What are your conditions when you have convergence issues? > > Could be that a significantly simplified model would serve your > purpose? > > ...Jim Thompson >
I'm using it for single-supply TIAs--it has a unique combination of decent speed, low noise, low input current, RR output, and guaranteed CMR goes below ground. I can't get it to converge on an operating point with the supply turned on at t=0, so no AC or noise analyses are possible. How exactly did you set it up? I know it'll work in real life, but I'm not too happy having to sub a TL072 with an auxiliary negative supply--takes extra explaining to the customer, so a decent model would be great. Thanks Phil Hobbs -- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 hobbs at electrooptical dot net http://electrooptical.net
On Mon, 10 Aug 2015 08:03:23 -0700, Jim Thompson
<To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote:

>On Sun, 9 Aug 2015 16:24:53 -0700 (PDT), Phil Hobbs ><pcdhobbs@gmail.com> wrote: > >>Hi, Jim, >> >>If you've got some spare bandwidth, I could really use an improved OPA2140 model. >> >>It's a very good part for moderate speed, low current, high linearity TIAs, but it's a bear to simulate because the model won't converge on an operating point in LTspice. >> >> I took the TINA model TI supplies and replaced the VSWITCH cards with LTspice SW cards with negative hysteresis (more or less like your fave tanh curve), but it still won't converge on ac or noise sims. >> >>Thanks >> >>Phil Hobbs > >Took a quicky peek at the PSpice OPA2140 model... it doesn't like to >queue up with input starting at rail... so I'm guessing all that >switch crap is swing limiting... but works just fine from zero +/- > >I did an AC at +/-5V supplies... shows serious feed-thru starting just >above 60MHz. > >How are you using it, and what do you need modeled? > >What are your conditions when you have convergence issues? > >Could be that a significantly simplified model would serve your >purpose? > > ...Jim Thompson
The above trials were in PSpice... LTspice can't even find a .OP Soon as I have an available RoundTwoIt I'll give it a more thorough analysis. ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: skypeanalog | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
On 8/10/2015 11:03 AM, Jim Thompson wrote:
> On Sun, 9 Aug 2015 16:24:53 -0700 (PDT), Phil Hobbs > <pcdhobbs@gmail.com> wrote: > >> Hi, Jim, >> >> If you've got some spare bandwidth, I could really use an improved >> OPA2140 model. >> >> It's a very good part for moderate speed, low current, high >> linearity TIAs, but it's a bear to simulate because the model won't >> converge on an operating point in LTspice. >> >> I took the TINA model TI supplies and replaced the VSWITCH cards >> with LTspice SW cards with negative hysteresis (more or less like >> your fave tanh curve), but it still won't converge on ac or noise >> sims. >> >> Thanks >> >> Phil Hobbs > > Took a quicky peek at the PSpice OPA2140 model... it doesn't like to > queue up with input starting at rail... so I'm guessing all that > switch crap is swing limiting... but works just fine from zero +/- > > I did an AC at +/-5V supplies... shows serious feed-thru starting > just above 60MHz. > > How are you using it, and what do you need modeled? > > What are your conditions when you have convergence issues? > > Could be that a significantly simplified model would serve your > purpose? ...Jim Thompson >
Here's my try at hacking the switches, but no joy. I left the 150V ones, since they shouldn't actually do much in normal operation AFAICT. Cheers Phil Hobbs --- .SUBCKT OPA2140_soft +IN -IN V+ V- Vout * ORIGINALLY .SUBCKT OPA2140 -IN +IN V- V+ Vout VAM1 30 31 V7 44 12 0 Vos 30 35 27U V11 58 59 100M V10 60 61 100M V6 11 66 10 V5 67 11 10 V4 63 65 12 V1 64 62 12 V9 78 13 3.5 IS2 V+ 31 1P IS1 V+ V- 1.8M IS3 40 V- -500F V3 83 11 36 V2 11 84 30 XU12 V- 31 IDEAL_D_0 XU8 31 V+ IDEAL_D_0 R4 32 24 10M C7 33 34 6.5P C8 34 11 7P CinnCM 11 33 7P XIn11 35 33 FEMT_0 L2 36 11 10U XR109 27 11 RNOISE_FREE_0 XR109_2 37 11 RNOISE_FREE_0 XVn11 34 35 VNSE_0 XU14 38 11 39 40 VCVS_LIMIT_0 L3 41 11 100U R1 36 38 1 GVCCS2 11 38 11 42 1 XU13 12 43 IDEAL_D_1 EVCVS5 44 11 V- 11 1 XR109_3 45 46 RNOISE_FREE_0 L1 46 11 100M C11 37 11 150F XR109_4 26 11 RNOISE_FREE_1 C1 11 47 63.9N EVCVS1 15 11 48 49 -1 R38 47 50 10 VCCVS2_in 49 51 HCCVS2 50 11 VCCVS2_in 1K XU9 47 11 52 53 VARICAP_0 XU7 47 11 49 54 VC_RES_0 C25 15 52 100F R37 53 54 26.135MEG C24 15 14 90N R32 14 52 1.8K R31 52 54 100MEG R30 15 52 500K EVCVS2 54 11 11 52 20MEG GVCCS12 11 27 37 11 1U XU5 16 11 V+ 17 VCVS_LIMIT_1 XU6 11 16 18 V- VCVS_LIMIT_2 C15 V+ V- 10P C22 11 23 1P R29 23 25 1 C23 11 28 1P C9 55 11 10P R26 55 16 10 C21 11 19 1P C20 11 20 1P C19 21 11 1P C17 22 11 1P C16 11 56 1P C12 57 11 1P R13 48 28 1 SW14 14 15 19 11 S_VSWITCH_1 SW13 15 14 11 20 S_VSWITCH_2 R36 28 61 1M R35 28 59 1M SW12 62 58 21 11 S_VSWITCH_3 SW11 60 63 11 22 S_VSWITCH_4 R34 28 64 1K R33 28 65 1K SW10 67 25 23 11 S_VSWITCH_5 SW9 25 66 11 23 S_VSWITCH_6 R25 68 21 1 R19 69 22 1 R16 70 56 1 R14 71 57 1 R12 72 19 1 R7 73 20 1 R5 74 26 10M R6 75 25 10M R15 0 11 100MEG C13 26 11 100F GVCCS1 11 26 27 11 1M GIsinking V- 11 76 11 1M GIsourcing V+ 11 77 11 1M R23 76 11 10K SW7 16 76 55 11 S_VSWITCH_7 R21 11 77 10K SW8 16 77 55 11 S_VSWITCH_8 SW4 75 72 19 11 S_VSWITCH_9 SW3 73 75 11 20 S_VSWITCH_10 XU3 63 29 73 11 VCVS_LIMIT_3 XU1 62 29 72 11 VCVS_LIMIT_3 SW2 32 68 21 11 S_VSWITCH_11 SW1 69 32 11 22 S_VSWITCH_12 EVCVS6 78 11 V+ 11 1 R22 79 43 100 EVCVS4 79 11 31 11 1 XU2 43 13 IDEAL_D_1 SW6 74 70 56 11 S_VSWITCH_13 SW5 71 74 11 57 S_VSWITCH_14 XU26 43 40 11 80 VCCS_LIMIT_0 XU4 80 11 11 25 VCCS_LIMIT_1 LPSR 81 11 100M XVCVSPSRR 82 11 39 33 VCVS_LIMIT_4 XU22 83 16 69 11 VCVS_LIMIT_5 XU21 84 16 68 11 VCVS_LIMIT_5 XU20 18 Vout 70 11 VCVS_LIMIT_5 XU19 17 Vout 71 11 VCVS_LIMIT_6 XU11 V- 40 IDEAL_D_0 XU10 40 V+ IDEAL_D_0 C10 24 11 100F C5 27 11 1.00000000000000E-0016 XR109_5 24 11 RNOISE_FREE_1 GVCCS15 11 24 26 11 1M GVCCS10 11 37 45 11 1U R20 +IN 34 100 R18 -IN 33 100 GVCCS6 11 45 29 11 1U XR102 85 86 RNOISE_FREE_0 XR101 87 85 RNOISE_FREE_0 C6 85 0 1 XR105 29 11 RNOISE_FREE_0 XR104 25 11 RNOISE_FREE_2 XR103 11 80 RNOISE_FREE_0 EVCVS34 11 0 85 0 1 RPSR 81 82 1 GVCCS11 11 82 V+ V- 100N RCM 41 42 1 EVCVS29 87 0 V+ 0 1 EVCVS28 86 0 V- 0 1 GVCCS7 11 42 30 11 100N VCCVS1_in 51 Vout HCCVS1 16 11 VCCVS1_in 1K GVCCS5 11 29 25 11 1U Ccc 25 11 7U EVCVS3 48 11 24 11 1 * .MODEL S_VSWITCH_1 VSWITCH (RON=1 ROFF=100MEG VON=100M VOFF=-100M ) .MODEL S_VSWITCH_1 SW (RON=1 ROFF=100MEG Vt=0 vh=-100m ) .MODEL S_VSWITCH_2 SW (RON=1 ROFF=100MEG Vt=0 vh=-100m ) *.MODEL S_VSWITCH_3 VSWITCH (RON=1 ROFF=10MEG VON=100M VOFF=-100M ) .MODEL S_VSWITCH_3 SW (RON=1 ROFF=10MEG VT=0 vh=-100m) .MODEL S_VSWITCH_4 SW (RON=1 ROFF=10MEG VT=0 vh=-100m) .MODEL S_VSWITCH_5 VSWITCH (RON=10M ROFF=100MEG VON=150 VOFF=5m ) .MODEL S_VSWITCH_5 VSWITCH (RON=10M ROFF=100MEG VON=150 VOFF=5m ) .MODEL S_VSWITCH_6 VSWITCH (RON=10M ROFF=100MEG VON=150 VOFF=5m ) * #7 is NC *.MODEL S_VSWITCH_7 VSWITCH (RON=1M ROFF=10MEG VON=-10M VOFF=5m ) .MODEL S_VSWITCH_7 SW (RON=10MEG ROFF=1M VT=-2.5M vh=-7.5m) *.MODEL S_VSWITCH_8 VSWITCH (RON=1M ROFF=10MEG VON=10M VOFF=5m ) .MODEL S_VSWITCH_8 SW (RON=1M ROFF=10MEG VT=7.5m vh=-2.5m) * .MODEL S_VSWITCH_9 VSWITCH (RON=1 ROFF=10MEG VON=1 VOFF=-1 ) .MODEL S_VSWITCH_9 SW(RON=1 ROFF=10MEG Vt=0 vh=-1) .MODEL S_VSWITCH_10 SW(RON=1 ROFF=10MEG Vt=0 vh=-1) * .MODEL S_VSWITCH_11 VSWITCH (RON=1 ROFF=1G VON=10 VOFF=-10 ) * .MODEL S_VSWITCH_12 VSWITCH (RON=1 ROFF=1G VON=10 VOFF=-10 ) * .MODEL S_VSWITCH_13 VSWITCH (RON=1 ROFF=1G VON=10 VOFF=-10 ) * .MODEL S_VSWITCH_14 VSWITCH (RON=1 ROFF=1G VON=10 VOFF=-10 ) .MODEL S_VSWITCH_11 SW (RON=1 ROFF=1G VT=0 vh=-10) .MODEL S_VSWITCH_12 SW (RON=1 ROFF=1G VT=0 vh=-10) .MODEL S_VSWITCH_13 SW (RON=1 ROFF=1G VT=0 vh=-10) .MODEL S_VSWITCH_14 SW (RON=1 ROFF=1G VT=0 vh=-10) .ENDS OPA2140_soft *$ -- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 hobbs at electrooptical dot net http://electrooptical.net
On 8/10/2015 11:03 AM, Jim Thompson wrote:
> On Sun, 9 Aug 2015 16:24:53 -0700 (PDT), Phil Hobbs > <pcdhobbs@gmail.com> wrote: > >> Hi, Jim, >> >> If you've got some spare bandwidth, I could really use an improved OPA2140 model. >> >> It's a very good part for moderate speed, low current, high linearity TIAs, but it's a bear to simulate because the model won't converge on an operating point in LTspice. >> >> I took the TINA model TI supplies and replaced the VSWITCH cards with LTspice SW cards with negative hysteresis (more or less like your fave tanh curve), but it still won't converge on ac or noise sims. >> >> Thanks >> >> Phil Hobbs > > Took a quicky peek at the PSpice OPA2140 model... it doesn't like to > queue up with input starting at rail... so I'm guessing all that > switch crap is swing limiting... but works just fine from zero +/- > > I did an AC at +/-5V supplies... shows serious feed-thru starting just > above 60MHz. > > How are you using it, and what do you need modeled? > > What are your conditions when you have convergence issues? > > Could be that a significantly simplified model would serve your > purpose? > > ...Jim Thompson >
It looks like it only starts up when the supplies are symmetrical. +12/-3 doesn't work. Thanks for the hint--any idea what to hack to fix it? Thanks again Phil Hobbs -- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 hobbs at electrooptical dot net http://electrooptical.net
On Mon, 10 Aug 2015 11:40:42 -0400, Phil Hobbs
<pcdhSpamMeSenseless@electrooptical.net> wrote:

>On 08/10/2015 11:03 AM, Jim Thompson wrote: >> On Sun, 9 Aug 2015 16:24:53 -0700 (PDT), Phil Hobbs >> <pcdhobbs@gmail.com> wrote: >> >>> Hi, Jim, >>> >>> If you've got some spare bandwidth, I could really use an improved OPA2140 model. >>> >>> It's a very good part for moderate speed, low current, high linearity TIAs, but it's a bear to simulate because the model won't converge on an operating point in LTspice. >>> >>> I took the TINA model TI supplies and replaced the VSWITCH cards with LTspice SW cards with negative hysteresis (more or less like your fave tanh curve), but it still won't converge on ac or noise sims. >>> >>> Thanks >>> >>> Phil Hobbs >> >> Took a quicky peek at the PSpice OPA2140 model... it doesn't like to >> queue up with input starting at rail... so I'm guessing all that >> switch crap is swing limiting... but works just fine from zero +/- >> >> I did an AC at +/-5V supplies... shows serious feed-thru starting just >> above 60MHz. >> >> How are you using it, and what do you need modeled? >> >> What are your conditions when you have convergence issues? >> >> Could be that a significantly simplified model would serve your >> purpose? >> >> ...Jim Thompson >> > >I'm using it for single-supply TIAs--it has a unique combination of >decent speed, low noise, low input current, RR output, and guaranteed >CMR goes below ground.
RR Output is actually 0.2V above negative rail. So, to use CMR fully, you need to queue-up feedback so that output stays 0.2V away from negative rail.
> >I can't get it to converge on an operating point with the supply turned >on at t=0, so no AC or noise analyses are possible. How exactly did you >set it up? > >I know it'll work in real life, but I'm not too happy having to sub a >TL072 with an auxiliary negative supply--takes extra explaining to the >customer, so a decent model would be great. > >Thanks > >Phil Hobbs
Can send me your schematic (as used)? ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: skypeanalog | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
On 8/10/2015 12:01 PM, Jim Thompson wrote:
> On Mon, 10 Aug 2015 11:40:42 -0400, Phil Hobbs > <pcdhSpamMeSenseless@electrooptical.net> wrote: > >> On 08/10/2015 11:03 AM, Jim Thompson wrote: >>> On Sun, 9 Aug 2015 16:24:53 -0700 (PDT), Phil Hobbs >>> <pcdhobbs@gmail.com> wrote: >>> >>>> Hi, Jim, >>>> >>>> If you've got some spare bandwidth, I could really use an improved OPA2140 model. >>>> >>>> It's a very good part for moderate speed, low current, high linearity TIAs, but it's a bear to simulate because the model won't converge on an operating point in LTspice. >>>> >>>> I took the TINA model TI supplies and replaced the VSWITCH cards with LTspice SW cards with negative hysteresis (more or less like your fave tanh curve), but it still won't converge on ac or noise sims. >>>> >>>> Thanks >>>> >>>> Phil Hobbs >>> >>> Took a quicky peek at the PSpice OPA2140 model... it doesn't like to >>> queue up with input starting at rail... so I'm guessing all that >>> switch crap is swing limiting... but works just fine from zero +/- >>> >>> I did an AC at +/-5V supplies... shows serious feed-thru starting just >>> above 60MHz. >>> >>> How are you using it, and what do you need modeled? >>> >>> What are your conditions when you have convergence issues? >>> >>> Could be that a significantly simplified model would serve your >>> purpose? >>> >>> ...Jim Thompson >>> >> >> I'm using it for single-supply TIAs--it has a unique combination of >> decent speed, low noise, low input current, RR output, and guaranteed >> CMR goes below ground. > > RR Output is actually 0.2V above negative rail. So, to use CMR fully, > you need to queue-up feedback so that output stays 0.2V away from > negative rail.
Doesn't work for me even with V_EE = -3V. It does start up when the supplies are close to symmetrical about the inputs.
> >> >> I can't get it to converge on an operating point with the supply turned >> on at t=0, so no AC or noise analyses are possible. How exactly did you >> set it up? >> >> I know it'll work in real life, but I'm not too happy having to sub a >> TL072 with an auxiliary negative supply--takes extra explaining to the >> customer, so a decent model would be great. >> >> Thanks >> >> Phil Hobbs > > Can send me your schematic (as used)? > > ...Jim Thompson >
Sure. It's kind of an interesting one--very low power for a bootstrap (5 mW) due to sample heating limitations in a portable instrument. It uses shunt feedback like the PNP wraparound trick, but upside down, which saves a transistor and about halves the operating current. Cheers Phil Hobbs Version 4 SHEET 1 2256 15024 WIRE -672 32 -1056 32 WIRE -416 32 -672 32 WIRE -384 32 -416 32 WIRE -336 32 -384 32 WIRE -208 32 -240 32 WIRE -128 32 -208 32 WIRE 112 32 -48 32 WIRE 144 32 112 32 WIRE -384 48 -384 32 WIRE -208 48 -208 32 WIRE 656 64 656 48 WIRE 816 64 816 48 WIRE -672 112 -672 32 WIRE -112 112 -144 112 WIRE -16 112 -48 112 WIRE 16 112 -16 112 WIRE 112 112 112 32 WIRE 112 112 80 112 WIRE 256 112 256 96 WIRE -384 128 -384 112 WIRE -208 128 -208 112 WIRE -288 176 -288 96 WIRE -160 176 -288 176 WIRE -144 176 -144 112 WIRE -144 176 -160 176 WIRE -128 176 -144 176 WIRE -16 176 -16 112 WIRE -16 176 -48 176 WIRE 16 176 -16 176 WIRE 112 176 112 112 WIRE 112 176 96 176 WIRE -160 192 -160 176 WIRE -16 192 -16 176 WIRE -16 208 -16 192 WIRE 208 208 160 208 WIRE 336 208 272 208 WIRE -816 240 -848 240 WIRE -768 240 -816 240 WIRE -672 240 -672 192 WIRE -672 240 -768 240 WIRE -672 256 -672 240 WIRE -160 272 -160 256 WIRE -16 272 -16 256 WIRE 160 288 160 208 WIRE 208 288 160 288 WIRE 336 288 336 208 WIRE 336 288 288 288 WIRE -1056 320 -1056 32 WIRE -288 320 -624 320 WIRE -224 320 -288 320 WIRE -96 320 -224 320 WIRE 0 320 -96 320 WIRE 160 320 160 288 WIRE 160 320 0 320 WIRE -848 336 -848 240 WIRE -768 352 -768 240 WIRE -288 352 -288 320 WIRE -224 368 -224 320 WIRE -672 384 -672 352 WIRE -624 384 -672 384 WIRE -400 384 -624 384 WIRE -400 400 -400 384 WIRE -96 400 -96 320 WIRE 160 400 160 320 WIRE 208 400 160 400 WIRE -672 416 -672 384 WIRE 336 416 336 288 WIRE 336 416 272 416 WIRE 384 416 336 416 WIRE 528 416 464 416 WIRE 208 432 176 432 WIRE -848 464 -848 400 WIRE -784 464 -848 464 WIRE -768 464 -768 432 WIRE -768 464 -784 464 WIRE -736 464 -768 464 WIRE -288 464 -288 432 WIRE -288 464 -400 464 WIRE -224 464 -224 432 WIRE -224 464 -288 464 WIRE -1056 480 -1056 400 WIRE -976 480 -1056 480 WIRE -96 496 -96 464 WIRE -1056 512 -1056 480 WIRE -784 512 -784 464 WIRE 48 512 32 512 WIRE 144 512 128 512 WIRE 176 512 176 432 WIRE 176 512 144 512 WIRE 256 512 176 512 WIRE 320 512 256 512 WIRE 432 512 400 512 WIRE -400 528 -400 464 WIRE 176 528 176 512 WIRE 256 528 256 512 WIRE 32 544 32 512 WIRE -976 560 -976 480 WIRE -976 560 -992 560 WIRE -848 560 -976 560 WIRE 256 608 256 592 WIRE 256 608 176 608 WIRE -672 624 -672 512 WIRE -400 624 -400 608 WIRE 144 624 144 512 WIRE 144 624 -400 624 WIRE 176 624 176 608 WIRE -1056 640 -1056 608 WIRE -784 640 -784 608 FLAG 816 64 0 FLAG 656 64 0 FLAG 656 -32 VCC FLAG 816 -32 VEE FLAG 144 32 VCC FLAG 176 624 0 FLAG 528 416 Out FLAG 0 320 SJ FLAG -624 384 Boot FLAG -96 496 0 FLAG 256 112 0 FLAG 256 16 +12 FLAG -672 624 0 FLAG -784 640 0 FLAG -816 240 drain FLAG 240 384 +12 FLAG -16 272 0 FLAG -160 272 0 FLAG -384 128 0 FLAG -208 128 0 FLAG 240 448 VEE FLAG 32 544 CM FLAG -416 32 CM FLAG 432 512 zero FLAG -1056 640 0 SYMBOL voltage 816 -48 M0 WINDOW 0 41 50 Left 2 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 WINDOW 3 -104 163 Left 2 SYMATTR InstName V1 SYMATTR Value -12 SYMBOL voltage 656 -48 M0 WINDOW 0 -69 56 Left 2 WINDOW 123 24 124 Left 2 WINDOW 39 0 0 Left 2 WINDOW 3 45 58 Left 2 SYMATTR InstName V2 SYMATTR Value2 AC 0 SYMATTR Value 5 SYMBOL cap -240 368 R0 WINDOW 3 45 50 Left 2 SYMATTR Value 1.6n SYMATTR InstName C1 SYMBOL njf -624 256 M0 WINDOW 3 -121 36 Left 2 SYMATTR Value BF862_1pA SYMATTR InstName Q6 SYMBOL res -688 96 R0 WINDOW 0 -55 7 Left 2 WINDOW 3 -92 63 Left 2 SYMATTR InstName R5 SYMATTR Value {Rbias} SYMBOL res 192 304 R270 WINDOW 0 34 21 VTop 2 WINDOW 3 63 94 VBottom 2 SYMATTR InstName R4 SYMATTR Value 50meg SYMBOL cap 208 224 R270 WINDOW 0 37 -14 VTop 2 WINDOW 3 63 80 VBottom 2 SYMATTR InstName C3 SYMATTR Value 1p SYMBOL cap -112 400 R0 WINDOW 0 57 32 Left 2 WINDOW 3 36 66 Left 2 SYMATTR InstName C5 SYMATTR Value {Cstray} SYMBOL voltage 256 0 M0 WINDOW 0 -69 56 Left 2 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 WINDOW 3 -72 96 Left 2 SYMATTR InstName V4 SYMATTR Value 12 SYMBOL npn -736 416 R0 SYMATTR InstName Q1 SYMATTR Value {betagrade} SYMBOL cap -416 400 R0 WINDOW 3 25 12 Left 2 WINDOW 0 28 -19 Left 2 SYMATTR Value 1&#4294967295; SYMATTR InstName C2 SYMBOL res -784 336 R0 WINDOW 0 55 35 Left 2 WINDOW 3 43 80 Left 2 SYMATTR InstName R1 SYMATTR Value 91k SYMBOL cap -864 336 R0 WINDOW 3 24 78 Left 2 SYMATTR Value 1&#4294967295; SYMATTR InstName C4 SYMBOL npn -240 96 M270 WINDOW 0 60 60 VLeft 2 WINDOW 3 93 103 VLeft 2 SYMATTR InstName Q2 SYMATTR Value {betagrade} SYMBOL cap -144 192 M0 SYMATTR InstName C6 SYMATTR Value 4.7&#4294967295; SYMBOL cap 0 192 M0 WINDOW 0 -33 64 Left 2 SYMATTR InstName C7 SYMATTR Value 4.7&#4294967295; SYMBOL res -32 192 M270 WINDOW 0 -59 62 VTop 2 WINDOW 3 0 56 VBottom 2 SYMATTR InstName R3 SYMATTR Value 15k SYMBOL res 112 192 M270 WINDOW 0 -62 61 VTop 2 WINDOW 3 0 56 VBottom 2 SYMATTR InstName R8 SYMATTR Value 15k SYMBOL cap -400 48 R0 WINDOW 0 -55 40 Left 2 SYMATTR InstName C8 SYMATTR Value 10&#4294967295; SYMBOL res -144 48 R270 WINDOW 0 32 56 VTop 2 WINDOW 3 57 107 VBottom 2 SYMATTR InstName R9 SYMATTR Value 100 SYMBOL cap -224 48 R0 SYMATTR InstName C9 SYMATTR Value 10&#4294967295; SYMBOL current -288 352 R0 WINDOW 3 -23 169 Left 2 WINDOW 123 -30 139 Left 2 WINDOW 39 0 0 Left 2 SYMATTR Value 100n SYMATTR Value2 AC 20n SYMATTR InstName I1 SYMBOL res -416 512 R0 SYMATTR InstName R7 SYMATTR Value 22k SYMBOL res 160 512 R0 SYMATTR InstName R10 SYMATTR Value 2k SYMBOL res 144 496 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R11 SYMATTR Value 100k SYMBOL cap 240 528 R0 SYMATTR InstName C10 SYMATTR Value 1&#4294967295; SYMBOL res 304 528 R270 WINDOW 0 32 56 VTop 2 WINDOW 3 0 56 VBottom 2 SYMATTR InstName R6 SYMATTR Value 1k SYMBOL res 368 432 R270 WINDOW 0 32 56 VTop 2 WINDOW 3 0 56 VBottom 2 SYMATTR InstName R12 SYMATTR Value 1k SYMBOL npn -848 512 R0 SYMATTR InstName Q3 SYMATTR Value Mirror SYMBOL npn -992 512 M0 SYMATTR InstName Q4 SYMATTR Value Mirror SYMBOL res -1072 304 R0 WINDOW 3 28 1 Left 2 SYMATTR Value 150k SYMATTR InstName R2 SYMBOL Opamps\\opamp2 240 352 R0 SYMATTR InstName U1 SYMATTR Value OPA2140 SYMBOL schottky -48 96 R90 WINDOW 0 0 32 VBottom 2 WINDOW 3 32 32 VTop 2 SYMATTR InstName D1 SYMATTR Value BAT54 SYMATTR Description Diode SYMATTR Type diode SYMBOL schottky 80 96 R90 WINDOW 0 0 32 VBottom 2 WINDOW 3 32 32 VTop 2 SYMATTR InstName D2 SYMATTR Value BAT54 SYMATTR Description Diode SYMATTR Type diode TEXT -728 688 Left 2 !.options plotwinsize=0 vntol=1e-9 reltol=1e-8 numdgt=9 noopiter TEXT -256 736 Left 2 !.ac oct 30 1 100k TEXT 432 472 Left 2 !;.step dec param Iphoto 200p 200n 1 TEXT -72 376 Left 2 ;Strays TEXT -328 280 Left 2 ;Photodiode TEXT 408 560 Left 2 !.param Rbias 1500\n;.step param Rbias 500 2500 500 TEXT 664 528 Left 2 !.param Iphoto 2n\n;.step dec param Iphoto 200p 200n 2 TEXT 368 240 Left 2 !.param betagrade 1\n.step param betagrade list 1 2 3 TEXT 400 312 Left 2 !.step temp 10 50 10 TEXT 368 128 Left 2 !.model 1 AKO:2SD2704K (BF=1260)\n.model 2 AKO:2SD2704K (BF=820)\n.model 3 AKO:2SD2704K (BF=2700)\n.model Mirror AKO:BCV61C_HALF TEXT 536 352 Left 2 !.param Cstray 2p\n;.step param Cstray list 1f 0.2p 0.5p 1p 2p 5p TEXT -1000 784 Invisible 2 !.SUBCKT OPA2140 +IN -IN V+ V- Vout\n* ORIGINALLY .SUBCKT OPA2140 -IN +IN V- V+ Vout\nVAM1 30 31\nV7 44 12 0\nVos 30 35 27U\nV11 58 59 100M\nV10 60 61 100M\nV6 11 66 10\nV5 67 11 10\nV4 63 65 12\nV1 64 62 12\nV9 78 13 3.5\nIS2 V+ 31 1P\nIS1 V+ V- 1.8M\nIS3 40 V- -500F\nV3 83 11 36\nV2 11 84 30\nXU12 V- 31 IDEAL_D_0\nXU8 31 V+ IDEAL_D_0\nR4 32 24 10M\nC7 33 34 6.5P\nC8 34 11 7P\nCinnCM 11 33 7P\nXIn11 35 33 FEMT_0\nL2 36 11 10U\nXR109 27 11 RNOISE_FREE_0\nXR109_2 37 11 RNOISE_FREE_0\nXVn11 34 35 VNSE_0\nXU14 38 11 39 40 VCVS_LIMIT_0\nL3 41 11 100U\nR1 36 38 1\nGVCCS2 11 38 11 42 1\nXU13 12 43 IDEAL_D_1\nEVCVS5 44 11 V- 11 1\nXR109_3 45 46 RNOISE_FREE_0\nL1 46 11 100M\nC11 37 11 150F\nXR109_4 26 11 RNOISE_FREE_1\nC1 11 47 63.9N\nEVCVS1 15 11 48 49 -1\nR38 47 50 10\nVCCVS2_in 49 51\nHCCVS2 50 11 VCCVS2_in 1K\nXU9 47 11 52 53 VARICAP_0\nXU7 47 11 49 54 VC_RES_0\nC25 15 52 100F\nR37 53 54 26.135MEG\nC24 15 14 90N\nR32 14 52 1.8K\nR31 52 54 100MEG\nR30 15 52 500K\nEVCVS2 54 11 11 52 20MEG\nGVCCS12 11 27 37 11 1U\nXU5 16 11 V+ 17 VCVS_LIMIT_1\nXU6 11 16 18 V- VCVS_LIMIT_2\nC15 V+ V- 10P\nC22 11 23 1P\nR29 23 25 1\nC23 11 28 1P\nC9 55 11 10P\nR26 55 16 10\nC21 11 19 1P\nC20 11 20 1P\nC19 21 11 1P\nC17 22 11 1P\nC16 11 56 1P\nC12 57 11 1P\nR13 48 28 1\nSW14 14 15 19 11 S_VSWITCH_1\nSW13 15 14 11 20 S_VSWITCH_2\nR36 28 61 1M\nR35 28 59 1M\nSW12 62 58 21 11 S_VSWITCH_3\nSW11 60 63 11 22 S_VSWITCH_4\nR34 28 64 1K\nR33 28 65 1K\nSW10 67 25 23 11 S_VSWITCH_5\nSW9 25 66 11 23 S_VSWITCH_6\nR25 68 21 1\nR19 69 22 1\nR16 70 56 1\nR14 71 57 1\nR12 72 19 1\nR7 73 20 1\nR5 74 26 10M\nR6 75 25 10M\nR15 0 11 100MEG\nC13 26 11 100F\nGVCCS1 11 26 27 11 1M\nGIsinking V- 11 76 11 1M\nGIsourcing V+ 11 77 11 1M\nR23 76 11 10K\nSW7 16 76 55 11 S_VSWITCH_7\nR21 11 77 10K\nSW8 16 77 55 11 S_VSWITCH_8\nSW4 75 72 19 11 S_VSWITCH_9\nSW3 73 75 11 20 S_VSWITCH_10\nXU3 63 29 73 11 VCVS_LIMIT_3\nXU1 62 29 72 11 VCVS_LIMIT_3\nSW2 32 68 21 11 S_VSWITCH_11\nSW1 69 32 11 22 S_VSWITCH_12\nEVCVS6 78 11 V+ 11 1\nR22 79 43 100\nEVCVS4 79 11 31 11 1\nXU2 43 13 IDEAL_D_1\nSW6 74 70 56 11 S_VSWITCH_13\nSW5 71 74 11 57 S_VSWITCH_14\nXU26 43 40 11 80 VCCS_LIMIT_0\nXU4 80 11 11 25 VCCS_LIMIT_1\nLPSR 81 11 100M\nXVCVSPSRR 82 11 39 33 VCVS_LIMIT_4\nXU22 83 16 69 11 VCVS_LIMIT_5\nXU21 84 16 68 11 VCVS_LIMIT_5\nXU20 18 Vout 70 11 VCVS_LIMIT_5\nXU19 17 Vout 71 11 VCVS_LIMIT_6\nXU11 V- 40 IDEAL_D_0\nXU10 40 V+ IDEAL_D_0\nC10 24 11 100F\nC5 27 11 1.00000000000000E-0016\nXR109_5 24 11 RNOISE_FREE_1\nGVCCS15 11 24 26 11 1M\nGVCCS10 11 37 45 11 1U\nR20 +IN 34 100\nR18 -IN 33 100\nGVCCS6 11 45 29 11 1U\nXR102 85 86 RNOISE_FREE_0\nXR101 87 85 RNOISE_FREE_0\nC6 85 0 1\nXR105 29 11 RNOISE_FREE_0\nXR104 25 11 RNOISE_FREE_2\nXR103 11 80 RNOISE_FREE_0\nEVCVS34 11 0 85 0 1\nRPSR 81 82 1\nGVCCS11 11 82 V+ V- 100N\nRCM 41 42 1\nEVCVS29 87 0 V+ 0 1\nEVCVS28 86 0 V- 0 1\nGVCCS7 11 42 30 11 100N\nVCCVS1_in 51 Vout\nHCCVS1 16 11 VCCVS1_in 1K\nGVCCS5 11 29 25 11 1U\nCcc 25 11 7U\nEVCVS3 48 11 24 11 1\n.MODEL S_VSWITCH_1 VSWITCH (RON=1 ROFF=100MEG VON=100M VOFF=-100M )\n.MODEL S_VSWITCH_2 VSWITCH (RON=1 ROFF=100MEG VON=100M VOFF=-100M )\n.MODEL S_VSWITCH_3 VSWITCH (RON=1 ROFF=10MEG VON=100M VOFF=-100M )\n.MODEL S_VSWITCH_4 VSWITCH (RON=1 ROFF=10MEG VON=100M VOFF=-100M )\n.MODEL S_VSWITCH_5 VSWITCH (RON=10M ROFF=100MEG VON=150 VOFF=5m )\n.MODEL S_VSWITCH_6 VSWITCH (RON=10M ROFF=100MEG VON=150 VOFF=5m )\n.MODEL S_VSWITCH_7 VSWITCH (RON=1M ROFF=10MEG VON=-10M VOFF=5m )\n.MODEL S_VSWITCH_8 VSWITCH (RON=1M ROFF=10MEG VON=10M VOFF=5m )\n.MODEL S_VSWITCH_9 VSWITCH (RON=1 ROFF=10MEG VON=1 VOFF=-1 )\n.MODEL S_VSWITCH_10 VSWITCH (RON=1 ROFF=10MEG VON=1 VOFF=-1 )\n.MODEL S_VSWITCH_11 VSWITCH (RON=1 ROFF=1G VON=10 VOFF=-10 )\n.MODEL S_VSWITCH_12 VSWITCH (RON=1 ROFF=1G VON=10 VOFF=-10 )\n.MODEL S_VSWITCH_13 VSWITCH (RON=1 ROFF=1G VON=10 VOFF=-10 )\n.MODEL S_VSWITCH_14 VSWITCH (RON=1 ROFF=1G VON=10 VOFF=-10 )\n.ENDS OPA2140\n*$\n \n*TG IDEAL DIODE\n.SUBCKT IDEAL_D_0 A C\nD1 A C DNOM\n.MODEL DNOM D (TT=10P CJO=1E-18 IS=1E-15 RS=1E-3)\n.ENDS IDEAL_D_0\n \n*$\n \n* BEGIN PROG NSE FEMTO AMP/RT-HZ\n.SUBCKT FEMT_0 1 2\n* BEGIN SETUP OF NOISE GEN - FEMPTOAMPS/RT-HZ\n* INPUT THREE VARIABLES\n* SET UP INSE 1/F\n* FA/RHZ AT 1/F FREQ\n.PARAM NLFF=.1\n* FREQ FOR 1/F VAL\n.PARAM FLWF=0.001\n* SET UP INSE FB\n* FA/RHZ FLATBAND\n.PARAM NVRF=.1\n* END USER INPUT\n* START CALC VALS\n.PARAM GLFF={PWR(FLWF,0.25)*NLFF/1164}\n.PARAM RNVF={1.184*PWR(NVRF,2)}\n.MODEL DVNF D KF={PWR(FLWF,0.5)/1E11} IS=1.0E-16\n* END CALC VALS\nI1 0 7 10E-3\nI2 0 8 10E-3\nD1 7 0 DVNF\nD2 8 0 DVNF\nE1 3 6 7 8 {GLFF}\nR1 3 0 1E9\nR2 3 0 1E9\nR3 3 6 1E9\nE2 6 4 5 0 10\nR4 5 0 {RNVF}\nR5 5 0 {RNVF}\nR6 3 4 1E9\nR7 4 0 1E9\nG1 1 2 3 4 1E-6\nC1 1 0 1E-15\nC2 2 0 1E-15\nC3 1 2 1E-15\n.ENDS\n* END PROG NSE FEMTO AMP/RT-HZ\n \n*$\n \n* NOISELESS RESISTOR\n.SUBCKT RNOISE_FREE_0 1 2\n*ROHMS = VALUE IN OHMS OF NOISELESS RESISTOR\n.PARAM ROHMS=1E6\nERES 1 3 VALUE = { I(VSENSE) * ROHMS }\nRDUMMY 30 3 1\nVSENSE 30 2 DC 0V\n.ENDS RNOISE_FREE_0\n \n*$\n \n* BEGIN PROG NSE NANO VOLT/RT-HZ\n.SUBCKT VNSE_0 1 2\n* BEGIN SETUP OF NOISE GEN - NANOVOLT/RT-HZ\n* INPUT THREE VARIABLES\n* SET UP VNSE 1/F\n* NV/RHZ AT 1/F FREQ\n.PARAM NLF=18\n* FREQ FOR 1/F VAL\n.PARAM FLW=1\n* SET UP VNSE FB\n* NV/RHZ FLATBAND\n.PARAM NVR=4.6\n* END USER INPUT\n* START CALC VALS\n.PARAM GLF={PWR(FLW,0.25)*NLF/1164}\n.PARAM RNV={1.184*PWR(NVR,2)}\n.MODEL DVN D KF={PWR(FLW,0.5)/1E11} IS=1.0E-16\n* END CALC VALS\nI1 0 7 10E-3\nI2 0 8 10E-3\nD1 7 0 DVN\nD2 8 0 DVN\nE1 3 6 7 8 {GLF}\nR1 3 0 1E9\nR2 3 0 1E9\nR3 3 6 1E9\nE2 6 4 5 0 10\nR4 5 0 {RNV}\nR5 5 0 {RNV}\nR6 3 4 1E9\nR7 4 0 1E9\nE3 1 2 3 4 1\nC1 1 0 1E-15\nC2 2 0 1E-15\nC3 1 2 1E-15\n.ENDS\n* END PROG NSE NANOV/RT-HZ\n \n*$\n \n*VOLTAGE CONTROLLED SOURCE WITH LIMITS\n.SUBCKT VCVS_LIMIT_0 VC+ VC- VOUT+ VOUT-\n*\n.PARAM GAIN = 1\n.PARAM VPOS = 10M\n.PARAM VNEG = -10M\nE1 VOUT+ VOUT- VALUE={LIMIT(GAIN*V(VC+,VC-),VPOS,VNEG)}\n.ENDS VCVS_LIMIT_0\n \n*$\n \n*TG IDEAL DIODE\n.SUBCKT IDEAL_D_1 A C\nD1 A C DNOM\n.MODEL DNOM D (TT=10P CJO=1E-18 IS=1E-15 RS=1E-3)\n.ENDS IDEAL_D_1\n \n*$\n \n* NOISELESS RESISTOR\n.SUBCKT RNOISE_FREE_1 1 2\n*ROHMS = VALUE IN OHMS OF NOISELESS RESISTOR\n.PARAM ROHMS=1E3\nERES 1 3 VALUE = { I(VSENSE) * ROHMS }\nRDUMMY 30 3 1\nVSENSE 30 2 DC 0V\n.ENDS RNOISE_FREE_1\n \n*$\n \n*VARICAP (VOLTAGE-CONTROLLED CAPACITOR\n.SUBCKT VARICAP_0 1 2 3 4\n*PINS VC+ VC- CAP+ CAP-\nR1 3 10 1U\nVC 10 20 0\nEC 20 4 VALUE = {(1/(((ABS(V(1,2))*(-2.08)+204.636))))*V(INT)*100000000000000000}\nGINT 0 INT VALUE = {I(VC)}\nCINT INT 0 1\n********* Add large R from INT to gnd\nRINT INT 0 1e9\n.ENDS VARICAP_0\n \n*$\n \n*VOLTAGE CONTROLLED RESISTOR\n.SUBCKT VC_RES_0 1 2 3 4\n* VC+ VC- RES1 RES2\nERES 3 40 VALUE = {(I(VSENSE) * (ABS(V(1,2))*ABS(V(1,2))*0.000352-0.02359*ABS(V(1,2))+0.5922))*140000*24200*50*2/414500}\nVSENSE 40 4 DC 0\n.ENDS VC_RES_0\n \n*$\n \n*VOLTAGE CONTROLLED SOURCE WITH LIMITS\n.SUBCKT VCVS_LIMIT_1 VC+ VC- VOUT+ VOUT-\n*\n*$\nE1 VOUT+ VOUT- TABLE {ABS(V(VC+,VC-))} = (0,0.2) (10,0.25) 25,0.4) (35.9,0.6)\n.ENDS VCVS_LIMIT_1\n \n*$\n \n*VOLTAGE CONTROLLED SOURCE WITH LIMITS\n.SUBCKT VCVS_LIMIT_2 VC+ VC- VOUT+ VOUT-\n*\nE1 VOUT+ VOUT- TABLE {ABS(V(VC+,VC-))} = (0,0.2) (10,0.25) (20,0.35) (29,0.5)\n.ENDS VCVS_LIMIT_2\n \n*$\n \n*VOLTAGE CONTROLLED SOURCE WITH LIMITS\n.SUBCKT VCVS_LIMIT_3 VC+ VC- VOUT+ VOUT-\n*\n.PARAM GAIN = 100\n.PARAM VPOS = 6000\n.PARAM VNEG = -6000\nE1 VOUT+ VOUT- VALUE={LIMIT(GAIN*V(VC+,VC-),VPOS,VNEG)}\n.ENDS VCVS_LIMIT_3\n \n*$\n \n*VOLTAGE CONTROLLED SOURCE WITH LIMITS\n.SUBCKT VCCS_LIMIT_0 VC+ VC- IOUT+ IOUT-\n*\n.PARAM GAIN = 100U\n.PARAM IPOS = .5\n.PARAM INEG = -.5\nG1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VC+,VC-),IPOS,INEG)}\n.ENDS VCCS_LIMIT_0\n \n*$\n \n*VOLTAGE CONTROLLED SOURCE WITH LIMITS\n.SUBCKT VCCS_LIMIT_1 VC+ VC- IOUT+ IOUT-\n*\n.PARAM GAIN = 5\n.PARAM IPOS = 140\n.PARAM INEG = -140\nG1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VC+,VC-),IPOS,INEG)}\n.ENDS VCCS_LIMIT_1\n \n*$\n \n*VOLTAGE CONTROLLED SOURCE WITH LIMITS\n.SUBCKT VCVS_LIMIT_4 VC+ VC- VOUT+ VOUT-\n*\n.PARAM GAIN = -1\n.PARAM VPOS = 10M\n.PARAM VNEG = -10M\nE1 VOUT+ VOUT- VALUE={LIMIT(GAIN*V(VC+,VC-),VPOS,VNEG)}\n.ENDS VCVS_LIMIT_4\n \n*$\n \n*VOLTAGE CONTROLLED SOURCE WITH LIMITS\n.SUBCKT VCVS_LIMIT_5 VC+ VC- VOUT+ VOUT-\n*\n.PARAM GAIN = 100\n.PARAM VPOS = 5000\n.PARAM VNEG = -5000\nE1 VOUT+ VOUT- VALUE={LIMIT(GAIN*V(VC+,VC-),VPOS,VNEG)}\n.ENDS VCVS_LIMIT_5\n \n*$\n \n*VOLTAGE CONTROLLED SOURCE WITH LIMITS\n.SUBCKT VCVS_LIMIT_6 VC+ VC- VOUT+ VOUT-\n*\n.PARAM GAIN = 100\n.PARAM VPOS = 5000\n.PARAM VNEG = -5000\nE1 VOUT+ VOUT- VALUE={LIMIT(GAIN*V(VC+,VC-),VPOS,VNEG)}\n.ENDS VCVS_LIMIT_6\n \n*$\n \n* NOISELESS RESISTOR\n.SUBCKT RNOISE_FREE_2 1 2\n*ROHMS = VALUE IN OHMS OF NOISELESS RESISTOR\n.PARAM ROHMS=1E4\nERES 1 3 VALUE = { I(VSENSE) * ROHMS }\nRDUMMY 30 3 1\nVSENSE 30 2 DC 0V\n.ENDS RNOISE_FREE_2\n \n*$\n \n* source ADA4899\n.SUBCKT ADA4899 NINV INV VCC VEE OUT\n* Hacked by PH to fit LTSPICE opamp2 symbol\n* Version 0602192\n* Generated by Interface Technologies\n* www.i-t.com\n*\nI_I1 4 VEE_INT DC 1e-2\nD_D_VEEclamp VEEVNBAT 10 DN\nR_RP3 MAINP2 100 RCOLD 1\nI_I4 100 ISUPP2 DC .6m\nR_RCM2 VINMID INV RCOLD 1000MEG\nD_DN1 35 36 DEN\nQ_Q2 6 INV 8 NPN\nR_RCMR1 CMR_SET 100 RCOLD 1\nD_D9 ISUPP2 VEE DNOM\nG_G2 100 10A 10 100 1\nR_Rout 80 81 RCOLD 30\nD_DN4 94 95 DIN\nE_E1 100 0 103 0 1\nE_E4 VCC_INT 0 VCC 0 1\nG_GV 100 15 6 5 1\nV_VL1 82 81 .089\nL_LCM 31 30 5.1931e-4\nG_GN1 0 NINV 94 0 0.7e-6\nV_VN3 0 93 2\nI_I2 ISUPP1 100 DC .6m\nR_RP1 10 100 RCOLD 1.31e6\nE_E5 VEE_INT 0 VEE 0 1\nD_D11 83 MAINP2 DILIM\nE_DIFF1 CMRERR 0 VALUE {V(CMR_SET,VINMID)}\nD_DN5 96 97 DIN\nC_CCM3 100 CMRRP2 1.8e-9\nR_R4 100 ISUPP2 RCOLD 10meg\nE_E7 CMR_SET 100 VALUE { Limit(V(VINMID, 100), -3.7, 3.7) }\nE_ENIN N265500 N265385 36 0 3.5e-10\nV_VN5 0 96 2\nR_RCM4 CMRR_V 100 RCOLD 1\nL_LCM1 N298875 CMRRP1 3.899e-8\nE_EOS1 NINV N264552 POLY(1) CMRERR 100 0.0 0\nC_COPOUT 100 81 2p\nR_R3 ISUPP1 100 RCOLD 10meg\nR_RE1 7 4 RCOLD 10\nV_VN2 37 0 3Vdc\nC_CP1 100 10 4.0e-12\nR_RCM1b 31 100 RCOLD 4\nG_G3a 100 MAINP2 10A 100 1\nR_R5 100 CMRERR RCOLD 1k\nG_G10 0 INV 97 0 0\nL_Lout OUT 81 .011f\nV_VN6 98 0 2\nR_R6 CMRRP1 N298875 RCOLD 4\nR_RCM2a N298875 100 RCOLD 1\nR_RC2 VCC_INT 6 RCOLD 15.17\nG_G4 100 ISUPP2 80 81 -.033\nD_D10 MAINP2 82 DILIM\nR_RCM3 CMRRP2 100 RCOLD 1\nC_CP2 100 10A 2.27e-10\nD_DN2 36 37 DEN\nQ_Q1 5 N265500 7 NPN\nD_D8 VCC ISUPP1 DNOM\nG_G8 100 CMRR_V CMRRP2 100 1\nD_DN6 97 98 DIN\nC_CP3 100 MAINP2 2.27e-10\nG_G7 100 CMRRP2 CMRRP1 100 1\nR_RC1 VCC_INT 5 RCOLD 15.17\nD_D7 ISUPP2 100 DZ\nG_G1 100 10 15 100 1e-4\nV_VP VCC_INT VCCVPBAT 1.68\nG_G6 100 CMRRP1 30 100 1\nD_DN3 93 94 DIN\nR_RV 15 100 RCOLD 100\nE_EBUF 80 100 MAINP2 100 1\nR_RCM1 NINV VINMID RCOLD 1000MEG\nD_DZ1 15 16 DLIM\nR_RE2 8 4 RCOLD 10\nD_D6 100 ISUPP1 DZ\nC_CCM4 100 CMRR_V 1.8e-9\nD_D_VCCclamp 10 VCCVPBAT DP\nV_VL2 81 83 .089\nV_VN1 0 35 3Vdc\nE_E8 103 VEE_INT VALUE { (V(VCC_INT)-V(VEE_INT))/2 }\nR_RCM2b 30 31 RCOLD 1.56e7\nV_VN VEEVNBAT VEE_INT 1.68\nD_DZ2 100 16 DLIM\nE_EOS N264552 N265385 POLY(1) CMRR_V 100 0.0 0\nG_G5 100 30 VINMID 100 9.162e-8\nG_G3 ISUPP1 100 80 81 .033\nV_VN4 95 0 2\nR_RP2 10A 100 RCOLD 1\n.MODEL DLIM D(IS=1E-15 BV=13.22)\n.MODEL DEN D(IS=1E-9 RS=1000 KF=1.5E-12 AF=.89)\n.MODEL DIN D(IS=.85E-9 RS=1 KF=1.5E-17 AF=.92)\n.MODEL DNOM D(IS=1E-15 T_ABS=-100)\n.MODEL DZ D(IS=1E-15 BV=50 T_ABS=-100)\n.MODEL RCOLD RES T_ABS=-273\n.MODEL DILIM D(IS=1E-15)\n.MODEL NPN NPN(BF=8.33e2 )\n.MODEL DP D(IS=5E-10 BV=700 )\n.MODEL DN D(IS=5E-10 BV=700 )\n.MODEL DCMRP D(IS=1E-15 BV=2)\n.MODEL DCMRM D(IS=1E-15 BV=4.6)\n.ENDS TEXT -1016 776 Left 2 !.model BF862J NJF(Beta=47.800E-3 Betatce=-.5 Rd=.8 Rs=7.5000 Lambda=37.300E-3 Vto=-.57093\n+ Vtotc=-2.0000E-3 Is=424.60E-12 Isr=2.995p N=1 Nr=2 Xti=3 Alpha=-1.0000E-3\n+ Vk=59.97 Cgd=7.4002E-12 M=.6015 Pb=.5 Fc=.5 Cgs=8.2890E-12 Kf=87.5E-18\n+ Af=1)\n \n* Same with more realistic leakage\n.model BF862_1pA ako:BF862J Isr=6e-15 Is=6e-15;\n.model BF862_25mA ako:BF862J Beta=150.0E-3;\n.model BF862_10mA ako:BF862J Beta=37.0E-3; TEXT -992 -104 Invisible 2 !.MODEL BCV61C_HALF NPN\n+ IS = 1.822E-14\n+ NF = 0.9932\n+ ISE = 2.894E-16\n+ NE = 1.4\n+ BF = 324.4\n+ IKF = 0.109\n+ VAF = 82\n+ NR = 0.9931\n+ ISC = 9.982E-12\n+ NC = 1.763\n+ BR = 8.29\n+ IKR = 0.09\n+ VAR = 17.9\n+ RB = 10\n+ IRB = 5E-06\n+ RBM = 5\n+ RE = 0.649\n+ RC = 0.7014\n+ XTB = 0\n+ EG = 1.11\n+ XTI = 3\n+ CJE = 1.244E-11\n+ VJE = 0.7579\n+ MJE = 0.3656\n+ TF = 4.908E-10\n+ XTF = 9.51\n+ VTF = 2.927\n+ ITF = 0.3131\n+ PTF = 0\n+ CJC = 3.347E-12\n+ VJC = 0.5463\n+ MJC = 0.391\n+ XCJC = 0.6193\n+ TR = 9E-08\n+ CJS = 0\n+ VJS = 0.75\n+ MJS = 0.333\n+ FC = 0.979 TEXT -296 -144 Invisible 2 !.MODEL 2SD2704K NPN\n+ IS=250.00E-15\n+ BF=2.3219E3\n+ VAF=100\n+ IKF=25.778E-3\n+ ISE=270.34E-15\n+ NE=1.8069\n+ BR=45.088\n+ VAR=100\n+ IKR=9.4796\n+ ISC=411.09E-15\n+ NC=2.0254\n+ NK=.54182\n+ RE=.4\n+ RB=3.1823\n+ RC=58.585E-3\n+ CJE=8.7706E-12\n+ MJE=.66324\n+ CJC=15.709E-12\n+ MJC=.53302\n+ TF=3.8352E-9\n+ XTF=32.147\n+ VTF=472.13\n+ ITF=85.294\n+ TR=7.0574E-9\n+ XTB=1.5000 RECTANGLE Normal 16 528 -128 352 2 RECTANGLE Normal -128 496 -336 304 2 -- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 hobbs at electrooptical dot net http://electrooptical.net