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semiconductor drift

Started by John Larkin December 3, 2014
On Wed, 03 Dec 2014 18:01:04 -0800, John Larkin
<jlarkin@highlandtechnology.com> wrote:

> >We have two 8-channel waveform generators that were shipped 4 months >ago, and came back because the customer ordered too many or something. >We routinely test anything that comes back, before returning them or >returning to stock. > >What's interesting is that all 16 channels have a negative DC offset. >Each channel is a diff-current-output cmos DAC, an opamp diffamp, a >passive LC filter, and an output amp; the opamps are fast bipolars. We >apply a software cal factor to the DAC data (saved in a cal table) to >get the offsets way below 1 mV when we ship. After 4 months, we're >seeing offsets from -5 to -10 mV. These are not actual failures, but I >don't like or understand the trend. > >We'll be doing some tests to try to isolate the drift to dac, diffamp, >or output amp. I figure we could measure things on one board, bake to >accelerate aging, and re-measure. > >My general question, to people who understand semi physics: what are >the physical mechanisms that could make the DAC, or the opamps, have >this ensemble negative drift vs time? > >Parts are DAC2904, LMH6642, and THS3062. > >THS3062 is known to be buggy, latching up if slewed hard at high >frequency, but this board doesn't stress them up there.
Perhaps something as simple as "burn-in" _before_ offset adjustment will relieve the PCB board stresses that are probably the cause of the drift. ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: skypeanalog | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
Den l=F8rdag den 6. december 2014 17.13.40 UTC+1 skrev Jan Panteltje:
> On a sunny day (Sat, 6 Dec 2014 07:41:34 -0800 (PST)) it happened Lasse > Langwadt Christensen <langwadt@fonz.dk> wrote in > <08f0d3fc-7d38-4e91-91af-b7340d272faf@googlegroups.com>: >=20 > >Den l=F8rdag den 6. december 2014 03.11.10 UTC+1 skrev miso: > >> http://www.analog.com/static/imported-files/rarely_asked_questions/RAQ=
_an=3D
> >alogICs.pdf > > > >http://youtu.be/UCXCLR3xq8U?t=3D2m12s > > > >-Lasse >=20 > I think that is only value of SMDs changing. > The width of the serial pulses does not change at all, > and that comes from the micro's clock. > The guy sounds like talking rubbish. > Could not listen to it all.
all the timing is from the micros clock, it changes about 1% good luck trying to see the baudrate change 1% -Lasse
On Fri, 05 Dec 2014 18:44:12 -0600, the renowned Tim Wescott
<seemywebsite@myfooter.really> wrote:

>On Fri, 05 Dec 2014 15:35:41 -0500, Spehro Pefhany wrote: > >> On Fri, 05 Dec 2014 08:36:56 -0800, the renowned John Larkin >> <jlarkin@highlandtechnology.com> wrote: >> >> >>> >>>That's cool. Table 1 shows typical bipolar opamp drift of 5 nV per month >>>for bipolar opamps. Even if our drift is in our first opamp, it's a lot >>>more than that... more like 100 uV/month. >>> >>>Later on, they say >>> >>>"The offset drift over time is low for bipolar input stages, and >>>typically ranges from a few &#4294967295;V/month down to a few nV/month. This >>>parameter is dependent upon the heat and mechanical stress induced on >>>the op amp by the fabrication of the circuit board and the application >>>circuit." >>> >>> >>>Yeah, die stress could be another mechanism. >> >> I've not seen undamaged bipolar parts (even really, really crappy ones >> made with crummy processes) drift anything like that much. And I would >> have seen it, since we went through many iterations of making really >> inexpensive thermocouple instrumentation over many, many years. CMOS, >> yes, it can go wacky, because of ionic contamination, I'm told. >> >> Heck our first products were using an LM709 with custom individual >> hand-wire-wound resistors for calibration (including offset voltage). >> The customer couldn't tweak those back into calibration even if they >> wanted to. >> >> Interestingly we recently bought an ADC box from Data Translation for an >> experiment and they'd routed out around the voltage reference chips, >> presumably because of some kind of die stress issue- earlier revisions >> didn't have it. See page 3/8 here: http://tinyurl.com/mzcu8wc > >"The link you're trying to access can't be used to share files. Please ask >the file owner to provide you with a shared link instead. Contact Box >Support if you need help."
Oh, FFS, I thought it might do that- the URL is about 3 pages long. http://www.datatranslation.com/products/dataacquisition/ethernet/DT8824/ Click on Datasheet PDF on the right hand side below the photo. Best regards, Spehro Pefhany -- "it's the network..." "The Journey is the reward" speff@interlog.com Info for manufacturers: http://www.trexon.com Embedded software/hardware/analog Info for designers: http://www.speff.com