On Sat, 31 May 2014 18:38:47 +0100, "Kevin Aylward" <ExtractkevinRemove@kevinaylward.co.uk> wrote:>"Jim Thompson" wrote in message >news:b5rjo95uttogfb33gj2s9sqvge8871be74@4ax.com... > >On Sat, 31 May 2014 08:35:37 +0100, "Kevin Aylward" ><ExtractkevinRemove@kevinaylward.co.uk> wrote: > >>>"josephkk" wrote in message >>>news:aabio99qunakhi9sl7ok0ibg8uttqubuo8@4ax.com... >> > > >>LVS is what everyone _not_ in the know throws out there as the reason >>you need Cadence. Baloney! I can effortlessly and error-free >>generate any netlist syntax known to man... get an _old_ copy of >>PSpice (before the ruination of OrCAD and Cadence) and look up >>"templates". > >>If I couldn't, how did this... > >I am not claiming that its absolutely impossible to do without a full >integrated system in all cases, I am saying that it is much, much harder, >such that it is not really a realistic option for mainstream professional >design. Its pretty much a non debateable fact that designing a modern uP >would without the appropriate tools would be impossible. PSpice and micky >mouse layout tools just wont cut it there. > >>Cadence for documentation purposes, but layout was done using my LVS >>netlists. Worked first pass! > >So, you were not doing 10 GHz with parasitic extraction then. > > >Kevin Aylward B.Sc. >www.kevinaylward.co.uk >www.anasoft.co.uk - SuperSpiceThat Long Island design was for a clutch controller for heavy trucks... carefully controlled application and release... no jerky starts and wear minimized ;-) The whole world doesn't revolve around 10GHz uP's... there are lots of tasks that don't take that kind of speed. However I have done a WiFi repeater at ~5.5GHz with PSpice. And occasionally I back annotate with extracted parasitics to verify speed. It's not exactly rocket science... and it doesn't take Cadense tools to do it. (Misspelling purposefully :-) You _are_ aware that an LVS tool can be used to verify that two _schematics_ have exactly the same content (say my PSpice schematic versus a Virtuoso rendition)? ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: skypeanalog | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
Headphone amp simulation
Started by ●May 26, 2014
Reply by ●May 31, 20142014-05-31
Reply by ●May 31, 20142014-05-31
On Sat, 31 May 2014 18:42:36 +0100, "Kevin Aylward" <ExtractkevinRemove@kevinaylward.co.uk> wrote:>>"Jim Thompson" wrote in message >>news:6jsjo95p6dklru3r8d4lb12f18ulumt1q7@4ax.com... > >>Shows your ignorance, VCC is for analog, VDD for digital. > >Oh... ? > >VCC - Voltage Collector Collector, VDD Voltage Drain Drain, VEE Emitter >Emitter, VSS Voltage Source Source > >older guys = bipolar design = VCC/VEE >younger guys = mos design = VDD/VSS > >I have never heard of any reference to VDD as a digital designator. When >was TTL ever VDD ? > > >Kevin Aylward B.Sc. >www.kevinaylward.co.uk >www.anasoft.co.uk - SuperSpiceIn MODERN day usage, VDD is usually digital, VCC usually analog... although there's less and less standardization... on cells I tend to use VP and VN. ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: skypeanalog | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
Reply by ●May 31, 20142014-05-31
"Jim Thompson" wrote in message news:9g5ko91drg0jatth62vvnt8dgtecut786e@4ax.com... On Sat, 31 May 2014 18:42:36 +0100, "Kevin Aylward" <ExtractkevinRemove@kevinaylward.co.uk> wrote:>>"Jim Thompson" wrote in message >>news:6jsjo95p6dklru3r8d4lb12f18ulumt1q7@4ax.com... > >>Shows your ignorance, VCC is for analog, VDD for digital. > >Oh... ? > >VCC - Voltage Collector Collector, VDD Voltage Drain Drain, VEE Emitter >Emitter, VSS Voltage Source Source > >older guys = bipolar design = VCC/VEE >younger guys = mos design = VDD/VSS > >I have never heard of any reference to VDD as a digital designator. When >was TTL ever VDD ? > >>In MODERN day usage, VDD is usually digital, VCC usually analog... >although there's less and less standardization...I can't agree on that. I have never seen that as an informal standard. Typically I see things like vdd_ana and vdd_dig, vreg, vunreg, etc. Most modern analog design is defacto in pure cmos, say, 95%+ of it, and VDD *is* the norm there. Its pretty much impossible today to even find designers that that know bipolar at all, i.e. gm=40.IC Kevin Aylward B.Sc. www.kevinaylward.co.uk www.anasoft.co.uk - SuperSpice
Reply by ●May 31, 20142014-05-31
"Jim Thompson" wrote in message news:b5rjo95uttogfb33gj2s9sqvge8871be74@4ax.com...> Carried my little Lenovo laptop with me. Customer >had the full Cadence toolset. I quickly showed that I could run >circles around the Cadence stuff using my laptop, so I designed all >the analog portions of the chipI don't see this is a comparison of Cadence tools against Junior level tools, I see it as a comparison between experienced, expert professionals, with Junior Competency level engineers. Kevin Aylward B.Sc. kevin@kevinaylward.co.uk www.kevinaylward.co.uk
Reply by ●May 31, 20142014-05-31
On Sat, 31 May 2014 19:14:28 +0100, "Kevin Aylward" <ExtractkevinRemove@kevinaylward.co.uk> wrote:>"Jim Thompson" wrote in message >news:9g5ko91drg0jatth62vvnt8dgtecut786e@4ax.com... > >On Sat, 31 May 2014 18:42:36 +0100, "Kevin Aylward" ><ExtractkevinRemove@kevinaylward.co.uk> wrote: > >>>"Jim Thompson" wrote in message >>>news:6jsjo95p6dklru3r8d4lb12f18ulumt1q7@4ax.com... >> >>>Shows your ignorance, VCC is for analog, VDD for digital. >> >>Oh... ? >> >>VCC - Voltage Collector Collector, VDD Voltage Drain Drain, VEE Emitter >>Emitter, VSS Voltage Source Source >> >>older guys = bipolar design = VCC/VEE >>younger guys = mos design = VDD/VSS >> >>I have never heard of any reference to VDD as a digital designator. When >>was TTL ever VDD ? >> >> > >>In MODERN day usage, VDD is usually digital, VCC usually analog... >>although there's less and less standardization... > >I can't agree on that. I have never seen that as an informal standard. >Typically I see things like vdd_ana and vdd_dig, vreg, vunreg, etc. Most >modern analog design is defacto in pure cmos, say, 95%+ of it, and VDD *is* >the norm there.Some of us esoteric types build wonderful performance from BiCMOS... like my... <http://www.analog-innovations.com/SED/Sample_Custom_Chip_Design.pdf> (Pretty hard to do really good VGA's in pure CMOS)>Its pretty much impossible today to even find designers that >that know bipolar at all, i.e. gm=40.ICI agree with that. I cut my teeth on bipolar... it was probably close to 20 years into my career before I did a CMOS design... my first CAD-based as well. However I could just as easily design with tubes (valves for you UK types :), though I've not had a commercial application.> >Kevin Aylward B.Sc. >www.kevinaylward.co.uk >www.anasoft.co.uk - SuperSpice...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: skypeanalog | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
Reply by ●May 31, 20142014-05-31
On 31/05/14 19:48, Jim Thompson wrote: [...]> > That Long Island design was for a clutch controller for heavy > trucks... carefully controlled application and release... no jerky > starts and wear minimized ;-) The whole world doesn't revolve around > 10GHz uP's... there are lots of tasks that don't take that kind of > speed. [...] > ...Jim Thompson >Haha! That reminds me of a citation I picked up some years ago: "A slower system like cruise control can typically be handled by a mid-level processor such as a 700MHz x86 ..." -- Shawn Liu of National Instruments in "Embedded Design", November 2002 Jeroen Belleman
Reply by ●May 31, 20142014-05-31
On Sat, 31 May 2014 19:15:45 +0100, "Kevin Aylward" <ExtractkevinRemove@kevinaylward.co.uk> wrote:>"Jim Thompson" wrote in message >news:b5rjo95uttogfb33gj2s9sqvge8871be74@4ax.com... > >> Carried my little Lenovo laptop with me. Customer >>had the full Cadence toolset. I quickly showed that I could run >>circles around the Cadence stuff using my laptop, so I designed all >>the analog portions of the chip > >I don't see this is a comparison of Cadence tools against Junior level >tools, I see it as a comparison between experienced, expert professionals, >with Junior Competency level engineers.I quite assure you that I can enter schematics faster in PSpice (MicroSim) Schematics than you can in Virtuoso... those pull-down menus are a time waster. Plus... in many instances, PSpice simulates faster... particularly on the typical network _workgroup_ crap.> > >Kevin Aylward B.Sc. >kevin@kevinaylward.co.uk >www.kevinaylward.co.uk...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: skypeanalog | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
Reply by ●May 31, 20142014-05-31
On Sat, 31 May 2014 20:23:56 +0200, jeroen Belleman <jeroen@nospam.please> wrote:>On 31/05/14 19:48, Jim Thompson wrote: >[...] >> >> That Long Island design was for a clutch controller for heavy >> trucks... carefully controlled application and release... no jerky >> starts and wear minimized ;-) The whole world doesn't revolve around >> 10GHz uP's... there are lots of tasks that don't take that kind of >> speed. [...] >> ...Jim Thompson >> > >Haha! That reminds me of a citation I picked up some years ago: > >"A slower system like cruise control can typically be handled by >a mid-level processor such as a 700MHz x86 ..." >-- Shawn Liu of National Instruments in "Embedded Design", November 2002 > >Jeroen BellemanWe did have a clock... 5MHz... divided down to 156kHz for the sampling (flipping a magnetic sensor and synchronous demod... modeling mentioned in prior posts ;-) ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: skypeanalog | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
Reply by ●May 31, 20142014-05-31
"Jim Thompson" wrote in message news:ih7ko9d05f9hs7ocglnpa881j0fu3sbvtc@4ax.com... On Sat, 31 May 2014 19:15:45 +0100, "Kevin Aylward" <ExtractkevinRemove@kevinaylward.co.uk> wrote:>"Jim Thompson" wrote in message >news:b5rjo95uttogfb33gj2s9sqvge8871be74@4ax.com... > >> Carried my little Lenovo laptop with me. Customer >>had the full Cadence toolset. I quickly showed that I could run >>circles around the Cadence stuff using my laptop, so I designed all >>the analog portions of the chip > >>I don't see this is a comparison of Cadence tools against Junior level >>tools, I see it as a comparison between experienced, expert professionals, >>with Junior Competency level engineers.>I quite assure you that I can enter schematics faster in PSpice >(MicroSim) Schematics than you can in Virtuoso... those pull-down >menus are a time waster.Its the whole environment. Cadence is really quick to work with symbols and schematics and building up a hierarchically design, with modified versions of schematics. I have yet to see any capture program that beats the auto rout wiring/rubberbanding of Cadence. Its totally rectangular from any point to any point.> Plus... in many instances, PSpice simulates >faster... particularly on the typical network _workgroup_ crap.There are issues with simulation on smaller circuits. I have even been running SuperSpice 20 times faster on some circuits. For bigger sims, and running the latest APS with multicore support Spectre can run very fast. However, Berkley Design Automation has a plug into Cadence environment FastSpice that screams 10+ times faster still. A point here is that everyone targets the Cadence environment. Kevin Aylward B.Sc. www.kevinaylward.co.uk www.anasoft.co.uk - SuperSpice
Reply by ●May 31, 20142014-05-31
"Jim Thompson" wrote in message news:257ko9p9i1j3r932v4rlsk6na4qveuhpts@4ax.com...>>Its pretty much impossible today to even find designers that >>that know bipolar at all, i.e. gm=40.IC>I agree with that. I cut my teeth on bipolar... it was probably close >to 20 years into my career before I did a CMOS design... my first >CAD-based as well.>However I could just as easily design with tubes (valves for you UK >types :)I am a guitar player, I know all about tubes. I was getting electrocuted when I was 14.> though I've not had a commercial application.Take up guitar then. Kevin Aylward B.Sc. www.kevinaylward.co.uk www.anasoft.co.uk - SuperSpice
