On 06/03/2013 02:55 PM, bloggs.fredbloggs.fred@gmail.com wrote:> On Monday, June 3, 2013 12:29:10 PM UTC-4, Jim Thompson wrote: >> >> >> >> But, if you see problems, what don't you spell them out, rather than >> >> bloviating? You criticize others for being vague, yet you are the >> >> most obtuse poster in this group. Maybe it's you who is the "senile >> >> old git", huh ?>:-} >> >> >> >> ...Jim Thompson > > Larkin is throwing the typical "not invented by me" hissy-fit, how childish.. There are any number of ways to make the Supertex circuit bullet-proof. This, or anything obviously equivalent to it, takes care of the "That's OK, but it probably doesn't guarantee the 78L12 dropout voltage" problem. > Please view in a fixed-width font such as > Courier. > > .. > .. HV+ > .. | > .. | > .. +----- > .. | | > .. | [Ra1] > .. | | > .. | | > .. | | + V - > .. |_|| | \ z > .. depletion ||--+-----|<|--- > .. FET >|| \ | > .. | | > .. | | > .. | V > V | > .. | + IO - z - | > .. | ------- | > .. | | | | > .. +----| 78LXX |----+----+--- > .. | | | | | > .. | ------- | | > .. === | === [Ra2] > .. | | | | > .. | | | | > .. ---+--------+--------+----+--- > .. > ..No, you do not want to do that. If the load gets disconnected, you'll be sourcing current into the output of the 78Lxx. The input will likely rise until Bad Things Happen. You'd have to add another zener at the output to prevent this, at which point you have 8 parts instead of the original 4. BTW 78Lxx devices _stink_. Their ripple rejection is horrible compared to the 78xx or LM317L. I used to use them occasionally, having beguiled myself into thinking that they were just low-power 78xx, but then I actually read the datasheet. :( Cheers Phil Hobbs -- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 hobbs at electrooptical dot net http://electrooptical.net
low power, HV-in regulator with depletion mosfet
Started by ●June 1, 2013
Reply by ●June 3, 20132013-06-03
Reply by ●June 3, 20132013-06-03
On Monday, June 3, 2013 3:16:47 PM UTC-4, Phil Hobbs wrote:> > No, you do not want to do that. If the load gets disconnected, you'll > > be sourcing current into the output of the 78Lxx. The input will likely > > rise until Bad Things Happen. You'd have to add another zener at the > > output to prevent this, at which point you have 8 parts instead of the > > original 4.That's what Ra2 is about, to sink the zener (or whatever is used) bias current. You're no more likely to require an OVP clamp in this circuit as in any other 78LXX circuit.> > > > BTW 78Lxx devices _stink_. Their ripple rejection is horrible compared > > to the 78xx or LM317L. I used to use them occasionally, having beguiled > > myself into thinking that they were just low-power 78xx, but then I > > actually read the datasheet. :(That is probably another non-issue here taken care of by the choice of input side capacitor to the 78LXX. The FET is operating in its active region so I would expect at least a few 10s of K-Ohms impedance between the HV+ and the 78LXX input. It's good to nitpick all the various failure mechanisms of any circuit, but just don't try to make out that the original Larkin kluge is some kind of failsafe innovation when it is even more vulnerable to failure than this one. Figure 8 http://www.ti.com/lit/ds/symlink/lm78l12.pdf is showing a ripple rejection of 60dB flat out to 20KHz or something, at 5V differential, not spectacular, but not real bad either. Maybe you didn't have enough headroom in your measurement circuit?> > > > Cheers > > > > Phil Hobbs > > > > > > -- > > Dr Philip C D Hobbs > > Principal Consultant > > ElectroOptical Innovations LLC > > Optics, Electro-optics, Photonics, Analog Electronics > > > > 160 North State Road #203 > > Briarcliff Manor NY 10510 > > > > hobbs at electrooptical dot net > > http://electrooptical.net
Reply by ●June 3, 20132013-06-03
On Sun, 02 Jun 2013 09:30:01 -0700, Fred Abse <excretatauris@invalid.invalid> wrote:>On Sun, 02 Jun 2013 09:00:37 -0700, John Larkin wrote: > >> What happens to line regulation? > >11.499V at Vin=18V. >11.619 at Vin=50 > >That's with a MMBZ5232BT (5.6V nominal) zener. >Zener current 0.35mA to 1.05mA over same input voltage range. > >What's annoying, in such a simple circuit, is that LT Spice will go >compute-bound randomly, like when a part value is changed. The usual fix is to >change the minimum time step from something arbitrary like 500 ns to 600 ns. Or >back. > >All Spice does that. This particular example was happier at 10us than 1us.At 10 us, the fast stuff, rise and fall, get line-segment-y, which I don't trust. Some sub-10us oscillation could be lurking. In the DOS days, I used to run ECA, which wasn't Spice based. It was fast and dumped errors like DIVIDE BY ZERO and CONVERGENCE ERROR but just kept going. -- John Larkin Highland Technology, Inc jlarkin at highlandtechnology dot com http://www.highlandtechnology.com Precision electronic instrumentation Picosecond-resolution Digital Delay and Pulse generators Custom laser drivers and controllers Photonics and fiberoptic TTL data links VME thermocouple, LVDT, synchro acquisition and simulation
Reply by ●June 3, 20132013-06-03
On Mon, 03 Jun 2013 07:25:11 -0700, John Larkin <jjlarkin@highNOTlandTHIStechnologyPART.com> wrote:>On Mon, 03 Jun 2013 07:03:42 -0500, John Fields <jfields@austininstruments.com> >wrote: > >>On Sun, 02 Jun 2013 16:16:02 -0700, John Larkin >><jjlarkin@highNOTlandTHIStechnologyPART.com> wrote: >> >>>On Sun, 02 Jun 2013 14:01:07 -0500, John Fields <jfields@austininstruments.com> >>>wrote: >>> >>>>On Sun, 02 Jun 2013 08:44:28 -0700, John Larkin >>>><jjlarkin@highNOTlandTHIStechnologyPART.com> wrote: >>>> >>>>>On Sun, 02 Jun 2013 08:22:45 -0700, Fred Abse <excretatauris@invalid.invalid> >>>>>wrote: >>>>> >>>>>>On Sat, 01 Jun 2013 11:37:50 -0700, John Larkin wrote: >>>>>> >>>>>>> On Sat, 01 Jun 2013 13:34:22 -0500, John Fields <jfields@austininstruments.com> >>>>>>> wrote: >>>>>>> >>>>>>>>On Sat, 01 Jun 2013 10:52:53 -0700, John Larkin >>>>>>>><jjlarkin@highNOTlandTHIStechnologyPART.com> wrote: >>>>>>>> >>>>>>>>--- >>>>>>>><Snipped LTspice circuit list.> >>>>>>>> >>>>>>>>And the elusive supertex.lib file, which LTspice declares is nowhere >>>>>>>>to be found, is to be found, where??? >>>>>>>> >>>>>>>> >>>>>>> >>>>>>> It's in plain sight, hardly elusive. >>>>>>> >>>>>>> Try Google. Or Supertex.com. >>>>>> >>>>>>It consists of .MODELs, but each ends in an .ENDS. Syntax error. .MODELS >>>>>>don't take .ENDS, that's for SUBCKTS, >>>>>> >>>>>>Fills up the SPICE error log with warnings. Get rid of the .ENDS >>>>>>statements. >>>>> >>>>>I just dumped the Supertex file into the LT Spice lib\sub folder and it worked >>>>>fine. >>>> >>>>--- >>>>Regardless, that's a dangerous protocol to follow because whatever you >>>>"dump" into any LTspice folders over which Linear Tech exercises >>>>control can be deleted at their convenience or, as a matter of course, >>>>during synchronization. >>> >>>Then I'd put it back. >> >>--- >>Yeah, sure. >> >>Then they'd wipe it out and you'd put it back in again, and they'd >>wipe it out again and so on, ad infinitum? >> >>You're a childish hypocrite who'd bite off his nose to spite his face >>when he's given good counsel. >>--- >> >>>> >>>>A much better approach is to upload all of the files to a single >>>>directory, somewhere, and then have your readers download them all >>>>into a single folder. >>>> >>>>The beauty in that is that all of the data needed to run that sim will >>>>be local to that file, making it truly portable as long as the circuit >>>>list *.asc file is associated with LTspice. >>>> >>>>Helmut has posted the procedure over and over again for those of us >>>>who are slow to catch on. >>> >>>Quit whining and design something. >> >>--- >>I notice you're starting to accuse everyone of whining lately; seems >>like it's your favorite way of avoiding issues you can't deal with. >> >>Cheap trick, even for a curmudgeon like you. >> >>As far as designs go, I just did a little topology for panfilero and >>posted a link to a data sheet where he could glean the information >>required to finish the design and flesh out the circuit. >> >>You, on the other hand, posted not just one, but _three_ cockamamie >>bullshit circuits using pass transistors for 1.5mA load currents and >>no help for panfilero to go forward with the design. >> >>Laughable, to say the least, but it seems that in an effort to elicit >>guffaws from your readers you actually specify _depletion_ mode >>transistors! > >You don't understand depletion mosfets?--- Straw man. My point was that using them for panfilero's application is complete nonsense when it can be done with an LM4041 and three resistors. --->They have some serious advantages in lots of situations.--- Red herring, since panfilero's situation isn't one where their "serious advantages" are even remotely advantageous. --->At least three people make them, so thay're not expensive or exotic.--- That's all irrelevant, John, the point being that they're superfluous for this application. --->I just designed an active capacitor bleeder for a laser driver. Serious amounts >of energy are stored, and I want to caps to be discharged to zero volts in a >reasonable time. A depletion fet does it.--- Well, la-dee-da! And that has _what_ to do with a constant-voltage shunt regulator (you know, the subject of this thread) handling only miniscule amounts of power??? --->Consider four ways to discharge a capacitor bank: > >1. Pushbutton and resistor; requires manual action > >2. Resistor: slow exponential decay > >3. Constant-current: works great with a depletion fet > >4. Constant-power: ideal, but messy to implement. > >Envision the four discharge curves.--- Red herring. -- JF
Reply by ●June 3, 20132013-06-03
On Mon, 03 Jun 2013 14:43:35 -0500, John Fields <jfields@austininstruments.com> wrote:>On Mon, 03 Jun 2013 07:25:11 -0700, John Larkin ><jjlarkin@highNOTlandTHIStechnologyPART.com> wrote: > >>On Mon, 03 Jun 2013 07:03:42 -0500, John Fields <jfields@austininstruments.com> >>wrote: >> >>>On Sun, 02 Jun 2013 16:16:02 -0700, John Larkin >>><jjlarkin@highNOTlandTHIStechnologyPART.com> wrote: >>> >>>>On Sun, 02 Jun 2013 14:01:07 -0500, John Fields <jfields@austininstruments.com> >>>>wrote: >>>> >>>>>On Sun, 02 Jun 2013 08:44:28 -0700, John Larkin >>>>><jjlarkin@highNOTlandTHIStechnologyPART.com> wrote: >>>>> >>>>>>On Sun, 02 Jun 2013 08:22:45 -0700, Fred Abse <excretatauris@invalid.invalid> >>>>>>wrote: >>>>>> >>>>>>>On Sat, 01 Jun 2013 11:37:50 -0700, John Larkin wrote: >>>>>>> >>>>>>>> On Sat, 01 Jun 2013 13:34:22 -0500, John Fields <jfields@austininstruments.com> >>>>>>>> wrote: >>>>>>>> >>>>>>>>>On Sat, 01 Jun 2013 10:52:53 -0700, John Larkin >>>>>>>>><jjlarkin@highNOTlandTHIStechnologyPART.com> wrote: >>>>>>>>> >>>>>>>>>--- >>>>>>>>><Snipped LTspice circuit list.> >>>>>>>>> >>>>>>>>>And the elusive supertex.lib file, which LTspice declares is nowhere >>>>>>>>>to be found, is to be found, where??? >>>>>>>>> >>>>>>>>> >>>>>>>> >>>>>>>> It's in plain sight, hardly elusive. >>>>>>>> >>>>>>>> Try Google. Or Supertex.com. >>>>>>> >>>>>>>It consists of .MODELs, but each ends in an .ENDS. Syntax error. .MODELS >>>>>>>don't take .ENDS, that's for SUBCKTS, >>>>>>> >>>>>>>Fills up the SPICE error log with warnings. Get rid of the .ENDS >>>>>>>statements. >>>>>> >>>>>>I just dumped the Supertex file into the LT Spice lib\sub folder and it worked >>>>>>fine. >>>>> >>>>>--- >>>>>Regardless, that's a dangerous protocol to follow because whatever you >>>>>"dump" into any LTspice folders over which Linear Tech exercises >>>>>control can be deleted at their convenience or, as a matter of course, >>>>>during synchronization. >>>> >>>>Then I'd put it back. >>> >>>--- >>>Yeah, sure. >>> >>>Then they'd wipe it out and you'd put it back in again, and they'd >>>wipe it out again and so on, ad infinitum? >>> >>>You're a childish hypocrite who'd bite off his nose to spite his face >>>when he's given good counsel. >>>--- >>> >>>>> >>>>>A much better approach is to upload all of the files to a single >>>>>directory, somewhere, and then have your readers download them all >>>>>into a single folder. >>>>> >>>>>The beauty in that is that all of the data needed to run that sim will >>>>>be local to that file, making it truly portable as long as the circuit >>>>>list *.asc file is associated with LTspice. >>>>> >>>>>Helmut has posted the procedure over and over again for those of us >>>>>who are slow to catch on. >>>> >>>>Quit whining and design something. >>> >>>--- >>>I notice you're starting to accuse everyone of whining lately; seems >>>like it's your favorite way of avoiding issues you can't deal with. >>> >>>Cheap trick, even for a curmudgeon like you. >>> >>>As far as designs go, I just did a little topology for panfilero and >>>posted a link to a data sheet where he could glean the information >>>required to finish the design and flesh out the circuit. >>> >>>You, on the other hand, posted not just one, but _three_ cockamamie >>>bullshit circuits using pass transistors for 1.5mA load currents and >>>no help for panfilero to go forward with the design. >>> >>>Laughable, to say the least, but it seems that in an effort to elicit >>>guffaws from your readers you actually specify _depletion_ mode >>>transistors! >> >>You don't understand depletion mosfets? > >--- >Straw man. > >My point was that using them for panfilero's application is complete >nonsense when it can be done with an LM4041 and three resistors.This is for my application. I never mentioned Panfilero in this thread.>--- > >>They have some serious advantages in lots of situations. > >--- >Red herring, since panfilero's situation isn't one where their >"serious advantages" are even remotely advantageous. >--- > >>At least three people make them, so thay're not expensive or exotic. > >--- >That's all irrelevant, John, the point being that they're superfluous >for this application.This is MY application, MY thread, you moron!> >>I just designed an active capacitor bleeder for a laser driver. Serious amounts >>of energy are stored, and I want to caps to be discharged to zero volts in a >>reasonable time. A depletion fet does it. > >--- >Well, la-dee-da! > >And that has _what_ to do with a constant-voltage shunt regulator (you >know, the subject of this thread) handling only miniscule amounts of >power???This is MY application, MY thread, you moron! (I find it's best to repeat things to morons.)>--- > >>Consider four ways to discharge a capacitor bank: >> >>1. Pushbutton and resistor; requires manual action >> >>2. Resistor: slow exponential decay >> >>3. Constant-current: works great with a depletion fet >> >>4. Constant-power: ideal, but messy to implement. >> >>Envision the four discharge curves. > >--- >Red herring.Yeah, electronics doesn't interest you. -- John Larkin Highland Technology, Inc jlarkin at highlandtechnology dot com http://www.highlandtechnology.com Precision electronic instrumentation Picosecond-resolution Digital Delay and Pulse generators Custom laser drivers and controllers Photonics and fiberoptic TTL data links VME thermocouple, LVDT, synchro acquisition and simulation
Reply by ●June 3, 20132013-06-03
On 06/03/2013 03:36 PM, bloggs.fredbloggs.fred@gmail.com wrote:> On Monday, June 3, 2013 3:16:47 PM UTC-4, Phil Hobbs wrote: > >> >> No, you do not want to do that. If the load gets disconnected, >> you'll >> >> be sourcing current into the output of the 78Lxx. The input will >> likely >> >> rise until Bad Things Happen. You'd have to add another zener at >> the >> >> output to prevent this, at which point you have 8 parts instead of >> the >> >> original 4. > > That's what Ra2 is about, to sink the zener (or whatever is used) > bias current. You're no more likely to require an OVP clamp in this > circuit as in any other 78LXX circuit. > > >> >> >> >> BTW 78Lxx devices _stink_. Their ripple rejection is horrible >> compared >> >> to the 78xx or LM317L. I used to use them occasionally, having >> beguiled >> >> myself into thinking that they were just low-power 78xx, but then >> I >> >> actually read the datasheet. :( > > That is probably another non-issue here taken care of by the choice > of input side capacitor to the 78LXX. The FET is operating in its > active region so I would expect at least a few 10s of K-Ohms > impedance between the HV+ and the 78LXX input. > > It's good to nitpick all the various failure mechanisms of any > circuit, but just don't try to make out that the original Larkin > kluge is some kind of failsafe innovation when it is even more > vulnerable to failure than this one. > > Figure 8 http://www.ti.com/lit/ds/symlink/lm78l12.pdf is showing a > ripple rejection of 60dB flat out to 20KHz or something, at 5V > differential, not spectacular, but not real bad either. Maybe you > didn't have enough headroom in your measurement circuit? >I don't have a dog in this fight. JL's circuit was a reworked version of one dating back to the tube days, as he said himself, and similar ones have appeared in every one of those interminable Circuits Encyclopedias that people used to publish. (I had to buy a bunch of those a couple of years ago, in order to cite them as prior art against a really dumb patent. They're even more horrible than I remembered.) The tube version would have been a lot more robust against transients and shorts and stuff, but its regulation would have been very poor by modern standards. Why not discuss circuits, rather than getting into pissing contests? I mean, it's not as though Figure 10 in the IXYS app note is your own personal masterpiece or anything. Back to the circuit. Using a voltage divider to protect the regulator requires fairly tight constraints on the component values vs the HV voltage, and you haven't shown any values. It also wastes a lot of power in general. A zener would be very much safer, would waste no (additional) power at all in normal operation, and would protect against regulator failure as well. And with all the HV transients potentially running round that circuit at turn-on, I wouldn't agree that it's unlikely to need an OVP clamp. Shorting the HV supply to ground (e.g. some sensible tech discharging the capacitors before working on the equipment) could be exciting as well--inductive spikes everywhere, plus the usual 78xx failure mode when their inputs are shorted to ground. Cheers Phil Hobbs -- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 hobbs at electrooptical dot net http://electrooptical.net
Reply by ●June 3, 20132013-06-03
Phil Hobbs wrote:> On 06/03/2013 12:42 PM, John Larkin wrote: > <snip> > >> Electronic designers need imagination, not to just conceive circuits, >> but also >> to imagine all their hazards. > > > Well, sorry to introduce discussion into this wonderfully artistic > pissing contest, but I'll take that invitation. > > 0. As you already mentioned, the IXYS FETs don't have a pinchoff > voltage that's guaranteed to be high enough to accommodate the 78Lxx's > dropout voltage. > > 1. The 78Lxx can't sink any significant current from its output, so as > Jamie or somebody mentioned, C2 had better not open up, or the 78Lxx is > liable to blow up when the HV is applied. > > 2. The usual 78xx vulnerability to shorting the input to ground, if C2 > is too big. > > 3. No protection, and possible danger if the FET shorts. > > 4. No HV supply reversal protection. > > Did I miss any? > > Cheers > > Phil Hobbs >I think you pretty much covered it but I'll add to it :) If the initial charge/transients on the drain to gate do not damage the reg output, the elevated voltage could force the reg into an unloaded state on the input and cause the fet to supply too much voltage for the reg input. Depending on the form of transients, the cap on the input could charge if the duty cycles > 50%. Just a thought.. Jamie
Reply by ●June 3, 20132013-06-03
On Mon, 03 Jun 2013 12:57:49 -0700, John Larkin <jlarkin@highlandtechnology.com> wrote:>On Mon, 03 Jun 2013 14:43:35 -0500, John Fields ><jfields@austininstruments.com> wrote: > >>On Mon, 03 Jun 2013 07:25:11 -0700, John Larkin >><jjlarkin@highNOTlandTHIStechnologyPART.com> wrote: >> >>>On Mon, 03 Jun 2013 07:03:42 -0500, John Fields <jfields@austininstruments.com> >>>wrote: >>> >>>>On Sun, 02 Jun 2013 16:16:02 -0700, John Larkin >>>><jjlarkin@highNOTlandTHIStechnologyPART.com> wrote: >>>> >>>>>On Sun, 02 Jun 2013 14:01:07 -0500, John Fields <jfields@austininstruments.com> >>>>>wrote: >>>>> >>>>>>On Sun, 02 Jun 2013 08:44:28 -0700, John Larkin >>>>>><jjlarkin@highNOTlandTHIStechnologyPART.com> wrote: >>>>>> >>>>>>>On Sun, 02 Jun 2013 08:22:45 -0700, Fred Abse <excretatauris@invalid.invalid> >>>>>>>wrote: >>>>>>> >>>>>>>>On Sat, 01 Jun 2013 11:37:50 -0700, John Larkin wrote: >>>>>>>> >>>>>>>>> On Sat, 01 Jun 2013 13:34:22 -0500, John Fields <jfields@austininstruments.com> >>>>>>>>> wrote: >>>>>>>>> >>>>>>>>>>On Sat, 01 Jun 2013 10:52:53 -0700, John Larkin >>>>>>>>>><jjlarkin@highNOTlandTHIStechnologyPART.com> wrote: >>>>>>>>>> >>>>>>>>>>--- >>>>>>>>>><Snipped LTspice circuit list.> >>>>>>>>>> >>>>>>>>>>And the elusive supertex.lib file, which LTspice declares is nowhere >>>>>>>>>>to be found, is to be found, where??? >>>>>>>>>> >>>>>>>>>> >>>>>>>>> >>>>>>>>> It's in plain sight, hardly elusive. >>>>>>>>> >>>>>>>>> Try Google. Or Supertex.com. >>>>>>>> >>>>>>>>It consists of .MODELs, but each ends in an .ENDS. Syntax error. .MODELS >>>>>>>>don't take .ENDS, that's for SUBCKTS, >>>>>>>> >>>>>>>>Fills up the SPICE error log with warnings. Get rid of the .ENDS >>>>>>>>statements. >>>>>>> >>>>>>>I just dumped the Supertex file into the LT Spice lib\sub folder and it worked >>>>>>>fine. >>>>>> >>>>>>--- >>>>>>Regardless, that's a dangerous protocol to follow because whatever you >>>>>>"dump" into any LTspice folders over which Linear Tech exercises >>>>>>control can be deleted at their convenience or, as a matter of course, >>>>>>during synchronization. >>>>> >>>>>Then I'd put it back. >>>> >>>>--- >>>>Yeah, sure. >>>> >>>>Then they'd wipe it out and you'd put it back in again, and they'd >>>>wipe it out again and so on, ad infinitum? >>>> >>>>You're a childish hypocrite who'd bite off his nose to spite his face >>>>when he's given good counsel. >>>>--- >>>> >>>>>> >>>>>>A much better approach is to upload all of the files to a single >>>>>>directory, somewhere, and then have your readers download them all >>>>>>into a single folder. >>>>>> >>>>>>The beauty in that is that all of the data needed to run that sim will >>>>>>be local to that file, making it truly portable as long as the circuit >>>>>>list *.asc file is associated with LTspice. >>>>>> >>>>>>Helmut has posted the procedure over and over again for those of us >>>>>>who are slow to catch on. >>>>> >>>>>Quit whining and design something. >>>> >>>>--- >>>>I notice you're starting to accuse everyone of whining lately; seems >>>>like it's your favorite way of avoiding issues you can't deal with. >>>> >>>>Cheap trick, even for a curmudgeon like you. >>>> >>>>As far as designs go, I just did a little topology for panfilero and >>>>posted a link to a data sheet where he could glean the information >>>>required to finish the design and flesh out the circuit. >>>> >>>>You, on the other hand, posted not just one, but _three_ cockamamie >>>>bullshit circuits using pass transistors for 1.5mA load currents and >>>>no help for panfilero to go forward with the design. >>>> >>>>Laughable, to say the least, but it seems that in an effort to elicit >>>>guffaws from your readers you actually specify _depletion_ mode >>>>transistors! >>> >>>You don't understand depletion mosfets? >> >>--- >>Straw man. >> >>My point was that using them for panfilero's application is complete >>nonsense when it can be done with an LM4041 and three resistors. > > >This is for my application. I never mentioned Panfilero in this >thread.--- Apologies. I got this thread mixed up with the: "low power voltage reference recommendation" thread where you introduced the rather humorous idea of using depletion mode MOSFETS as superfluous series pass elements for 8000 ohm loads drawing 1.5 milliamperes. --->Yeah, electronics doesn't interest you.--- You keep saying that, a la Goebbels, over and over, and yet I keep on posting designs, sims, critiques, - which you particularly seem to hate - yummy recipes, plots of interesting things like resistance VS voltage across tungsten filament lamps and, sometimes, tutorials for noobs. Why would you say that when it obviously isn't true? -- JF
Reply by ●June 3, 20132013-06-03
On Mon, 03 Jun 2013 15:53:36 -0500, John Fields <jfields@austininstruments.com> wrote:>On Mon, 03 Jun 2013 12:57:49 -0700, John Larkin ><jlarkin@highlandtechnology.com> wrote: > >>On Mon, 03 Jun 2013 14:43:35 -0500, John Fields >><jfields@austininstruments.com> wrote: >> >>>On Mon, 03 Jun 2013 07:25:11 -0700, John Larkin >>><jjlarkin@highNOTlandTHIStechnologyPART.com> wrote: >>> >>>>On Mon, 03 Jun 2013 07:03:42 -0500, John Fields <jfields@austininstruments.com> >>>>wrote: >>>> >>>>>On Sun, 02 Jun 2013 16:16:02 -0700, John Larkin >>>>><jjlarkin@highNOTlandTHIStechnologyPART.com> wrote: >>>>> >>>>>>On Sun, 02 Jun 2013 14:01:07 -0500, John Fields <jfields@austininstruments.com> >>>>>>wrote: >>>>>> >>>>>>>On Sun, 02 Jun 2013 08:44:28 -0700, John Larkin >>>>>>><jjlarkin@highNOTlandTHIStechnologyPART.com> wrote: >>>>>>> >>>>>>>>On Sun, 02 Jun 2013 08:22:45 -0700, Fred Abse <excretatauris@invalid.invalid> >>>>>>>>wrote: >>>>>>>> >>>>>>>>>On Sat, 01 Jun 2013 11:37:50 -0700, John Larkin wrote: >>>>>>>>> >>>>>>>>>> On Sat, 01 Jun 2013 13:34:22 -0500, John Fields <jfields@austininstruments.com> >>>>>>>>>> wrote: >>>>>>>>>> >>>>>>>>>>>On Sat, 01 Jun 2013 10:52:53 -0700, John Larkin >>>>>>>>>>><jjlarkin@highNOTlandTHIStechnologyPART.com> wrote: >>>>>>>>>>> >>>>>>>>>>>--- >>>>>>>>>>><Snipped LTspice circuit list.> >>>>>>>>>>> >>>>>>>>>>>And the elusive supertex.lib file, which LTspice declares is nowhere >>>>>>>>>>>to be found, is to be found, where??? >>>>>>>>>>> >>>>>>>>>>> >>>>>>>>>> >>>>>>>>>> It's in plain sight, hardly elusive. >>>>>>>>>> >>>>>>>>>> Try Google. Or Supertex.com. >>>>>>>>> >>>>>>>>>It consists of .MODELs, but each ends in an .ENDS. Syntax error. .MODELS >>>>>>>>>don't take .ENDS, that's for SUBCKTS, >>>>>>>>> >>>>>>>>>Fills up the SPICE error log with warnings. Get rid of the .ENDS >>>>>>>>>statements. >>>>>>>> >>>>>>>>I just dumped the Supertex file into the LT Spice lib\sub folder and it worked >>>>>>>>fine. >>>>>>> >>>>>>>--- >>>>>>>Regardless, that's a dangerous protocol to follow because whatever you >>>>>>>"dump" into any LTspice folders over which Linear Tech exercises >>>>>>>control can be deleted at their convenience or, as a matter of course, >>>>>>>during synchronization. >>>>>> >>>>>>Then I'd put it back. >>>>> >>>>>--- >>>>>Yeah, sure. >>>>> >>>>>Then they'd wipe it out and you'd put it back in again, and they'd >>>>>wipe it out again and so on, ad infinitum? >>>>> >>>>>You're a childish hypocrite who'd bite off his nose to spite his face >>>>>when he's given good counsel. >>>>>--- >>>>> >>>>>>> >>>>>>>A much better approach is to upload all of the files to a single >>>>>>>directory, somewhere, and then have your readers download them all >>>>>>>into a single folder. >>>>>>> >>>>>>>The beauty in that is that all of the data needed to run that sim will >>>>>>>be local to that file, making it truly portable as long as the circuit >>>>>>>list *.asc file is associated with LTspice. >>>>>>> >>>>>>>Helmut has posted the procedure over and over again for those of us >>>>>>>who are slow to catch on. >>>>>> >>>>>>Quit whining and design something. >>>>> >>>>>--- >>>>>I notice you're starting to accuse everyone of whining lately; seems >>>>>like it's your favorite way of avoiding issues you can't deal with. >>>>> >>>>>Cheap trick, even for a curmudgeon like you. >>>>> >>>>>As far as designs go, I just did a little topology for panfilero and >>>>>posted a link to a data sheet where he could glean the information >>>>>required to finish the design and flesh out the circuit. >>>>> >>>>>You, on the other hand, posted not just one, but _three_ cockamamie >>>>>bullshit circuits using pass transistors for 1.5mA load currents and >>>>>no help for panfilero to go forward with the design. >>>>> >>>>>Laughable, to say the least, but it seems that in an effort to elicit >>>>>guffaws from your readers you actually specify _depletion_ mode >>>>>transistors! >>>> >>>>You don't understand depletion mosfets? >>> >>>--- >>>Straw man. >>> >>>My point was that using them for panfilero's application is complete >>>nonsense when it can be done with an LM4041 and three resistors. >> >> >>This is for my application. I never mentioned Panfilero in this >>thread. > >--- >Apologies.You quit thinking when you reply to my posts. That's silly.> >I got this thread mixed up with the: > >"low power voltage reference recommendation" thread where you >introduced the rather humorous idea of using depletion mode MOSFETS as >superfluous series pass elements for 8000 ohm loads drawing 1.5 >milliamperes.There was a suggestion to use constant-current diodes. Depletion fets are usually a better choice. If your input and output voltages are pretty much invariant, then use a resistor. If not, a current regulator is an option. LND150/250 are pretty reliably about 1.6 mA Idss and are good for hundreds of volts. That can be handy at times. https://dl.dropboxusercontent.com/u/53724080/Circuits/ESM/ESM_power.pdf That's a "two-bit DAC" -- John Larkin Highland Technology, Inc jlarkin at highlandtechnology dot com http://www.highlandtechnology.com Precision electronic instrumentation Picosecond-resolution Digital Delay and Pulse generators Custom laser drivers and controllers Photonics and fiberoptic TTL data links VME thermocouple, LVDT, synchro acquisition and simulation
Reply by ●June 3, 20132013-06-03
On Mon, 03 Jun 2013 14:38:38 -0400, Phil Hobbs <pcdhSpamMeSenseless@electrooptical.net> wrote:>On 06/02/2013 07:49 PM, Jim Thompson wrote: ><snip> >> http://www.analog-innovations.com/SED/DepletionModeRegulatorWithBootstrap.pdf > >Where does "BOOTSTRAP" come from? It looks like this is a startup >circuit rather than a standalone regulator, since when BOOTSTRAP comes >on, it appears as though it will turn off the FET.This IS a start-up circuit, it powers the switcher control chip (L6561) until the switcher generated power comes up and takes over.>(The voltages and >Zener types aren't marked, so it's hard to be sure, but it sure looks >like that's the intent.)Zo-o-o-om in :-) The voltages are marked. Much like in LTspice, my PSpice behavioral zener model lets you set Vzt @ Izt and the Rs, just by double-clicking the part and a dialog comes up.> >If the bootstrap were intended to improve the regulation of the MOSFET >loop, it would be driving the top of ROFF1 rather than the output. > >Cheers > >Phil HobbsIt's just for start-up. But the regulation is excellent, Q9, and DZ9 comprise a cheapy TL431, a part the customer didn't have on-hand. The L6561Power block piece-wise-linear models the V-I curve of the L6561 as it powers up. ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85140 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
