Forums

Oscillator buffer

Started by o pere o November 14, 2012
The thread related to large signal PSpice models and an emitter follower 
comes from the following problem:

I have an oscillator that should drive a digital part of the system.
In short, what is the best way to achieve this?

My first attempt has been a common base Colpitts oscillator that gives a 
signal riding on the +Vcc rail. This has been AC coupled to a 74AC gate 
biased to the point that gives square output signals.

This works more ore less ok, but: the startup transient, which is 
important here, is different depending if the oscillator amplitude is 
sufficient to toggle the gate. This translates into an envelope that 
raises more ore less smoothly until the gate begins toggling, where the 
envelope raises more abruptly -and I guess that the instantaneous 
frequency changes.

I have thought of two causes for this. The first one is feedback via the 
DC supply: the spikes generated by the gate switching get coupled back 
to the oscillator. The second one could be the change in input impedance 
seen by the oscillator -does this make sense? The cure for #1 could be 
better supply bypassing. The cure for #2 a buffer stage.

So, what could be a good way to generate a digital signal from an 
oscillator without loading it? Ideally I would like to preserve the 
instantaneous frequency of the unloaded startup transient. And: power 
consumption should be low, say preferably (much) less than 1 mA. 
Operating frequency should  be initially 27 MHz, but ideally scalable up 
to ~1 GHz.

Pere

On Wed, 14 Nov 2012 16:58:13 +0100, o pere o <me@somewhere.net> wrote:

>The thread related to large signal PSpice models and an emitter follower >comes from the following problem: > >I have an oscillator that should drive a digital part of the system. >In short, what is the best way to achieve this? > >My first attempt has been a common base Colpitts oscillator that gives a >signal riding on the +Vcc rail. This has been AC coupled to a 74AC gate >biased to the point that gives square output signals. > >This works more ore less ok, but: the startup transient, which is >important here, is different depending if the oscillator amplitude is >sufficient to toggle the gate. This translates into an envelope that >raises more ore less smoothly until the gate begins toggling, where the >envelope raises more abruptly -and I guess that the instantaneous >frequency changes. > >I have thought of two causes for this. The first one is feedback via the >DC supply: the spikes generated by the gate switching get coupled back >to the oscillator. The second one could be the change in input impedance >seen by the oscillator -does this make sense? The cure for #1 could be >better supply bypassing. The cure for #2 a buffer stage. > >So, what could be a good way to generate a digital signal from an >oscillator without loading it? Ideally I would like to preserve the >instantaneous frequency of the unloaded startup transient. And: power >consumption should be low, say preferably (much) less than 1 mA. >Operating frequency should be initially 27 MHz, but ideally scalable up >to ~1 GHz. > >Pere
Do you want an LC oscillator that starts instantly and coherently, with a digital clock output? We do that, with LCs at low frequencies, and coaxial ceramic resonators at 500 MHz or so. 1 GHz shouldn't be horribly difficult, except for the milliwatt constraint. It's just a matter of getting the initial conditions right. https://dl.dropbox.com/u/53724080/Circuits/Burst_Osc.jpg -- John Larkin Highland Technology Inc www.highlandtechnology.com jlarkin at highlandtechnology dot com Precision electronic instrumentation Picosecond-resolution Digital Delay and Pulse generators Custom timing and laser controllers Photonics and fiberoptic TTL data links VME analog, thermocouple, LVDT, synchro, tachometer Multichannel arbitrary waveform generators
On Wed, 14 Nov 2012 16:58:13 +0100, o pere o wrote:

> The thread related to large signal PSpice models and an emitter follower > comes from the following problem: > > I have an oscillator that should drive a digital part of the system. In > short, what is the best way to achieve this? > > My first attempt has been a common base Colpitts oscillator that gives a > signal riding on the +Vcc rail. This has been AC coupled to a 74AC gate > biased to the point that gives square output signals. > > This works more ore less ok, but: the startup transient, which is > important here, is different depending if the oscillator amplitude is > sufficient to toggle the gate. This translates into an envelope that > raises more ore less smoothly until the gate begins toggling, where the > envelope raises more abruptly -and I guess that the instantaneous > frequency changes. > > I have thought of two causes for this. The first one is feedback via the > DC supply: the spikes generated by the gate switching get coupled back > to the oscillator. The second one could be the change in input impedance > seen by the oscillator -does this make sense? The cure for #1 could be > better supply bypassing. The cure for #2 a buffer stage. > > So, what could be a good way to generate a digital signal from an > oscillator without loading it? Ideally I would like to preserve the > instantaneous frequency of the unloaded startup transient. And: power > consumption should be low, say preferably (much) less than 1 mA. > Operating frequency should be initially 27 MHz, but ideally scalable up > to ~1 GHz.
In general you're going to have a hard time getting the oscillator frequency to stay constant as it starts: the oscillator's characteristics must change as it settles into steady-state, because by definition the loop gain goes from more than unity to exactly unity (on average) at that point. Making the oscillator so that the active device loads the resonator as little as possible will go a long way to achieving this, but won't get you all the way. You may need to just do some breadboarding: if you add supply bypassing to the oscillator and the jump goes away, then the problem was supply coupling. If you figure out how to shove a buffer amp in there and the jump goes away, then it was input impedance on the 74xxx. -- My liberal friends think I'm a conservative kook. My conservative friends think I'm a liberal kook. Why am I not happy that they have found common ground? Tim Wescott, Communications, Control, Circuits & Software http://www.wescottdesign.com
On Wed, 14 Nov 2012 16:58:13 +0100, o pere o <me@somewhere.net> wrote:

>The thread related to large signal PSpice models and an emitter follower >comes from the following problem: > >I have an oscillator that should drive a digital part of the system. >In short, what is the best way to achieve this? > >My first attempt has been a common base Colpitts oscillator that gives a >signal riding on the +Vcc rail. This has been AC coupled to a 74AC gate >biased to the point that gives square output signals. > >This works more ore less ok, but: the startup transient, which is >important here, is different depending if the oscillator amplitude is >sufficient to toggle the gate. This translates into an envelope that >raises more ore less smoothly until the gate begins toggling, where the >envelope raises more abruptly -and I guess that the instantaneous >frequency changes. > >I have thought of two causes for this. The first one is feedback via the >DC supply: the spikes generated by the gate switching get coupled back >to the oscillator. The second one could be the change in input impedance >seen by the oscillator -does this make sense? The cure for #1 could be >better supply bypassing. The cure for #2 a buffer stage. > >So, what could be a good way to generate a digital signal from an >oscillator without loading it? Ideally I would like to preserve the >instantaneous frequency of the unloaded startup transient. And: power >consumption should be low, say preferably (much) less than 1 mA. >Operating frequency should be initially 27 MHz, but ideally scalable up >to ~1 GHz. > >Pere
Study a 4046 PLL chip for how to efficiently AC-couple to a CMOS inverter. ...Jim Thompson -- | James E.Thompson, CTO | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona 85048 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
"o pere o" <me@somewhere.net> schreef in bericht 
news:k80f2n$dds$1@dont-email.me...
> The thread related to large signal PSpice models and an emitter follower > comes from the following problem: > > I have an oscillator that should drive a digital part of the system. > In short, what is the best way to achieve this? > > My first attempt has been a common base Colpitts oscillator that gives a > signal riding on the +Vcc rail. This has been AC coupled to a 74AC gate > biased to the point that gives square output signals. > > This works more ore less ok, but: the startup transient, which is > important here, is different depending if the oscillator amplitude is > sufficient to toggle the gate. This translates into an envelope that > raises more ore less smoothly until the gate begins toggling, where the > envelope raises more abruptly -and I guess that the instantaneous > frequency changes. > > I have thought of two causes for this. The first one is feedback via the > DC supply: the spikes generated by the gate switching get coupled back to > the oscillator. The second one could be the change in input impedance seen > by the oscillator -does this make sense? The cure for #1 could be better > supply bypassing. The cure for #2 a buffer stage. > > So, what could be a good way to generate a digital signal from an > oscillator without loading it? Ideally I would like to preserve the > instantaneous frequency of the unloaded startup transient. And: power > consumption should be low, say preferably (much) less than 1 mA. Operating > frequency should be initially 27 MHz, but ideally scalable up to ~1 GHz. > > Pere >
Why can't you use a power on reset circuit that keeps the clock signal low until the oscillator has stabilized? petrus bitbyter
On 11/14/2012 06:51 PM, Jim Thompson wrote:
> On Wed, 14 Nov 2012 16:58:13 +0100, o pere o <me@somewhere.net> wrote: > >> The thread related to large signal PSpice models and an emitter follower >> comes from the following problem: >> >> I have an oscillator that should drive a digital part of the system. >> In short, what is the best way to achieve this? >> >> My first attempt has been a common base Colpitts oscillator that gives a >> signal riding on the +Vcc rail. This has been AC coupled to a 74AC gate >> biased to the point that gives square output signals. >> >> This works more ore less ok, but: the startup transient, which is >> important here, is different depending if the oscillator amplitude is >> sufficient to toggle the gate. This translates into an envelope that >> raises more ore less smoothly until the gate begins toggling, where the >> envelope raises more abruptly -and I guess that the instantaneous >> frequency changes. >> >> I have thought of two causes for this. The first one is feedback via the >> DC supply: the spikes generated by the gate switching get coupled back >> to the oscillator. The second one could be the change in input impedance >> seen by the oscillator -does this make sense? The cure for #1 could be >> better supply bypassing. The cure for #2 a buffer stage. >> >> So, what could be a good way to generate a digital signal from an >> oscillator without loading it? Ideally I would like to preserve the >> instantaneous frequency of the unloaded startup transient. And: power >> consumption should be low, say preferably (much) less than 1 mA. >> Operating frequency should be initially 27 MHz, but ideally scalable up >> to ~1 GHz. >> >> Pere > > Study a 4046 PLL chip for how to efficiently AC-couple to a CMOS > inverter. > > ...Jim Thompson >
Thanks for the suggestion for improving the coupling. I will have a look at it. However, in the 4046 the VCO is giving a stable amplitude, so the effect of the load is constant. Without having looked at it, I am afraid that in the gradual transition from small signal to large signal, the input impedance of the inverter will change significantly... Pere
On 11/14/2012 06:19 PM, John Larkin wrote:
> On Wed, 14 Nov 2012 16:58:13 +0100, o pere o <me@somewhere.net> wrote: > >> The thread related to large signal PSpice models and an emitter follower >> comes from the following problem: >> >> I have an oscillator that should drive a digital part of the system. >> In short, what is the best way to achieve this? >> >> My first attempt has been a common base Colpitts oscillator that gives a >> signal riding on the +Vcc rail. This has been AC coupled to a 74AC gate >> biased to the point that gives square output signals. >> >> This works more ore less ok, but: the startup transient, which is >> important here, is different depending if the oscillator amplitude is >> sufficient to toggle the gate. This translates into an envelope that >> raises more ore less smoothly until the gate begins toggling, where the >> envelope raises more abruptly -and I guess that the instantaneous >> frequency changes. >> >> I have thought of two causes for this. The first one is feedback via the >> DC supply: the spikes generated by the gate switching get coupled back >> to the oscillator. The second one could be the change in input impedance >> seen by the oscillator -does this make sense? The cure for #1 could be >> better supply bypassing. The cure for #2 a buffer stage. >> >> So, what could be a good way to generate a digital signal from an >> oscillator without loading it? Ideally I would like to preserve the >> instantaneous frequency of the unloaded startup transient. And: power >> consumption should be low, say preferably (much) less than 1 mA. >> Operating frequency should be initially 27 MHz, but ideally scalable up >> to ~1 GHz. >> >> Pere > > Do you want an LC oscillator that starts instantly and coherently, > with a digital clock output? We do that, with LCs at low frequencies, > and coaxial ceramic resonators at 500 MHz or so. 1 GHz shouldn't be > horribly difficult, except for the milliwatt constraint. It's just a > matter of getting the initial conditions right. > > https://dl.dropbox.com/u/53724080/Circuits/Burst_Osc.jpg
Are you building some kind of synchronous oscillator? In our application an external signal influences the startup transient (think superreg. principle) and the information contained therein should be more or less preserved. Pere
On 11/14/2012 08:36 PM, petrus bitbyter wrote:
> "o pere o" <me@somewhere.net> schreef in bericht > news:k80f2n$dds$1@dont-email.me... >> The thread related to large signal PSpice models and an emitter follower >> comes from the following problem: >> >> I have an oscillator that should drive a digital part of the system. >> In short, what is the best way to achieve this? >> >> My first attempt has been a common base Colpitts oscillator that gives a >> signal riding on the +Vcc rail. This has been AC coupled to a 74AC gate >> biased to the point that gives square output signals. >> >> This works more ore less ok, but: the startup transient, which is >> important here, is different depending if the oscillator amplitude is >> sufficient to toggle the gate. This translates into an envelope that >> raises more ore less smoothly until the gate begins toggling, where the >> envelope raises more abruptly -and I guess that the instantaneous >> frequency changes. >> >> I have thought of two causes for this. The first one is feedback via the >> DC supply: the spikes generated by the gate switching get coupled back to >> the oscillator. The second one could be the change in input impedance seen >> by the oscillator -does this make sense? The cure for #1 could be better >> supply bypassing. The cure for #2 a buffer stage. >> >> So, what could be a good way to generate a digital signal from an >> oscillator without loading it? Ideally I would like to preserve the >> instantaneous frequency of the unloaded startup transient. And: power >> consumption should be low, say preferably (much) less than 1 mA. Operating >> frequency should be initially 27 MHz, but ideally scalable up to ~1 GHz. >> >> Pere >> > > Why can't you use a power on reset circuit that keeps the clock signal low > until the oscillator has stabilized? > > petrus bitbyter > >
Unfortunately not in this application. The startup transient is the relevant fact here. Pere
On 11/14/2012 06:50 PM, Tim Wescott wrote:
> On Wed, 14 Nov 2012 16:58:13 +0100, o pere o wrote: > >> The thread related to large signal PSpice models and an emitter follower >> comes from the following problem: >> >> I have an oscillator that should drive a digital part of the system. In >> short, what is the best way to achieve this? >> >> My first attempt has been a common base Colpitts oscillator that gives a >> signal riding on the +Vcc rail. This has been AC coupled to a 74AC gate >> biased to the point that gives square output signals. >> >> This works more ore less ok, but: the startup transient, which is >> important here, is different depending if the oscillator amplitude is >> sufficient to toggle the gate. This translates into an envelope that >> raises more ore less smoothly until the gate begins toggling, where the >> envelope raises more abruptly -and I guess that the instantaneous >> frequency changes. >> >> I have thought of two causes for this. The first one is feedback via the >> DC supply: the spikes generated by the gate switching get coupled back >> to the oscillator. The second one could be the change in input impedance >> seen by the oscillator -does this make sense? The cure for #1 could be >> better supply bypassing. The cure for #2 a buffer stage. >> >> So, what could be a good way to generate a digital signal from an >> oscillator without loading it? Ideally I would like to preserve the >> instantaneous frequency of the unloaded startup transient. And: power >> consumption should be low, say preferably (much) less than 1 mA. >> Operating frequency should be initially 27 MHz, but ideally scalable up >> to ~1 GHz. > > In general you're going to have a hard time getting the oscillator > frequency to stay constant as it starts: the oscillator's characteristics > must change as it settles into steady-state, because by definition the > loop gain goes from more than unity to exactly unity (on average) at that > point.
The response from an unloaded oscillator is already ok, even taking these facts into account. Loading it more or less directly with a CMOS gate is not ok.
> Making the oscillator so that the active device loads the resonator as > little as possible will go a long way to achieving this, but won't get > you all the way. > > You may need to just do some breadboarding: if you add supply bypassing > to the oscillator and the jump goes away, then the problem was supply > coupling. If you figure out how to shove a buffer amp in there and the > jump goes away, then it was input impedance on the 74xxx.
Yes, I have to investigate both ways. In the meantime I wanted to hear if there were other facts that I had overlooked. Pere
On Thu, 15 Nov 2012 09:24:50 +0100, o pere o <me@somewhere.net> wrote:

>On 11/14/2012 06:19 PM, John Larkin wrote: >> On Wed, 14 Nov 2012 16:58:13 +0100, o pere o <me@somewhere.net> wrote: >> >>> The thread related to large signal PSpice models and an emitter follower >>> comes from the following problem: >>> >>> I have an oscillator that should drive a digital part of the system. >>> In short, what is the best way to achieve this? >>> >>> My first attempt has been a common base Colpitts oscillator that gives a >>> signal riding on the +Vcc rail. This has been AC coupled to a 74AC gate >>> biased to the point that gives square output signals. >>> >>> This works more ore less ok, but: the startup transient, which is >>> important here, is different depending if the oscillator amplitude is >>> sufficient to toggle the gate. This translates into an envelope that >>> raises more ore less smoothly until the gate begins toggling, where the >>> envelope raises more abruptly -and I guess that the instantaneous >>> frequency changes. >>> >>> I have thought of two causes for this. The first one is feedback via the >>> DC supply: the spikes generated by the gate switching get coupled back >>> to the oscillator. The second one could be the change in input impedance >>> seen by the oscillator -does this make sense? The cure for #1 could be >>> better supply bypassing. The cure for #2 a buffer stage. >>> >>> So, what could be a good way to generate a digital signal from an >>> oscillator without loading it? Ideally I would like to preserve the >>> instantaneous frequency of the unloaded startup transient. And: power >>> consumption should be low, say preferably (much) less than 1 mA. >>> Operating frequency should be initially 27 MHz, but ideally scalable up >>> to ~1 GHz. >>> >>> Pere >> >> Do you want an LC oscillator that starts instantly and coherently, >> with a digital clock output? We do that, with LCs at low frequencies, >> and coaxial ceramic resonators at 500 MHz or so. 1 GHz shouldn't be >> horribly difficult, except for the milliwatt constraint. It's just a >> matter of getting the initial conditions right. >> >> https://dl.dropbox.com/u/53724080/Circuits/Burst_Osc.jpg > >Are you building some kind of synchronous oscillator?
We use gated oscillators in our digital delay generators. When we gat a rrigger, we start a clock oscillator, and count ticks to get coarse delay. An analog ramp thing gives fine delay to interpolate down to picoseconds. Sometimes just the LC is good enough, for short delays. The coaxial resonator things are great for medium accuracy and delay. he best is to use a gated LC for the clock, but phase-lock it to a crystal oscillator to get longterm precision. In our application
>an external signal influences the startup transient (think superreg. >principle) and the information contained therein should be more or less >preserved.
OK, that's different. It's an externally quenched superregen, I guess. Why not use a grounded LC and a non-inverting gain element? Or you could use a tiny toroidal transformer, with a secondary winding for the base of a PNP transistor, to provide the gain. One oscillator that I really like is an LVDS-CMOS converter chip that is both the feedback gain and the comparator, with the LC grounded. But that wouldn't work for your application, if I understand it. -- John Larkin Highland Technology Inc www.highlandtechnology.com jlarkin at highlandtechnology dot com Precision electronic instrumentation Picosecond-resolution Digital Delay and Pulse generators Custom timing and laser controllers Photonics and fiberoptic TTL data links VME analog, thermocouple, LVDT, synchro, tachometer Multichannel arbitrary waveform generators