On Oct 18, 3:48=A0pm, Phil Hobbs <pcdhSpamMeSensel...@electrooptical.net> wrote:> On 10/17/2011 11:08 PM, josephkk wrote: > > > On Mon, 17 Oct 2011 00:10:09 -0400, Phil Hobbs > > <pcdhSpamMeSensel...@electrooptical.net> =A0wrote: > > >> On 10/16/2011 11:43 PM, dagmargoodb...@yahoo.com wrote: > >>> On Oct 16, 6:09 pm, "k...@att.bizzzzzzzzzzzz" wrote: > >>>> On Sun, 16 Oct 2011 10:42:48 -0700 (PDT), dagmargoodb...@yahoo.com w=rote:> >>>>> On Oct 16, 8:55 am, "k...@att.bizzzzzzzzzzzz" wrote: > >>>>>> On Sun, 16 Oct 2011 06:25:38 -0700 (PDT), dagmargoodb...@yahoo.com=wrote:> > >>>>>>> So, we've got several versions: 10 steps with one chip, 16 steps =with> >>>>>>> three chips, or 32 steps for five chips. Or, as always, you could=use> >>>>>>> a PIC :-) > > >>>>>> Or an 8-bit counter (e.g. '579), ROM, and DAC. =A0256 steps, three=chips. ;-)> > >>>>>> The synchronous counter is the limitation, here. > > >>>>> Hey, how about two 'HC4017's, driven out-of-phase. =A0Clock one ris=ing,> >>>>> one falling. =A0That's 20 steps, two chips, dirt-simple. > > >>>> An FPGA. =A0Hundreds of steps, one chip. =A0Pick your poison. =A0;-) > > >>> Come to think of it, I suspect staggered 'HC4017's doesn't work. =A0E=ach> >>> output of "B" would straddle (be active during) two output states of > >>> "A", and the simultaneous equations fail. =A0You'd need to buffer 'em=so> >>> you could enable just one 'HC4017 at a time, which is messy& =A0 take=s> >>> more chips. > > >>> So, it's either one 'HC4017, or a PIC. =A0(Or a 555, details left as =an> >>> exercise for the student.) > > >>> -- > >>> Cheers, > >>> James Arthur > > >> We really need a 4017 with tri-state outputs. ;) > > >> You could take advantage of the particular phase choice that George > >> used, i.e. one phase is disconnected, and use a bunch of SIPO shift > >> registers. =A0Do a synchronous reset of all of them when the last stag=e> >> goes high, and use an R-S flipflop to inject a 1 into the first stage > >> when that happens, reset from the output of the first stage. > > >> It would also need a missing pulse detector or something like that to > >> make sure that it doesn't just sit there producing all zeros forever. > >> You could get 8N+1 phases for about N+2 packages and 8N resistors. > > >> Alternatively, adapting your folding trick, it might be possible to us=e> >> a bunch of universal shift registers and just shuttle the 1-state back > >> and forth from end to end, by changing the shift direction when it hit=s> >> the end. =A0That way you'd get 16N or maybe 16N-1 codes for N + 3ish > >> packages and 8N resistors. > > >> Fun. > > >> Cheers > > >> Phil Hobbs > > > Got me to thimkin'. =A0 Two 74hc374 in a Johnson twisted ring counter w=ith> > 16 resistors will get you 32 steps. =A0Can get 16 steps with a single '=374> > and 8 resistors. =A0Have to pay attention to initialization though. =A0=Calcs> > for the resistors will be a little different though, may be a problem i=f> > the High and Low drive strengths are different. =A0Don't see one in 400=0> > style cmos. > > > ?-) > > The problem is that there's no linear mapping from that to a sine > wave--for 2**N states you need 2**N outputs in order to be able to solve > the linear system.This doesn't seem to be a sensible approach. My feeling is that the obvious way to synthesise a staircase approximation to a sine wave is with roughly equal amplitude steps, not that this saves you that many steps - the ratio is pi/2 to one. You design for an N-step approximation to a single quadrant, with N resistors and N SPST switches plus one SPDT - the extra switch changes the polarity of the source voltage from 180 dgrees to 360 degrees - and drive the switches from a programmable logic device which can count up to roughly 2.pi.N and decodes the counter output to drive the N+1 switches. The resistors wouldn't be identical, but their resistances won't be wildly different either. -- Bill Sloman, Nijmegen
Stepped sine wave
Started by ●October 13, 2011
Reply by ●October 18, 20112011-10-18
Reply by ●October 18, 20112011-10-18
On Oct 17, 10:02=A0am, George Herold <gher...@teachspin.com> wrote:> On Oct 16, 11:43=A0pm, dagmargoodb...@yahoo.com wrote: > > > > > > > On Oct 16, 6:09=A0pm, "k...@att.bizzzzzzzzzzzz" wrote: > > > > On Sun, 16 Oct 2011 10:42:48 -0700 (PDT), dagmargoodb...@yahoo.com wr=ote:> > > >On Oct 16, 8:55=A0am, "k...@att.bizzzzzzzzzzzz" wrote: > > > >> On Sun, 16 Oct 2011 06:25:38 -0700 (PDT), dagmargoodb...@yahoo.com=wrote:> > > >> >So, we've got several versions: 10 steps with one chip, 16 steps =with> > > >> >three chips, or 32 steps for five chips. Or, as always, you could=use> > > >> >a PIC :-) > > > > >> Or an 8-bit counter (e.g. '579), ROM, and DAC. =A0256 steps, three=chips. ;-)> > > > >> The synchronous counter is the limitation, here. > > > > >Hey, how about two 'HC4017's, driven out-of-phase. =A0Clock one risi=ng,> > > >one falling. =A0That's 20 steps, two chips, dirt-simple. > > > > An FPGA. =A0Hundreds of steps, one chip. =A0Pick your poison. =A0;-) > > > Come to think of it, I suspect staggered 'HC4017's doesn't work. =A0Eac=h> > output of "B" would straddle (be active during) two output states of > > "A", and the simultaneous equations fail. =A0You'd need to buffer 'em s=o> > you could enable just one 'HC4017 at a time, which is messy & takes > > more chips. > > > So, it's either one 'HC4017, or a PIC. =A0(Or a 555, details left as an > > exercise for the student.) > > > -- > > Cheers, > > James Arthur > > Dat's OK James, =A0I'm still pondering your idea of multiple > switching... using each resistor four times during a cycle. =A0(I'm a > bit slow so it takes me a while to digest what you are suggesting.) =A0I > must admit that the symmetry is appealing. > > George H.- Hide quoted text - > > - Show quoted text -Well I stuck a switch cap filter on the output. (LTC1063, I know only 50kHz, which doesn=92t =91meet my spec', but I had one lying around.) I clocked it at 16 times the stepped sine wave so the 3dB point was 1.6 times the fundamental. Here=92s the spectrum before the SC. http://imageshack.us/photo/my-images/404/sc1s.png/ And after it. http://imageshack.us/photo/my-images/6/sc2h.png/ The second harmonic goes up more than 10dB! And there is all this other =91fluff=92 at low frequency. Some new peak stands up at 2.5 kHz. I moved the 3dB point up to 3.2kHz and the 2nd harmonic was a few dB better... the weird signal at 2.5kHz moved out to 5 kHz? Not sure I like switched cap filters. We used the same SC on a different project and it also added =91out of band=92 curd... at similar levels. I=92ll try an analog multi pole Butterworth. Maybe a Sallen-Key. George H.
Reply by ●October 18, 20112011-10-18
On 17 Okt., 01:09, "k...@att.bizzzzzzzzzzzz" <k...@att.bizzzzzzzzzzzz> wrote:> On Sun, 16 Oct 2011 10:42:48 -0700 (PDT), dagmargoodb...@yahoo.com wrote: > >On Oct 16, 8:55=A0am, "k...@att.bizzzzzzzzzzzz" > ><k...@att.bizzzzzzzzzzzz> wrote: > >> On Sun, 16 Oct 2011 06:25:38 -0700 (PDT), dagmargoodb...@yahoo.com wro=te:> >> >On Oct 15, 2:43=A0pm, patricia herold <pmdher...@gmail.com> wrote: > >> >> On Oct 15, 9:31=A0am, dagmargoodb...@yahoo.com wrote: > > >> >> > On Oct 14, 11:25=A0pm, George Herold <gher...@teachspin.com> wrot=e:> > >> >> > > On Oct 14, 4:59=A0pm, dagmargoodb...@yahoo.com wrote: > >> >> > > > On Oct 14, 2:41=A0pm, George Herold <gher...@teachspin.com> w=rote:> >> >> > > > > Hi James, =A0Yeah I was loading down the output of the 4017=. =A0I measured> >> >> > > > > an output impedance of ~180 ohms. =A0I put this number in a=nd> >> >> > > > > recalcualted values, =A0and then selected them to ~0.1% wit=h a DMM. =A0The> >> >> > > > > result.... I've got all the harmonics below the 9th down by=~70dB! =A0I> >> >> > > > > don't know how repeatable the the output imedance is? =A0I =put in a few> >> >> > > > > different 4017's and say no difference, but these were all =from the> >> >> > > > > same order, so... > > >> >> > > > > Here's a plot from the SRS770.http://imageshack.us/photo/my=-images/7/vco2.png/> > >> >> > > > Beautiful, and well worth the resistors, right? =A0Compared t=o the cost> >> >> > > > and complexity of extra hardware, it's a bargain. > > >> >> > > > For each half-wave, I'd analyze this as the sum of three impu=lses, one> >> >> > > > inside the other, added together. =A0The phasing and amplitud=e of those> >> >> > > > impulses is critical to canceling harmonics. > > >> >> > > > =A0 =A0 =A0 =A0 .---. > >> >> > > > =A0 =A0 =A0.--' =A0 '--. > >> >> > > > =A0 =A0 =A0| =A0 =A0 =A0 =A0 | > >> >> > > > =A0 =A0.-' =A0 =A0 =A0 =A0 '-. > >> >> > > > ___| =A0 =A0 =A0 =A0 =A0 =A0 |___ > >> >> > > > =A0 =A0| =A0 =A0 =A0 =A0 =A0 =A0 | > >> >> > > > =A0 -' =A0 =A0 =A0 =A0 =A0 =A0 '- > > >> >> > > > My gut wants to say--but I'm too lazy to prove right now--tha=t having> >> >> > > > the same voltages repeated symmetrically on either side of ea=ch peak> >> >> > > > is critical to harmonic rejection. > > >> >> > > Hmm you're suggesting that matching between equal value resisto=rs it> >> >> > > more important than hitting exact values? > > >> >> > I'm suggesting the possibility, but that's only a suspicion--I sh=owed> >> >> > one example below. =A0OTOH, I also just installed a virtual cater=pillar> >> >> > grommet backwards in another thread. :-) > > >> >> > As a practical matter, Phil's 'HC4017 with precision resistors se=ems> >> >> > best. > > >> >> > > > Where the voltage is unequal on either side, you introduce a =new> >> >> > > > impulse with a magnitude equal to the difference in voltages.=It's> >> >> > > > easy to *introduce* a 2nd harmonic component that way. =A0For=example,> >> >> > > > taking the middle impulse: > > >> >> > > > =A0 =A0.-----. > >> >> > > > =A0 =A0| =A0 =A0 '----. > >> >> > > > =A0 =A0| =A0 =A0 =A0 =A0 =A0| > >> >> > > > =A0 =A0| =A0 =A0 =A0 =A0 =A0| =A0 =A0 =A0 =A0 | > >> >> > > > ___|__________|_________|__ > >> >> > > > =A0 =A0 =A0 =A0 =A0 =A0 =A0 | =A0 =A0 =A0 =A0 | > >> >> > > > =A0 =A0 =A0 =A0 =A0 =A0 =A0 | =A0 =A0 =A0 =A0 | > >> >> > > > =A0 =A0 =A0 =A0 =A0 =A0 =A0 |____ =A0 =A0 | > >> >> > > > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0'----' > > >> >> > > > My original thinking was to have an up/down counter, a single=homemade> >> >> > > > DAC, cycle up and down through the same (sine-weighted) value=s, then> >> >> > > > invert (externally) for the negative swing. =A0That gets you =4x as many> >> >> > > > steps and automatic symmetry, but it's not nearly as cute as =Phil's> >> >> > > > 4017. > > >> >> > FWIW, here's what I'd imagined, where v0-v7 encode a half-wave: > > >> >> > =A0 =A0 =A0 =A0 =A0'HC4051 > >> >> > =A0 =A0 =A0 =A0 =A0.-----. > >> >> > =A0 v7-----|0 =A0 =A0| > >> >> > =A0 v6-----|1 =A0 =A0| > >> >> > =A0 v5-----|2 =A0 =A0| > >> >> > =A0 v4-----|3 =A0 Y|---- > >> >> > =A0 v3-----|4 =A0 =A0| > >> >> > =A0 v2-----|5 =A0 =A0| > >> >> > =A0 v1-----|6 =A0 =A0| > >> >> > =A0 v0-----|7 =A0 =A0| > >> >> > =A0 =A0 =A0 =A0 =A0| ABC | > >> >> > =A0 =A0 =A0 =A0 =A0'-----' > >> >> > =A0 =A0 =A0 =A0 =A0 =A0||| > >> >> > =A0 =A0 =A0 =A0 =A0 .---. > >> >> > =A0 =A0 =A0 =A0 =A0 |XOR|<-. > >> >> > =A0 =A0 =A0 =A0 =A0 '---' =A0| > >> >> > =A0 =A0 =A0 =A0 =A0 =A0||| .-' > >> >> > =A0 =A0 =A0 =A0 =A0 =A0||| | > >> >> > =A0 =A0 =A0 =A0 =A0.------. > >> >> > =A0 =A0 =A0 =A0 =A0| ABC D| > >> >> > 16x clk -|> =A0 =A0 | 4-bit Counter > >> >> > =A0 =A0 =A0 =A0 =A0| =A0 =A0 =A0| > >> >> > =A0 =A0 =A0 =A0 =A0'------' > > >> >> > This logic walks up and down through 8 voltages, which, since the=y are> >> >> > reused from the same source, are duplicated exactly on each side =of> >> >> > the peak. =A0That does not guarantee symmetry about zero, though. > > >> >> > Another possibility is to make v0-v7 encode a quarter-wave, then > >> >> > multiply by +/-1 afterwards in analog, ensuring full symmetry. > > >> >> Ha, =A0following your bipolar idea, I was wondering if I could prog=ram> >> >> the 4017 for 1/2 a sine wave and use the carry output to flip a +/-=1> >> >> opamp down stream. =A0I guess that means another chip. > > >> >That's the "another possibility" I meant, above. =A0The DAC only has =to> >> >cover 1/4 of a sinewave, and you get the remaining wave portions by > >> >manipulating that. > > >> >To wit, the external logic walks the DAC up, then down, then kicks on > >> >the analog invert (x -1) function and cycles up, then down again. > >> >Then, back to the beginning. > > >> >That, here, would take about 5 chips & get you 32 samples per > >> >sinewave. > > >> >So, we've got several versions: 10 steps with one chip, 16 steps with > >> >three chips, or 32 steps for five chips. Or, as always, you could use > >> >a PIC :-) > > >> Or an 8-bit counter (e.g. '579), ROM, and DAC. =A0256 steps, three chi=ps. ;-)> > >> The synchronous counter is the limitation, here. > > >Hey, how about two 'HC4017's, driven out-of-phase. =A0Clock one rising, > >one falling. =A0That's 20 steps, two chips, dirt-simple. > > An FPGA. =A0Hundreds of steps, one chip. =A0Pick your poison. =A0;-)I had the crazy idea of using a serial flash, too bad the 45lf010 isn't available anymore it had a read command 0xff, so you could just tie din high and clock it and it would spit out bits forever. you could use a config flash for an fpga but they are a bit expensive program the flash with Don Lancasters magic sine waves, or run a sinewave through a delta-sigma modulator -Lasse
Reply by ●October 18, 20112011-10-18
On 10/18/2011 12:15 PM, George Herold wrote:> On Oct 17, 10:02 am, George Herold<gher...@teachspin.com> wrote: >> On Oct 16, 11:43 pm, dagmargoodb...@yahoo.com wrote: >> >> >> >> >> >>> On Oct 16, 6:09 pm, "k...@att.bizzzzzzzzzzzz" wrote: >> >>>> On Sun, 16 Oct 2011 10:42:48 -0700 (PDT), dagmargoodb...@yahoo.com wrote: >>>>> On Oct 16, 8:55 am, "k...@att.bizzzzzzzzzzzz" wrote: >>>>>> On Sun, 16 Oct 2011 06:25:38 -0700 (PDT), dagmargoodb...@yahoo.com wrote: >>>>>>> So, we've got several versions: 10 steps with one chip, 16 steps with >>>>>>> three chips, or 32 steps for five chips. Or, as always, you could use >>>>>>> a PIC :-) >> >>>>>> Or an 8-bit counter (e.g. '579), ROM, and DAC. 256 steps, three chips. ;-) >> >>>>>> The synchronous counter is the limitation, here. >> >>>>> Hey, how about two 'HC4017's, driven out-of-phase. Clock one rising, >>>>> one falling. That's 20 steps, two chips, dirt-simple. >> >>>> An FPGA. Hundreds of steps, one chip. Pick your poison. ;-) >> >>> Come to think of it, I suspect staggered 'HC4017's doesn't work. Each >>> output of "B" would straddle (be active during) two output states of >>> "A", and the simultaneous equations fail. You'd need to buffer 'em so >>> you could enable just one 'HC4017 at a time, which is messy& takes >>> more chips. >> >>> So, it's either one 'HC4017, or a PIC. (Or a 555, details left as an >>> exercise for the student.) >> >>> -- >>> Cheers, >>> James Arthur >> >> Dat's OK James, I'm still pondering your idea of multiple >> switching... using each resistor four times during a cycle. (I'm a >> bit slow so it takes me a while to digest what you are suggesting.) I >> must admit that the symmetry is appealing. >> >> George H.- Hide quoted text - >> >> - Show quoted text - > > Well I stuck a switch cap filter on the output. (LTC1063, I know only > 50kHz, which doesn�t �meet my spec', but I had one lying around.) > > I clocked it at 16 times the stepped sine wave so the 3dB point was > 1.6 times the fundamental. Here�s the spectrum before the SC. > > http://imageshack.us/photo/my-images/404/sc1s.png/ > > And after it. > http://imageshack.us/photo/my-images/6/sc2h.png/ > > > The second harmonic goes up more than 10dB! And there is all this > other �fluff� at low frequency. Some new peak stands up at 2.5 kHz. > I moved the 3dB point up to 3.2kHz and the 2nd harmonic was a few dB > better... the weird signal at 2.5kHz moved out to 5 kHz? Not sure I > like switched cap filters. We used the same SC on a different project > and it also added �out of band� curd... at similar levels. > > I�ll try an analog multi pole Butterworth. Maybe a Sallen-Key. > > George H.They do that, especially when the input consists of one or a few pure tones--there's all sorts of intermodulation junk. If you put an RC lowpass in front of it, you'd reduce the input slew rate, which would help the IMD. A nice four-pole Chebyshev would do a good job of it, I should think. Cheers Phil Hobbs
Reply by ●October 19, 20112011-10-19
On Monday, October 17, 2011 6:50:40 AM UTC-7, George Herold wrote:> You can get 0.1% resistors from Sussumu for ~$0.20 each.Twenty cents each? If they stock values from 100 to 100k ohms, that means they have to have about 7000 standard values? Cool! One zero-ohm resistor, and two (maybe four) of the smallest resistors, can be 1% values, without undue error. So, there's room to squeeze the $2 figure down a little.
Reply by ●October 19, 20112011-10-19
On Oct 18, 11:15=A0am, George Herold <gher...@teachspin.com> wrote:> On Oct 17, 10:02=A0am, George Herold <gher...@teachspin.com> wrote: > > > > > On Oct 16, 11:43=A0pm, dagmargoodb...@yahoo.com wrote: > > > > On Oct 16, 6:09=A0pm, "k...@att.bizzzzzzzzzzzz" wrote: > > > > > On Sun, 16 Oct 2011 10:42:48 -0700 (PDT), dagmargoodb...@yahoo.com =wrote:> > > > >On Oct 16, 8:55=A0am, "k...@att.bizzzzzzzzzzzz" wrote: > > > > >> On Sun, 16 Oct 2011 06:25:38 -0700 (PDT), dagmargoodb...@yahoo.c=om wrote:> > > > >> >So, we've got several versions: 10 steps with one chip, 16 step=s with> > > > >> >three chips, or 32 steps for five chips. Or, as always, you cou=ld use> > > > >> >a PIC :-) > > > > > >> Or an 8-bit counter (e.g. '579), ROM, and DAC. =A0256 steps, thr=ee chips. ;-)> > > > > >> The synchronous counter is the limitation, here. > > > > > >Hey, how about two 'HC4017's, driven out-of-phase. =A0Clock one ri=sing,> > > > >one falling. =A0That's 20 steps, two chips, dirt-simple. > > > > > An FPGA. =A0Hundreds of steps, one chip. =A0Pick your poison. =A0;-=)> > > > Come to think of it, I suspect staggered 'HC4017's doesn't work. =A0E=ach> > > output of "B" would straddle (be active during) two output states of > > > "A", and the simultaneous equations fail. =A0You'd need to buffer 'em=so> > > you could enable just one 'HC4017 at a time, which is messy & takes > > > more chips. > > > > So, it's either one 'HC4017, or a PIC. =A0(Or a 555, details left as =an> > > exercise for the student.) > > > > -- > > > Cheers, > > > James Arthur > > > Dat's OK James, =A0I'm still pondering your idea of multiple > > switching... using each resistor four times during a cycle. =A0(I'm a > > bit slow so it takes me a while to digest what you are suggesting.) =A0=I> > must admit that the symmetry is appealing. > > > George H.- Hide quoted text - > > > - Show quoted text - > > Well I stuck a switch cap filter on the output. (LTC1063, I know only > 50kHz, which doesn=92t =91meet my spec', but I had one lying around.) > > I clocked it at 16 times the stepped sine wave so the 3dB point was > 1.6 times the fundamental. =A0Here=92s the spectrum before the SC. > > http://imageshack.us/photo/my-images/404/sc1s.png/ > > And after it.http://imageshack.us/photo/my-images/6/sc2h.png/ > > The second harmonic goes up more than 10dB! =A0And there is all this > other =91fluff=92 at low frequency. =A0Some new peak stands up at 2.5 kHz=.> I moved the 3dB point up to 3.2kHz and the 2nd harmonic was a few dB > better... the weird signal at 2.5kHz moved out to 5 kHz? =A0Not sure I > like switched cap filters. =A0We used the same SC on a different project > and it also added =91out of band=92 curd... at similar levels. > > I=92ll try an analog multi pole Butterworth. =A0 Maybe a Sallen-Key. > > George H.I've got two articles in the hard drive vault that use a squarewave into a switched cap filter, overclocked >100:1, to generate a sinewave. The first architecture is fixed 1kHz: TLC555 =3D=3D> 19kHz RC-lowpass =3D=3D> MF6CN100 (Nat'l Semi), claims harmonics are 60dB down. The 2nd generates squarewaves with a uC. That drives a 64x overclocked MAX292 (8th-order Bessel directly). "Clean" sinewave is all they say. They run the MAX292 bipolar off +5v, using a 10k-10k divider for a virtual rail. Funky. I could e-mail you the articles if interested, but they _really_ don't say much more than what I already wrote. 1) Simple circuit generates clean sine waves, EDN, June 19, 1997, pg. 99 2) Microcontroller-based Sine Wave Generator Has Crystal Accuracy, Electronic Design, Dec. 14, 1998, pg. 74 -- Cheers, James Arthur
Reply by ●October 19, 20112011-10-19
On Oct 19, 5:10=A0am, whit3rd <whit...@gmail.com> wrote:> On Monday, October 17, 2011 6:50:40 AM UTC-7, George Herold wrote: > > You can get 0.1% resistors from Sussumu for ~$0.20 each. > > Twenty cents each? =A0If they stock values from 100 to 100k ohms, > that means they have to have about 7000 standard values?Most probably they will only stock the E96 grid, which is 3x96 values, 188 rather than 7,000. There is an E192 grid, but I don't know anybody who stocks anything like a full range on that grid <snip> -- Bill Sloman, Nijmegen
Reply by ●October 19, 20112011-10-19
On Oct 16, 11:10=A0pm, Phil Hobbs <pcdhSpamMeSensel...@electrooptical.net> wrote:> On 10/16/2011 11:43 PM, dagmargoodb...@yahoo.com wrote:> > Come to think of it, I suspect staggered 'HC4017's doesn't work. =A0Eac=h> > output of "B" would straddle (be active during) two output states of > > "A", and the simultaneous equations fail. =A0You'd need to buffer 'em s=o> > you could enable just one 'HC4017 at a time, which is messy& =A0takes > > more chips. > > > So, it's either one 'HC4017, or a PIC. =A0(Or a 555, details left as an > > exercise for the student.) > > > We really need a 4017 with tri-state outputs. ;) > > You could take advantage of the particular phase choice that George > used, i.e. one phase is disconnected, and use a bunch of SIPO shift > registers. =A0Do a synchronous reset of all of them when the last stage > goes high, and use an R-S flipflop to inject a 1 into the first stage > when that happens, reset from the output of the first stage. > > It would also need a missing pulse detector or something like that to > make sure that it doesn't just sit there producing all zeros forever. > You could get 8N+1 phases for about N+2 packages and 8N resistors.Not bad--that's pretty simple.> Alternatively, adapting your folding trick, it might be possible to use > a bunch of universal shift registers and just shuttle the 1-state back > and forth from end to end, by changing the shift direction when it hits > the end. =A0That way you'd get 16N or maybe 16N-1 codes for N + 3ish > packages and 8N resistors. > > Fun.I poked around the available shift registers @ Digikey. Alas, bi- directionals are 4 bits only. So, my best low chip stepped addition(s) are these: 74HC154 .------. | 0|---[R0]--. | 1|---[R1]--+ | 2|---[R2]--+ | 3|---[R3]--+ | 4|---[R4]--+ .------. | 5|---[R5]--+ | X | | 6|---[R6]--+-->|+/- 1 |--> to filter | 7|---[R7]--+ | | | 8|---[R8]--+ '------' | 9|---[R9]--+ ^ | 10|--[R10]--+ | | 11|--[R11]--+ | | 12|--[R12]--+ | | 13|--[R13]--+ | | 14|--[R14]--+ | | 15|--[R15]--' | | | | | ABCD | | '------' | |||| | .----. | |XOR |<-. | '----' | | |||| .-' | |||| |.---------------' |||| || .---------. | ABCD EF | 64x clk -|> | 6-bit Counter | | '---------' You could go to 32 steps by dropping the +/-1 stage and save a chip, naturally. Or you can extend an 8-step DAC to get a 32-step sine, as suggested before... 'HC4051 .-----. v7-----|0 | v6-----|1 | .-------. v5-----|2 | | X | v4-----|3 Y|----| +/- 1 |--- v3-----|4 | | | v2-----|5 | '-------' v1-----|6 | ^ v0-----|7 | | | ABC | | '-----' | ||| | .---. | |XOR|<-. | '---' | | ||| .-' | ||| |.-------' ||| || .-------. | ABC DE| 32x clk -|> | 5-bit Counter | | '-------' The neat thing about these sine-weighted DACs over straight linear DACs is that, theoretically, the steps can be exact. 0.1% resistors puts you competitive with 10-bit linear DACs, with a lot less hassle. -- Cheers, James Arthur
Reply by ●October 19, 20112011-10-19
On Oct 18, 11:10=A0pm, whit3rd <whit...@gmail.com> wrote:> On Monday, October 17, 2011 6:50:40 AM UTC-7, George Herold wrote: > > You can get 0.1% resistors from Sussumu for ~$0.20 each. > > Twenty cents each? =A0If they stock values from 100 to 100k ohms, > that means they have to have about 7000 standard values? > Cool! > > One zero-ohm resistor, and two (maybe four) of the smallest resistors, > can be 1% values, without undue error. =A0So, there's room to squeeze > the $2 figure down a little.Ahh, they only have the 'standard' 1% values. Here's 10k ones in 0805 package. http://search.digikey.com/us/en/products/RG2012P-103-B-T5/RG20P10.0KBCT-ND/= 1241041 To get the exact values to 0.1% I'll have to mix some 0.1% resistors with smaller 1%ers. If you can use one thousand of 'em then they're only ~$0.1 each. Pretty amamzing really, you can make amps with a gain of 10.00(something) George H.
Reply by ●October 19, 20112011-10-19
On Oct 18, 11:15=A0am, George Herold <gher...@teachspin.com> wrote:> On Oct 17, 10:02=A0am, George Herold <gher...@teachspin.com> wrote: > > > > > On Oct 16, 11:43=A0pm, dagmargoodb...@yahoo.com wrote: > > > > On Oct 16, 6:09=A0pm, "k...@att.bizzzzzzzzzzzz" wrote: > > > > > On Sun, 16 Oct 2011 10:42:48 -0700 (PDT), dagmargoodb...@yahoo.com =wrote:> > > > >On Oct 16, 8:55=A0am, "k...@att.bizzzzzzzzzzzz" wrote: > > > > >> On Sun, 16 Oct 2011 06:25:38 -0700 (PDT), dagmargoodb...@yahoo.c=om wrote:> > > > >> >So, we've got several versions: 10 steps with one chip, 16 step=s with> > > > >> >three chips, or 32 steps for five chips. Or, as always, you cou=ld use> > > > >> >a PIC :-) > > > > > >> Or an 8-bit counter (e.g. '579), ROM, and DAC. =A0256 steps, thr=ee chips. ;-)> > > > > >> The synchronous counter is the limitation, here. > > > > > >Hey, how about two 'HC4017's, driven out-of-phase. =A0Clock one ri=sing,> > > > >one falling. =A0That's 20 steps, two chips, dirt-simple. > > > > > An FPGA. =A0Hundreds of steps, one chip. =A0Pick your poison. =A0;-=)> > > > Come to think of it, I suspect staggered 'HC4017's doesn't work. =A0E=ach> > > output of "B" would straddle (be active during) two output states of > > > "A", and the simultaneous equations fail. =A0You'd need to buffer 'em=so> > > you could enable just one 'HC4017 at a time, which is messy & takes > > > more chips. > > > > So, it's either one 'HC4017, or a PIC. =A0(Or a 555, details left as =an> > > exercise for the student.) > > > > -- > > > Cheers, > > > James Arthur > > > Dat's OK James, =A0I'm still pondering your idea of multiple > > switching... using each resistor four times during a cycle. =A0(I'm a > > bit slow so it takes me a while to digest what you are suggesting.) =A0=I> > must admit that the symmetry is appealing. > > > George H.- Hide quoted text - > > > - Show quoted text - > > Well I stuck a switch cap filter on the output. (LTC1063, I know only > 50kHz, which doesn=92t =91meet my spec', but I had one lying around.) > > I clocked it at 16 times the stepped sine wave so the 3dB point was > 1.6 times the fundamental. =A0Here=92s the spectrum before the SC. > > http://imageshack.us/photo/my-images/404/sc1s.png/ > > And after it.http://imageshack.us/photo/my-images/6/sc2h.png/ > > The second harmonic goes up more than 10dB! =A0And there is all this > other =91fluff=92 at low frequency. =A0Some new peak stands up at 2.5 kHz=.> I moved the 3dB point up to 3.2kHz and the 2nd harmonic was a few dB > better... the weird signal at 2.5kHz moved out to 5 kHz? =A0Not sure I > like switched cap filters. =A0We used the same SC on a different project > and it also added =91out of band=92 curd... at similar levels. > > I=92ll try an analog multi pole Butterworth. =A0 Maybe a Sallen-Key. > > George H.Ideas: I'd suggest you aren't clocking the LIC1063 fast enough, and need a small anti-aliasing pre-filter. (Doesn't it need 100x anyhow?) Choosing the filter clock frequency as some integer multiple of the DAC clock rate will kill most of the intermodulation products. -- Cheers, James Arthur
