On 2023-10-25 06:39, John Larkin wrote:> On Wed, 25 Oct 2023 07:18:58 +0300, Dimiter_Popoff <dp@tgi-sci.com> > wrote: > >> On 10/25/2023 1:51, john larkin wrote: >>> On Wed, 25 Oct 2023 01:12:21 +0300, Dimiter_Popoff <dp@tgi-sci.com> >>> wrote: >>> >>>> On 10/25/2023 0:34, john larkin wrote: >>>>> Tww it the dimensionless factor >>>>> >>>>> (how many parts you tidly-wink and lose) / (how many parts you want) >>>>> >>>>> which, for 0603's, runs 0.6 or so. >>>>> >>>> >>>> Not sure I got what tww is (looked it up, some domino thing so I >>>> guess I get it if so) but 0402 are significantly worse, a lot more >>>> than twice worse. And I have not yet done any 0201... >>> >>> When I first saw 1206's, I thought they were tiny. Ha! >>> >>> I refuse to use 0402's. I default to 0805s. >>> >>> I'm tuning the tempco of a 50 MHz triggrered Colpitts oscillator. What >>> a nuisance. It should have a 3.3 pF N4700 0805 cap, but the layout guy >>> used all 0603s, so some engineer (who shall not be named) substituted >>> an 0603 NP0. "NTC" does sound a lot like "NPO" I guess. >>> >>> The proper 0805 cap was custom brewed for us by Capax. >>> >> >> I often do it the other way around,the 0805 pads I make can also hold >> 0603. Took me a while to grasp I could do it the first time I could >> not find the 0805 I needed... >> >> The temp compensations I typically have to deal with are resistor >> tracking. Meanwhile I know which batch of which supply I have >> does not track too well with which other. > > What I'm fighting right now is the positive TC of the Coilcraft > Midi-spring inductor (typically +100 PPM/c or so) and the positive TC > of the PCB FR4, typically +900. The combo makes the oscillator have a > serious negative TC, which the N4700 cap compensates. I have a series > padder cap, in series with the NTC cap, to trim the oscillator tempco > to near zero, down to the 2nd order parabola. > > It's tedious. Tuning takes about an hour per iteration. We have a > gigantic environmental oven in the basement, but using that would take > more like a day per iteration. I made my own benchtop chamber, a > cardboard box with a USB fan inside, used with a heat gun and freeze > spray. > > My $5000 Rigol scope is the frequncy counter and USB fan supply. > >Seems like with a little math you could take one measurement, calculate the correct pad cap value, and be done. Of course NTC caps' tempcos are notoriously variable (typically +- 30%), so it's hard to get away from cut-and-try altogether. You got a reel of custom ones made--do you know how tight their tempco matching is? Cheers Phil Hobbs -- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC / Hobbs ElectroOptics Optics, Electro-optics, Photonics, Analog Electronics Briarcliff Manor NY 10510 http://electrooptical.net http://hobbs-eo.com
Tww
Started by ●October 24, 2023
Reply by ●October 29, 20232023-10-29
Reply by ●October 29, 20232023-10-29
On Tue, 24 Oct 2023 22:40:39 -0000 (UTC), Phil Hobbs <pcdhSpamMeSenseless@electrooptical.net> wrote:>Dimiter_Popoff <dp@tgi-sci.com> wrote: >> On 10/25/2023 0:34, john larkin wrote: >>> Tww it the dimensionless factor >>> >>> (how many parts you tidly-wink and lose) / (how many parts you want) >>> >>> which, for 0603's, runs 0.6 or so. >>> >> >> Not sure I got what tww is (looked it up, some domino thing so I >> guess I get it if so) but 0402 are significantly worse, a lot more >> than twice worse. And I have not yet done any 0201... >> > >I highly recommend a good set of curved jaw tweezers, with a tiny binder >clip on the hinge end. That lets you micro-adjust the tension by sliding >the clip, so that they open when you squeeze them edgeways, and close very >gently when you release. > >Good Medicine. > >Cheers > >Phil HobbsNot to change the subject, but a guy with very steady hands peeled one layer of cells off my retina, by hand, with tweezers. The tweezers were about the size of a toothpick. I'll have to see if I can get some of them.
Reply by ●October 29, 20232023-10-29
On Sun, 29 Oct 2023 05:15:08 GMT, Jan Panteltje <alien@comet.invalid> wrote:>On a sunny day (Sat, 28 Oct 2023 07:49:21 -0700) it happened John Larkin ><jl@997PotHill.com> wrote in <no7qji5c7ak2m46cmmuq7misqaqlrt4nkr@4ax.com>: > >>On Sat, 28 Oct 2023 04:26:51 GMT, Jan Panteltje <alien@comet.invalid> >>wrote: >> >>>On a sunny day (Fri, 27 Oct 2023 15:53:31 -0700) it happened john larkin >>><jl@650pot.com> wrote in <6qfojihekda4aobmgnq71rbf493sa454q0@4ax.com>: >>> >>>>On Thu, 26 Oct 2023 05:06:21 GMT, Jan Panteltje <alien@comet.invalid> >>>>wrote: >>>> >>>>>On a sunny day (Wed, 25 Oct 2023 20:45:52 -0700) it happened John Larkin >>>>><jl@997PotHill.com> wrote in <hknjjih3rp87naoq2o2pefergou2deg7i4@4ax.com>: >>>>> >>>>>>The trick in a digital delay generator, or at least ours, is to stop >>>>>>an LC oscillator and start it when we get an external trigger, and >>>>>>then use it as our timebase. But lock it to an crystal oscillator to >>>>>>keep long delays accurate. >>>>>> >>>>>>To do that, I need a pretty stable LC oscillator, hence the tempco >>>>>>tuning. Capex made us a reel of custom N4700 ceramic caps, which can >>>>>>be used to compensate the pretty awful inductor and FR4 tempcos. >>>>>> >>>>>>HP made one delay generator that actually started and stopped a >>>>>>crystal oscillator. It didn't work very well. A quartz crystal is hard >>>>>>to kick start and is even worse to stop; it rings like a bell. >>>>> >>>>>All this makes me think about a 4046 and PLL. >>>> >>>>The 4046 has a terrible phase detector. >>> >>>HCT4046 has 3 phase detectors. >>>1 xor gate >>>2 A digital memory network. It consists of four flip–flops and some gating logic, >>> a three state output and a phase pulse output. >>> This comparator acts only on the positive edges of the input signals and is independent of duty cycle. >>>3 A digital four flip–flops and some gating logic a 3 state output and a phase pulse output >>> >>>See dataseet >>> >>>So what's your problem :-) >>> >>>I have used the 4046 for many things, nice chip. >> >>OK, my mistake, the 4046 has three terrible phase detectors. And one >>terrible VCO. > >Well, opinions are still allowed (I hope see https://arstechnica.com/tech-policy/2023/10/the-uks-problematic-online-safety-act-is-now-law/ ) >But it depends on what you call 'terrible' >I have sued 4046 (going back to the old CMOS since the seventies?) for things like FM audio modulation, demodulation, >data clock recovery, what not.The phase-frequency detector has a nanoseconds-wide deadband. That makes for lots of time error and jitter. The XOR detector is just a slow, sloppy XOR gate.> >So do I understand it right if you wanted to sync an LC oscillator with an external pulse, have it restart (so phase shifted) in an instant?My 50 MHz LC oscillator is the coarse count for a triggred delay generator, like this one: http://www.highlandtechnology.com/DSS/P500DS.shtml (We're designing a small embedded version now.) The oscillator is quiescently quenched and kicked off when we get an extrnal trigger. Then it counts off time in 20 ns ticks. That's OK for a microsecond or so, but isn't accurate much longer. So the trick is to phase-lock it to a good XO but preserve its realtionship to the trigger, namely preserve its random phase relationship to the XO.>If all you need is phase shift and no frequency shift then a variable delay would work?The SRS DDG does that, but it's complex and adds a lot of insertion delay.>Bit like summer winter time here, got up one hour early it seems.... >LC oscillators are (due the the Q (even higher Q for xtal based oscillators) ) not so easy to adjust in a 'flash'.Our LC oscillator outputs its first edge a few ns after the trigger, than ticks faithfully every 20 ns after that. Just a little calculus.
Reply by ●October 29, 20232023-10-29
On Sun, 29 Oct 2023 08:56:07 -0400, Phil Hobbs <pcdhSpamMeSenseless@electrooptical.net> wrote:>On 2023-10-25 06:39, John Larkin wrote: >> On Wed, 25 Oct 2023 07:18:58 +0300, Dimiter_Popoff <dp@tgi-sci.com> >> wrote: >> >>> On 10/25/2023 1:51, john larkin wrote: >>>> On Wed, 25 Oct 2023 01:12:21 +0300, Dimiter_Popoff <dp@tgi-sci.com> >>>> wrote: >>>> >>>>> On 10/25/2023 0:34, john larkin wrote: >>>>>> Tww it the dimensionless factor >>>>>> >>>>>> (how many parts you tidly-wink and lose) / (how many parts you want) >>>>>> >>>>>> which, for 0603's, runs 0.6 or so. >>>>>> >>>>> >>>>> Not sure I got what tww is (looked it up, some domino thing so I >>>>> guess I get it if so) but 0402 are significantly worse, a lot more >>>>> than twice worse. And I have not yet done any 0201... >>>> >>>> When I first saw 1206's, I thought they were tiny. Ha! >>>> >>>> I refuse to use 0402's. I default to 0805s. >>>> >>>> I'm tuning the tempco of a 50 MHz triggrered Colpitts oscillator. What >>>> a nuisance. It should have a 3.3 pF N4700 0805 cap, but the layout guy >>>> used all 0603s, so some engineer (who shall not be named) substituted >>>> an 0603 NP0. "NTC" does sound a lot like "NPO" I guess. >>>> >>>> The proper 0805 cap was custom brewed for us by Capax. >>>> >>> >>> I often do it the other way around,the 0805 pads I make can also hold >>> 0603. Took me a while to grasp I could do it the first time I could >>> not find the 0805 I needed... >>> >>> The temp compensations I typically have to deal with are resistor >>> tracking. Meanwhile I know which batch of which supply I have >>> does not track too well with which other. >> >> What I'm fighting right now is the positive TC of the Coilcraft >> Midi-spring inductor (typically +100 PPM/c or so) and the positive TC >> of the PCB FR4, typically +900. The combo makes the oscillator have a >> serious negative TC, which the N4700 cap compensates. I have a series >> padder cap, in series with the NTC cap, to trim the oscillator tempco >> to near zero, down to the 2nd order parabola. >> >> It's tedious. Tuning takes about an hour per iteration. We have a >> gigantic environmental oven in the basement, but using that would take >> more like a day per iteration. I made my own benchtop chamber, a >> cardboard box with a USB fan inside, used with a heat gun and freeze >> spray. >> >> My $5000 Rigol scope is the frequncy counter and USB fan supply. >> >> >Seems like with a little math you could take one measurement, calculate >the correct pad cap value, and be done. Of course NTC caps' tempcos are >notoriously variable (typically +- 30%), so it's hard to get away from >cut-and-try altogether.What one measurement? I typically take 5 or so termperature:frequency points and graph that to get an average slope, which generally looks pretty good. The bummer is that the padder caps only come in coarse steps, and the value of the padder has some 2nd order effects.> >You got a reel of custom ones made--do you know how tight their tempco >matching is?I've only measured a few but they look pretty good. The uncorrected tempco of the oscillator is something like 150 PPM, and I can live with 25 or so, so the correction need not be perfect. What's scary is that most of the TC is in the PCB dielectric, composition and thickness, and that can vary from board batch to batch.> >Cheers > >Phil Hobbs
Reply by ●October 29, 20232023-10-29
On a sunny day (Sun, 29 Oct 2023 08:28:08 -0700) it happened John Larkin <jl@997PotHill.com> wrote in <lvtsjihq7q40l12e41r5vdppfvblsa4sis@4ax.com>:>On Sun, 29 Oct 2023 05:15:08 GMT, Jan Panteltje <alien@comet.invalid> >wrote: > >>On a sunny day (Sat, 28 Oct 2023 07:49:21 -0700) it happened John Larkin >><jl@997PotHill.com> wrote in <no7qji5c7ak2m46cmmuq7misqaqlrt4nkr@4ax.com>: >> >>>On Sat, 28 Oct 2023 04:26:51 GMT, Jan Panteltje <alien@comet.invalid> >>>wrote: >>> >>>>On a sunny day (Fri, 27 Oct 2023 15:53:31 -0700) it happened john larkin >>>><jl@650pot.com> wrote in <6qfojihekda4aobmgnq71rbf493sa454q0@4ax.com>: >>>> >>>>>On Thu, 26 Oct 2023 05:06:21 GMT, Jan Panteltje <alien@comet.invalid> >>>>>wrote: >>>>> >>>>>>On a sunny day (Wed, 25 Oct 2023 20:45:52 -0700) it happened John Larkin >>>>>><jl@997PotHill.com> wrote in <hknjjih3rp87naoq2o2pefergou2deg7i4@4ax.com>: >>>>>> >>>>>>>The trick in a digital delay generator, or at least ours, is to stop >>>>>>>an LC oscillator and start it when we get an external trigger, and >>>>>>>then use it as our timebase. But lock it to an crystal oscillator to >>>>>>>keep long delays accurate. >>>>>>> >>>>>>>To do that, I need a pretty stable LC oscillator, hence the tempco >>>>>>>tuning. Capex made us a reel of custom N4700 ceramic caps, which can >>>>>>>be used to compensate the pretty awful inductor and FR4 tempcos. >>>>>>> >>>>>>>HP made one delay generator that actually started and stopped a >>>>>>>crystal oscillator. It didn't work very well. A quartz crystal is hard >>>>>>>to kick start and is even worse to stop; it rings like a bell. >>>>>> >>>>>>All this makes me think about a 4046 and PLL. >>>>> >>>>>The 4046 has a terrible phase detector. >>>> >>>>HCT4046 has 3 phase detectors. >>>>1 xor gate >>>>2 A digital memory network. It consists of four flip–flops and some gating logic, >>>> a three state output and a phase pulse output. >>>> This comparator acts only on the positive edges of the input signals and is independent of duty cycle. >>>>3 A digital four flip–flops and some gating logic a 3 state output and a phase pulse output >>>> >>>>See dataseet >>>> >>>>So what's your problem :-) >>>> >>>>I have used the 4046 for many things, nice chip. >>> >>>OK, my mistake, the 4046 has three terrible phase detectors. And one >>>terrible VCO. >> >>Well, opinions are still allowed (I hope see >>https://arstechnica.com/tech-policy/2023/10/the-uks-problematic-online-safety-act-is-now-law/ ) >>But it depends on what you call 'terrible' >>I have sued 4046 (going back to the old CMOS since the seventies?) for things like FM audio modulation, demodulation, >>data clock recovery, what not. > >The phase-frequency detector has a nanoseconds-wide deadband. That >makes for lots of time error and jitter. > >The XOR detector is just a slow, sloppy XOR gate. > >> >>So do I understand it right if you wanted to sync an LC oscillator with an external pulse, have it restart (so phase shifted) >>in an instant? > >My 50 MHz LC oscillator is the coarse count for a triggred delay >generator, like this one: > >http://www.highlandtechnology.com/DSS/P500DS.shtml > >(We're designing a small embedded version now.)Impressive, my hat off to that! Have not done any picosecond timing work myself... 1 ps resolution is like 1000 GHz???>The oscillator is quiescently quenched and kicked off when we get an >extrnal trigger. Then it counts off time in 20 ns ticks. That's OK for >a microsecond or so, but isn't accurate much longer. So the trick is >to phase-lock it to a good XO but preserve its realtionship to the >trigger, namely preserve its random phase relationship to the XO. > >>If all you need is phase shift and no frequency shift then a variable delay would work? > >The SRS DDG does that, but it's complex and adds a lot of insertion >delay. > >>Bit like summer winter time here, got up one hour early it seems.... >>LC oscillators are (due the the Q (even higher Q for xtal based oscillators) ) not so easy to adjust in a 'flash'. > >Our LC oscillator outputs its first edge a few ns after the trigger, >than ticks faithfully every 20 ns after that. Just a little calculus.OK I see.
Reply by ●October 29, 20232023-10-29
On Sun, 29 Oct 2023 16:06:30 GMT, Jan Panteltje <alien@comet.invalid> wrote:>On a sunny day (Sun, 29 Oct 2023 08:28:08 -0700) it happened John Larkin ><jl@997PotHill.com> wrote in <lvtsjihq7q40l12e41r5vdppfvblsa4sis@4ax.com>: > >>On Sun, 29 Oct 2023 05:15:08 GMT, Jan Panteltje <alien@comet.invalid> >>wrote: >> >>>On a sunny day (Sat, 28 Oct 2023 07:49:21 -0700) it happened John Larkin >>><jl@997PotHill.com> wrote in <no7qji5c7ak2m46cmmuq7misqaqlrt4nkr@4ax.com>: >>> >>>>On Sat, 28 Oct 2023 04:26:51 GMT, Jan Panteltje <alien@comet.invalid> >>>>wrote: >>>> >>>>>On a sunny day (Fri, 27 Oct 2023 15:53:31 -0700) it happened john larkin >>>>><jl@650pot.com> wrote in <6qfojihekda4aobmgnq71rbf493sa454q0@4ax.com>: >>>>> >>>>>>On Thu, 26 Oct 2023 05:06:21 GMT, Jan Panteltje <alien@comet.invalid> >>>>>>wrote: >>>>>> >>>>>>>On a sunny day (Wed, 25 Oct 2023 20:45:52 -0700) it happened John Larkin >>>>>>><jl@997PotHill.com> wrote in <hknjjih3rp87naoq2o2pefergou2deg7i4@4ax.com>: >>>>>>> >>>>>>>>The trick in a digital delay generator, or at least ours, is to stop >>>>>>>>an LC oscillator and start it when we get an external trigger, and >>>>>>>>then use it as our timebase. But lock it to an crystal oscillator to >>>>>>>>keep long delays accurate. >>>>>>>> >>>>>>>>To do that, I need a pretty stable LC oscillator, hence the tempco >>>>>>>>tuning. Capex made us a reel of custom N4700 ceramic caps, which can >>>>>>>>be used to compensate the pretty awful inductor and FR4 tempcos. >>>>>>>> >>>>>>>>HP made one delay generator that actually started and stopped a >>>>>>>>crystal oscillator. It didn't work very well. A quartz crystal is hard >>>>>>>>to kick start and is even worse to stop; it rings like a bell. >>>>>>> >>>>>>>All this makes me think about a 4046 and PLL. >>>>>> >>>>>>The 4046 has a terrible phase detector. >>>>> >>>>>HCT4046 has 3 phase detectors. >>>>>1 xor gate >>>>>2 A digital memory network. It consists of four flip–flops and some gating logic, >>>>> a three state output and a phase pulse output. >>>>> This comparator acts only on the positive edges of the input signals and is independent of duty cycle. >>>>>3 A digital four flip–flops and some gating logic a 3 state output and a phase pulse output >>>>> >>>>>See dataseet >>>>> >>>>>So what's your problem :-) >>>>> >>>>>I have used the 4046 for many things, nice chip. >>>> >>>>OK, my mistake, the 4046 has three terrible phase detectors. And one >>>>terrible VCO. >>> >>>Well, opinions are still allowed (I hope see >>>https://arstechnica.com/tech-policy/2023/10/the-uks-problematic-online-safety-act-is-now-law/ ) >>>But it depends on what you call 'terrible' >>>I have sued 4046 (going back to the old CMOS since the seventies?) for things like FM audio modulation, demodulation, >>>data clock recovery, what not. >> >>The phase-frequency detector has a nanoseconds-wide deadband. That >>makes for lots of time error and jitter. >> >>The XOR detector is just a slow, sloppy XOR gate. >> >>> >>>So do I understand it right if you wanted to sync an LC oscillator with an external pulse, have it restart (so phase shifted) >>>in an instant? >> >>My 50 MHz LC oscillator is the coarse count for a triggred delay >>generator, like this one: >> >>http://www.highlandtechnology.com/DSS/P500DS.shtml >> >>(We're designing a small embedded version now.) > >Impressive, my hat off to that! >Have not done any picosecond timing work myself... 1 ps resolution is like 1000 GHz??? > > >>The oscillator is quiescently quenched and kicked off when we get an >>extrnal trigger. Then it counts off time in 20 ns ticks. That's OK for >>a microsecond or so, but isn't accurate much longer. So the trick is >>to phase-lock it to a good XO but preserve its realtionship to the >>trigger, namely preserve its random phase relationship to the XO. >> >>>If all you need is phase shift and no frequency shift then a variable delay would work? >> >>The SRS DDG does that, but it's complex and adds a lot of insertion >>delay. >> >>>Bit like summer winter time here, got up one hour early it seems.... >>>LC oscillators are (due the the Q (even higher Q for xtal based oscillators) ) not so easy to adjust in a 'flash'. >> >>Our LC oscillator outputs its first edge a few ns after the trigger, >>than ticks faithfully every 20 ns after that. Just a little calculus. > >OK I see.The NIF timing system has sub-ps resolution. Resolution is easy, stability and jitter are hard.
Reply by ●October 29, 20232023-10-29
On 10/29/23 16:28, John Larkin wrote:> On Sun, 29 Oct 2023 05:15:08 GMT, Jan Panteltje <alien@comet.invalid> > wrote: > >> On a sunny day (Sat, 28 Oct 2023 07:49:21 -0700) it happened John Larkin >> <jl@997PotHill.com> wrote in <no7qji5c7ak2m46cmmuq7misqaqlrt4nkr@4ax.com>: >> >>> On Sat, 28 Oct 2023 04:26:51 GMT, Jan Panteltje <alien@comet.invalid> >>> wrote: >>> >>>> On a sunny day (Fri, 27 Oct 2023 15:53:31 -0700) it happened john larkin >>>> <jl@650pot.com> wrote in <6qfojihekda4aobmgnq71rbf493sa454q0@4ax.com>: >>>> >>>>> On Thu, 26 Oct 2023 05:06:21 GMT, Jan Panteltje <alien@comet.invalid> >>>>> wrote: >>>>> >>>>>> On a sunny day (Wed, 25 Oct 2023 20:45:52 -0700) it happened John Larkin >>>>>> <jl@997PotHill.com> wrote in <hknjjih3rp87naoq2o2pefergou2deg7i4@4ax.com>: >>>>>> >>>>>>> The trick in a digital delay generator, or at least ours, is to stop >>>>>>> an LC oscillator and start it when we get an external trigger, and >>>>>>> then use it as our timebase. But lock it to an crystal oscillator to >>>>>>> keep long delays accurate. >>>>>>> >>>>>>> To do that, I need a pretty stable LC oscillator, hence the tempco >>>>>>> tuning. Capex made us a reel of custom N4700 ceramic caps, which can >>>>>>> be used to compensate the pretty awful inductor and FR4 tempcos. >>>>>>> >>>>>>> HP made one delay generator that actually started and stopped a >>>>>>> crystal oscillator. It didn't work very well. A quartz crystal is hard >>>>>>> to kick start and is even worse to stop; it rings like a bell. >>>>>> >>>>>> All this makes me think about a 4046 and PLL. >>>>> >>>>> The 4046 has a terrible phase detector. >>>> >>>> HCT4046 has 3 phase detectors. >>>> 1 xor gate >>>> 2 A digital memory network. It consists of four flip–flops and some gating logic, >>>> a three state output and a phase pulse output. >>>> This comparator acts only on the positive edges of the input signals and is independent of duty cycle. >>>> 3 A digital four flip–flops and some gating logic a 3 state output and a phase pulse output >>>> >>>> See dataseet >>>> >>>> So what's your problem :-) >>>> >>>> I have used the 4046 for many things, nice chip. >>> >>> OK, my mistake, the 4046 has three terrible phase detectors. And one >>> terrible VCO. >> >> Well, opinions are still allowed (I hope see https://arstechnica.com/tech-policy/2023/10/the-uks-problematic-online-safety-act-is-now-law/ ) >> But it depends on what you call 'terrible' >> I have sued 4046 (going back to the old CMOS since the seventies?) for things like FM audio modulation, demodulation, >> data clock recovery, what not. > > The phase-frequency detector has a nanoseconds-wide deadband. That > makes for lots of time error and jitter. > > The XOR detector is just a slow, sloppy XOR gate. > >> >> So do I understand it right if you wanted to sync an LC oscillator with an external pulse, have it restart (so phase shifted) in an instant? > > My 50 MHz LC oscillator is the coarse count for a triggred delay > generator, like this one: > > http://www.highlandtechnology.com/DSS/P500DS.shtml > > (We're designing a small embedded version now.) > > The oscillator is quiescently quenched and kicked off when we get an > extrnal trigger. Then it counts off time in 20 ns ticks. That's OK for > a microsecond or so, but isn't accurate much longer. So the trick is > to phase-lock it to a good XO but preserve its realtionship to the > trigger, namely preserve its random phase relationship to the XO. >[...]How do you do that? Jeroen Belleman
Reply by ●October 29, 20232023-10-29
On Sun, 29 Oct 2023 22:47:23 +0100, Jeroen Belleman <jeroen@nospam.please> wrote:>On 10/29/23 16:28, John Larkin wrote: >> On Sun, 29 Oct 2023 05:15:08 GMT, Jan Panteltje <alien@comet.invalid> >> wrote: >> >>> On a sunny day (Sat, 28 Oct 2023 07:49:21 -0700) it happened John Larkin >>> <jl@997PotHill.com> wrote in <no7qji5c7ak2m46cmmuq7misqaqlrt4nkr@4ax.com>: >>> >>>> On Sat, 28 Oct 2023 04:26:51 GMT, Jan Panteltje <alien@comet.invalid> >>>> wrote: >>>> >>>>> On a sunny day (Fri, 27 Oct 2023 15:53:31 -0700) it happened john larkin >>>>> <jl@650pot.com> wrote in <6qfojihekda4aobmgnq71rbf493sa454q0@4ax.com>: >>>>> >>>>>> On Thu, 26 Oct 2023 05:06:21 GMT, Jan Panteltje <alien@comet.invalid> >>>>>> wrote: >>>>>> >>>>>>> On a sunny day (Wed, 25 Oct 2023 20:45:52 -0700) it happened John Larkin >>>>>>> <jl@997PotHill.com> wrote in <hknjjih3rp87naoq2o2pefergou2deg7i4@4ax.com>: >>>>>>> >>>>>>>> The trick in a digital delay generator, or at least ours, is to stop >>>>>>>> an LC oscillator and start it when we get an external trigger, and >>>>>>>> then use it as our timebase. But lock it to an crystal oscillator to >>>>>>>> keep long delays accurate. >>>>>>>> >>>>>>>> To do that, I need a pretty stable LC oscillator, hence the tempco >>>>>>>> tuning. Capex made us a reel of custom N4700 ceramic caps, which can >>>>>>>> be used to compensate the pretty awful inductor and FR4 tempcos. >>>>>>>> >>>>>>>> HP made one delay generator that actually started and stopped a >>>>>>>> crystal oscillator. It didn't work very well. A quartz crystal is hard >>>>>>>> to kick start and is even worse to stop; it rings like a bell. >>>>>>> >>>>>>> All this makes me think about a 4046 and PLL. >>>>>> >>>>>> The 4046 has a terrible phase detector. >>>>> >>>>> HCT4046 has 3 phase detectors. >>>>> 1 xor gate >>>>> 2 A digital memory network. It consists of four flip–flops and some gating logic, >>>>> a three state output and a phase pulse output. >>>>> This comparator acts only on the positive edges of the input signals and is independent of duty cycle. >>>>> 3 A digital four flip–flops and some gating logic a 3 state output and a phase pulse output >>>>> >>>>> See dataseet >>>>> >>>>> So what's your problem :-) >>>>> >>>>> I have used the 4046 for many things, nice chip. >>>> >>>> OK, my mistake, the 4046 has three terrible phase detectors. And one >>>> terrible VCO. >>> >>> Well, opinions are still allowed (I hope see https://arstechnica.com/tech-policy/2023/10/the-uks-problematic-online-safety-act-is-now-law/ ) >>> But it depends on what you call 'terrible' >>> I have sued 4046 (going back to the old CMOS since the seventies?) for things like FM audio modulation, demodulation, >>> data clock recovery, what not. >> >> The phase-frequency detector has a nanoseconds-wide deadband. That >> makes for lots of time error and jitter. >> >> The XOR detector is just a slow, sloppy XOR gate. >> >>> >>> So do I understand it right if you wanted to sync an LC oscillator with an external pulse, have it restart (so phase shifted) in an instant? >> >> My 50 MHz LC oscillator is the coarse count for a triggred delay >> generator, like this one: >> >> http://www.highlandtechnology.com/DSS/P500DS.shtml >> >> (We're designing a small embedded version now.) >> >> The oscillator is quiescently quenched and kicked off when we get an >> extrnal trigger. Then it counts off time in 20 ns ticks. That's OK for >> a microsecond or so, but isn't accurate much longer. So the trick is >> to phase-lock it to a good XO but preserve its realtionship to the >> trigger, namely preserve its random phase relationship to the XO. >>[...] > >How do you do that? > >Jeroen BellemanDigitize the LC oscillator waveform with an ADC that's clocked by the crystal, and do FPGA math on that to tune a varicap to lock in the phase relationship. The LC is drifting after trigger, so it's prudent to start locking in under a microsecond. Older designs, like the HP 5359A Time Synthesizer and such, didn't have the advantages that we have now, cheap video ADCs and FPGAs and phemts and such. But their old manuals are worth studying. SRS used to have schematics in their manuals, so I studied them too.
Reply by ●October 29, 20232023-10-29
On Saturday, October 28, 2023 at 7:49:49 AM UTC-7, John Larkin wrote:> On Sat, 28 Oct 2023 04:26:51 GMT, Jan Panteltje <al...@comet.invalid> > wrote: > > >On a sunny day (Fri, 27 Oct 2023 15:53:31 -0700) it happened john larkin > ><j...@650pot.com> wrote in <6qfojihekda4aobmg...@4ax.com>: > >> >>The 4046 has a terrible phase detector. > > > >HCT4046 has 3 phase detectors. > >1 xor gate > >2 A digital memory network. It consists of four flip–flops and some gating logic, > > a three state output and a phase pulse output. > > This comparator acts only on the positive edges of the input signals and is independent of duty cycle. > >3 A digital four flip–flops and some gating logic a 3 state output and a phase pulse output > > > >See dataseet > > > >So what's your problem :-) > > > >I have used the 4046 for many things, nice chip.> OK, my mistake, the 4046 has three terrible phase detectors. And one > terrible VCO.The three-detector wasn't the CD4046, but a later 74HC prefixed unit For the purpose of a start-now oscillator, none of the 4046 phase detectors matter, only the 'enable' feature, the pin #5 switch for its current sources. Ramping up/down my stepping motors with a 4046 was graceful and easy to accomplish.
Reply by ●October 29, 20232023-10-29
John Larkin <jl@997PotHill.com> wrote:> On Sun, 29 Oct 2023 08:56:07 -0400, Phil Hobbs > <pcdhSpamMeSenseless@electrooptical.net> wrote: > >> On 2023-10-25 06:39, John Larkin wrote: >>> On Wed, 25 Oct 2023 07:18:58 +0300, Dimiter_Popoff <dp@tgi-sci.com> >>> wrote: >>> >>>> On 10/25/2023 1:51, john larkin wrote: >>>>> On Wed, 25 Oct 2023 01:12:21 +0300, Dimiter_Popoff <dp@tgi-sci.com> >>>>> wrote: >>>>> >>>>>> On 10/25/2023 0:34, john larkin wrote: >>>>>>> Tww it the dimensionless factor >>>>>>> >>>>>>> (how many parts you tidly-wink and lose) / (how many parts you want) >>>>>>> >>>>>>> which, for 0603's, runs 0.6 or so. >>>>>>> >>>>>> >>>>>> Not sure I got what tww is (looked it up, some domino thing so I >>>>>> guess I get it if so) but 0402 are significantly worse, a lot more >>>>>> than twice worse. And I have not yet done any 0201... >>>>> >>>>> When I first saw 1206's, I thought they were tiny. Ha! >>>>> >>>>> I refuse to use 0402's. I default to 0805s. >>>>> >>>>> I'm tuning the tempco of a 50 MHz triggrered Colpitts oscillator. What >>>>> a nuisance. It should have a 3.3 pF N4700 0805 cap, but the layout guy >>>>> used all 0603s, so some engineer (who shall not be named) substituted >>>>> an 0603 NP0. "NTC" does sound a lot like "NPO" I guess. >>>>> >>>>> The proper 0805 cap was custom brewed for us by Capax. >>>>> >>>> >>>> I often do it the other way around,the 0805 pads I make can also hold >>>> 0603. Took me a while to grasp I could do it the first time I could >>>> not find the 0805 I needed... >>>> >>>> The temp compensations I typically have to deal with are resistor >>>> tracking. Meanwhile I know which batch of which supply I have >>>> does not track too well with which other. >>> >>> What I'm fighting right now is the positive TC of the Coilcraft >>> Midi-spring inductor (typically +100 PPM/c or so) and the positive TC >>> of the PCB FR4, typically +900. The combo makes the oscillator have a >>> serious negative TC, which the N4700 cap compensates. I have a series >>> padder cap, in series with the NTC cap, to trim the oscillator tempco >>> to near zero, down to the 2nd order parabola. >>> >>> It's tedious. Tuning takes about an hour per iteration. We have a >>> gigantic environmental oven in the basement, but using that would take >>> more like a day per iteration. I made my own benchtop chamber, a >>> cardboard box with a USB fan inside, used with a heat gun and freeze >>> spray. >>> >>> My $5000 Rigol scope is the frequncy counter and USB fan supply. >>> >>> >> Seems like with a little math you could take one measurement, calculate >> the correct pad cap value, and be done. Of course NTC caps' tempcos are >> notoriously variable (typically +- 30%), so it's hard to get away from >> cut-and-try altogether. > > What one measurement? I typically take 5 or so termperature:frequency > points and graph that to get an average slope, which generally looks > pretty good. The bummer is that the padder caps only come in coarse > steps, and the value of the padder has some 2nd order effects.One iteration, I should say.> >> >> You got a reel of custom ones made--do you know how tight their tempco >> matching is? > > I've only measured a few but they look pretty good. The uncorrected > tempco of the oscillator is something like 150 PPM, and I can live > with 25 or so, so the correction need not be perfect. > > What's scary is that most of the TC is in the PCB dielectric, > composition and thickness, and that can vary from board batch to > batch. >Possibly a good opportunity for one of your little crenellated boards. A couple of panels could be several hundred oscillators. Cheers Phil Hobbs -- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC / Hobbs ElectroOptics Optics, Electro-optics, Photonics, Analog Electronics
