On Monday, June 26, 2023 at 10:20:48 AM UTC-4, John Woodgate wrote:> I want to divide a 32768 Hz crystal frequency by 20 to get a stable frequency for a component bridge. I could use a 4017 and half a a 4013 (sorry about these ancient devices, but they are still good for some things), but I would have to add something to make the crystal oscillate unless there is a way to use the other half of the 4013 to make the oscillator. > > I also looked at using just a 4096, which gives me the oscillator, but I can't see how to make it divide by 20. I know there is a technique that combines some of the output signals via an EXOR to achieve divisors that are not powers of 2, but I can't find information on which signals to combine.20= 2 x 2 x 5. There are plenty divide by 5 circuits from the BCD days. There are handful of quad D-FFs in the 4000 series that economize on parts a little bit- much more flexibility using HC. A generic diagram here: https://pages.mtu.edu/~suits/electronics/Divide_by_3&5_circuit.html The remaining 2 x 2 is kinda self-evident. You can make the oscillator out of anything. Most circuit examples are logic inverter Pierce oscillators with a series resistance between the inverter output and crystal feedback branch. You just need to keep the crystal dissipation in the microwatt range at resonance using that resistance. The parameter should be on the crystal datasheet.
Dividing a 32768 Hz crystal frequency
Started by ●June 26, 2023
Reply by ●June 27, 20232023-06-27
Reply by ●June 27, 20232023-06-27
On Tuesday, June 27, 2023 at 4:08:05 PM UTC+1, Martin Brown wrote:> On 27/06/2023 14:26, John Woodgate wrote: > > On Tuesday, June 27, 2023 at 12:11:48 PM UTC+1, Phil Hobbs wrote: > > >> Some years ago, we had a George Herold thread on making sine waves. The > >> eventual solution was a 4017 with resistors forming a weighted sum of the > >> outputs. This cancels the second through ninth harmonics, making filtering > >> much easier. > It might be this thread which I vaguely recall also in AoE. > > https://groups.google.com/g/sci.electronics.design/c/RDRNCUjjI08/m/YH038ruKNAIJ > > -- > Martin BrownThanks, but the head of the thread is missing and I can't guess what went before.
Reply by ●June 27, 20232023-06-27
On Tuesday, June 27, 2023 at 5:23:41 PM UTC+1, Fred Bloggs wrote:> On Monday, June 26, 2023 at 10:20:48 AM UTC-4, John Woodgate wrote: > > I want to divide a 32768 Hz crystal frequency by 20 to get a stable frequency for a component bridge. I could use a 4017 and half a a 4013 (sorry about these ancient devices, but they are still good for some things), but I would have to add something to make the crystal oscillate unless there is a way to use the other half of the 4013 to make the oscillator. > > > > I also looked at using just a 4096, which gives me the oscillator, but I can't see how to make it divide by 20. I know there is a technique that combines some of the output signals via an EXOR to achieve divisors that are not powers of 2, but I can't find information on which signals to combine. > > 20= 2 x 2 x 5. > > There are plenty divide by 5 circuits from the BCD days. > > There are handful of quad D-FFs in the 4000 series that economize on parts a little bit- much more flexibility using HC. > > A generic diagram here: > > https://pages.mtu.edu/~suits/electronics/Divide_by_3&5_circuit.html > > The remaining 2 x 2 is kinda self-evident. > > You can make the oscillator out of anything. Most circuit examples are logic inverter Pierce oscillators with a series resistance between the inverter output and crystal feedback branch. You just need to keep the crystal dissipation in the microwatt range at resonance using that resistance. The parameter should be on the crystal datasheet.Thank you. I will not continue this thread, with thanks to all.
Reply by ●June 27, 20232023-06-27
tirsdag den 27. juni 2023 kl. 18.20.00 UTC+2 skrev John Larkin:> On Tue, 27 Jun 2023 06:24:10 -0700 (PDT), John Woodgate > <jmw2...@gmail.com> wrote: > >On Tuesday, June 27, 2023 at 12:57:13?PM UTC+1, Phil Allison wrote: > >> John Woodgate wrote: > >> > >> ----------------------------------------- > >> > > >> > The project is tutorial in nature, so I don't want to use too many 'integrated' fixes, and SMD-only devices are not an option. > >> > Regarding the frequency, it does need to be near 10k/2pi, but other things can be adjusted to suit the exact frequency, > >> > which needs to be stable within ą1% and not require a counter to determine it. > >> > > >> ** OK - we finally have an actual " spec" for your 1591 Hz sine wave oscillator. > >> > >> This simple topology will do the job very easily: > >> > >> https://sound-au.com/project86.htm > >> > >> The DC supply can be to 9v as shown, or +/- 5V or up to +/- 15 v. > >> Quad op-amps like the TL064 or TL074 are perfect - so are many other duals. > >> > >> THD is about 0.15% and frequency can be trimmed by adjusting one or both RT values as shown in fig 2. > >> Amplitude stability depends only on the tempco of the 4 diodes. > >> > >> Essentially it is my design and many hundreds have been built. > >> Way better than a Wein bridge topology since there's no need for ( now unobtainable) thermistors, tiny lamps or fussy FETs. > >> > >> > >> .... Phil > >Looks very good, but too complicated for my project. > It's no big deal to lowpass a square wave into a pretty good sine. > It's fun to Spice things like that, fiddle until it works. > > Don't start with a 2nd order Sallen-Key! 3rd is OK. LC is nicely > retro. > > Given a binary counter and a hacked resistor DAC, I guess you can't > reduce the 3rd harmonic, the big one.six steps can be ok https://imgur.com/a/cQJu9qg
Reply by ●June 27, 20232023-06-27
On Tue, 27 Jun 2023 15:35:01 -0700 (PDT), Lasse Langwadt Christensen <langwadt@fonz.dk> wrote:>tirsdag den 27. juni 2023 kl. 18.20.00 UTC+2 skrev John Larkin: >> On Tue, 27 Jun 2023 06:24:10 -0700 (PDT), John Woodgate >> <jmw2...@gmail.com> wrote: >> >On Tuesday, June 27, 2023 at 12:57:13?PM UTC+1, Phil Allison wrote: >> >> John Woodgate wrote: >> >> >> >> ----------------------------------------- >> >> > >> >> > The project is tutorial in nature, so I don't want to use too many 'integrated' fixes, and SMD-only devices are not an option. >> >> > Regarding the frequency, it does need to be near 10k/2pi, but other things can be adjusted to suit the exact frequency, >> >> > which needs to be stable within ?1% and not require a counter to determine it. >> >> > >> >> ** OK - we finally have an actual " spec" for your 1591 Hz sine wave oscillator. >> >> >> >> This simple topology will do the job very easily: >> >> >> >> https://sound-au.com/project86.htm >> >> >> >> The DC supply can be to 9v as shown, or +/- 5V or up to +/- 15 v. >> >> Quad op-amps like the TL064 or TL074 are perfect - so are many other duals. >> >> >> >> THD is about 0.15% and frequency can be trimmed by adjusting one or both RT values as shown in fig 2. >> >> Amplitude stability depends only on the tempco of the 4 diodes. >> >> >> >> Essentially it is my design and many hundreds have been built. >> >> Way better than a Wein bridge topology since there's no need for ( now unobtainable) thermistors, tiny lamps or fussy FETs. >> >> >> >> >> >> .... Phil >> >Looks very good, but too complicated for my project. >> It's no big deal to lowpass a square wave into a pretty good sine. >> It's fun to Spice things like that, fiddle until it works. >> >> Don't start with a 2nd order Sallen-Key! 3rd is OK. LC is nicely >> retro. >> >> Given a binary counter and a hacked resistor DAC, I guess you can't >> reduce the 3rd harmonic, the big one. > >six steps can be ok >https://imgur.com/a/cQJu9qgConsider a binary counter. The MSB is a square wave of freqency F, with third harmonic 3F. The next bit is 2F with harmonic 6F. I can't see how any linear-weighted combination of counter bits can cancel the 3F line.
Reply by ●June 27, 20232023-06-27
John Woodgate wrote: -----------------------------------> Phil Allison wrote: > > John Woodgate wrote: > > ** OK - we finally have an actual " spec" for your 1591 Hz sine wave oscillator. > > > > This simple topology will do the job very easily: > > > > https://sound-au.com/project86.htm > > > > The DC supply can be to 9v as shown, or +/- 5V or up to +/- 15 v. > > Quad op-amps like the TL064 or TL074 are perfect - so are many other duals. > > > > THD is about 0.15% and frequency can be trimmed by adjusting one or both RT values as shown in fig 2. > > Amplitude stability depends only on the tempco of the 4 diodes. > > > > Essentially it is my design and many hundreds have been built. > > Way better than a Wein bridge topology since there's no need for ( now unobtainable) thermistors, tiny lamps or fussy FETs. > > > > > > .... Phil > Looks very good, but too complicated for my project.** Huh ?? Just to be clear, for a fixed frequency output you only need to build the schematic shown in fig 2. RT and C values of 10k and 10nF to give 1591 Hz. ...... Phil
Reply by ●June 28, 20232023-06-28
On Wednesday, June 28, 2023 at 9:34:24 AM UTC+10, John Larkin wrote:> On Tue, 27 Jun 2023 15:35:01 -0700 (PDT), Lasse Langwadt Christensen <lang...@fonz.dk> wrote: > >tirsdag den 27. juni 2023 kl. 18.20.00 UTC+2 skrev John Larkin: > >> On Tue, 27 Jun 2023 06:24:10 -0700 (PDT), John Woodgate <jmw2...@gmail.com> wrote: > >> >On Tuesday, June 27, 2023 at 12:57:13?PM UTC+1, Phil Allison wrote: > >> >> John Woodgate wrote:> >> It's no big deal to lowpass a square wave into a pretty good sine.It's even easier to low pass a "modified sine wave" -- -- - - - - - -- -- which you can get by switching between three voltages. The great virtue is that if the timing and the voltage are exactly right tghe thirtd harmonic contnet s exactl> >> It's fun to Spice things like that, fiddle until it works. > >> > >> Don't start with a 2nd order Sallen-Key! 3rd is OK. LC is nicely > >> retro. > >> > >> Given a binary counter and a hacked resistor DAC, I guess you can't > >> reduce the 3rd harmonic, the big one. > > > >six steps can be ok > >https://imgur.com/a/cQJu9qg > Consider a binary counter. The MSB is a square wave of freqency F, > with third harmonic 3F. > > The next bit is 2F with harmonic 6F. > > I can't see how any linear-weighted combination of counter bits can cancel the 3F line.That isn't how you do it. Feeding the square wave through a shift-register and using resistors hung on successive taps lets you set up a finite-impulse response filter. They do have to go into an adder/subtractor op amp set up to generate the desired output. For an infinite length shift register the optimal weighing is is the sinc function https://en.wikipedia.org/wiki/Sinc_function which does change sign. Truncating it produces "Gibbs oscillations" which you can essentially eliminated by applying a raised cosine (Hamming) window to the finite length of shift register you actually use. The filter doesn't cut off quite as hard but it does cut off monotonicly. You can kill the third harmonic pretty close to perfectly. -- Bill Sloman, Sydney
Reply by ●June 28, 20232023-06-28
On 27-June-23 12:20 am, John Woodgate wrote:> I want to divide a 32768 Hz crystal frequency by 20 to get a stable frequency for a component bridge. I could use a 4017 and half a a 4013 (sorry about these ancient devices, but they are still good for some things), but I would have to add something to make the crystal oscillate unless there is a way to use the other half of the 4013 to make the oscillator. > > I also looked at using just a 4096, which gives me the oscillator, but I can't see how to make it divide by 20. I know there is a technique that combines some of the output signals via an EXOR to achieve divisors that are not powers of 2, but I can't find information on which signals to combine.Many years ago, I ANDed a bunch of outputs from counter stages, and fed the result into the reset, to achieve division by some arbitrary integer. I was electronically naive [*] at the time, and what I did may have relied on the propagation delays to work properly. The application would not have been sensitive to the occasional glitch. Or perhaps I was lucky enough to have bought a counter with a synchronous reset. Either way, it worked. Sylvia [*] OK, OK, you got me; even more electronically naive than now.
Reply by ●June 28, 20232023-06-28
On Wed, 28 Jun 2023 14:35:42 +1000, Sylvia Else <sylvia@email.invalid> wrote:>On 27-June-23 12:20 am, John Woodgate wrote: >> I want to divide a 32768 Hz crystal frequency by 20 to get a stable frequency for a component bridge. I could use a 4017 and half a a 4013 (sorry about these ancient devices, but they are still good for some things), but I would have to add something to make the crystal oscillate unless there is a way to use the other half of the 4013 to make the oscillator. >> >> I also looked at using just a 4096, which gives me the oscillator, but I can't see how to make it divide by 20. I know there is a technique that combines some of the output signals via an EXOR to achieve divisors that are not powers of 2, but I can't find information on which signals to combine. > >Many years ago, I ANDed a bunch of outputs from counter stages, and fed >the result into the reset, to achieve division by some arbitrary >integer. I was electronically naive [*] at the time, and what I did may >have relied on the propagation delays to work properly. The application >would not have been sensitive to the occasional glitch. > >Or perhaps I was lucky enough to have bought a counter with a >synchronous reset. Either way, it worked. > >Sylvia > >[*] OK, OK, you got me; even more electronically naive than now.Actually, I think that it always works, sync or async.
Reply by ●June 28, 20232023-06-28
On Tuesday, June 27, 2023 at 11:28:46 PM UTC-7, John Larkin wrote:> On Wed, 28 Jun 2023 14:35:42 +1000, Sylvia Else <syl...@email.invalid> > wrote:> >Many years ago, I ANDed a bunch of outputs from counter stages, and fed > >the result into the reset, to achieve division by some arbitrary > >integer. I was electronically naive [*] at the time, and what I did may > >have relied on the propagation delays to work properly. The application > >would not have been sensitive to the occasional glitch. > > > >Or perhaps I was lucky enough to have bought a counter with a > >synchronous reset. Either way, it worked. > > > >Sylvia > > > >[*] OK, OK, you got me; even more electronically naive than now. > Actually, I think that it always works, sync or async.Not necessarily: async reset can be fooled by the transient between-states values of a slow slewing or ripple-delayed clocked event. Using the gate output AT the main clock time should take you from N to zero, as long as gate and slew delays aren't bigger than a clock period.
