Electronics-Related.com
Forums

spread spectrum cheating

Started by John Larkin November 3, 2022
On Wednesday, 9 November 2022 at 14:39:38 UTC, John Larkin wrote:
> On 9 Nov 2022 10:32:55 GMT, Michael Schwingen > <news-15...@discworld.dascon.de> wrote: > > >On 2022-11-03, John Larkin <jla...@highlandSNIPMEtechnology.com> wrote: > >> So one idea is to spread-spectrum, wobulate the clock frequency or > >> phase to smear the spectral peak below the CE limits. > >> > >> Has anyone done this? I wonder how wide a frequency sweep we'd need > >> but more important is what the equivalent FM modulation frequency > >> would have to be so the spectrum analyzer never sees the peak spectral > >> line. Imagine a sawtooth frequency modulation, which turns the > >> spectral spike into a nice flat plateau. What sort of sawtooth > >> frequency would work? > > > >30-33kHz modulation frequency seem to be standard. There are lots of > >ready-made SSC clock generators, and even 5*7mm-style crystal oscillators > >with SSC output. > That's interesting. We could just drop one into our board. Cool. > > We do have a PLL inside our FPGA that multiplies the 125 MHz clock up, > to clock a 250 MHz ADC. A little jitter wouldn't bother me (the signal > is grossly oversampled) but we need the PLL to still work. > > > >For CPU clocks etc., I like the SI5351A clock generator (if you can get them > >since Skyworks bought the parts). You can either order them pre-programmed, > >or you can set the registers via I2C after each power-on (that even works on > >pre-programmed parts). PLLA can do SSC with configurable parameters, and > >125MHz is in the range of supported outputs. > > > >cu > >Michael > Great. Thanks.
Why not convert the clock into a pseudo-random sequence and XOR that with the data. That way, both the clock and data will have a white noise spectrum (shaped with a sinc that has a zero at the clock frequency). Reverse the process at the other end. As you are using fpgas the extra overhead should be minimal. Alternatively, you could use Manchester coding which would achieve a similar result. John
On Thursday, November 3, 2022 at 10:37:53 AM UTC-4, Joe Gwinn wrote:
> On Wed, 02 Nov 2022 20:00:00 -0700, John Larkin > <jla...@highlandSNIPMEtechnology.com> wrote: > > >We make a bunch of boxes that go into a semi fab tool. One measures an > >optical waveform and shoots it to a bigger box, over three twisted > >pairs (clock, data, data) using shielded RJ45 ethernet type stuff. > > > >When we originally did it, they told us we were exempt from ROHS and > >EMI standards, but now we aren't. ROHS is no big deal, but the little > >box makes a continuous 62 MHz clock, differential at 5 volt swings, > >and radiates too much. > > > >We can't lowpass filter the fundamental of course. We can't drop the > >amplitude much. A common-mode balun might help some. > > > >So one idea is to spread-spectrum, wobulate the clock frequency or > >phase to smear the spectral peak below the CE limits. > > > >Has anyone done this? I wonder how wide a frequency sweep we'd need > >but more important is what the equivalent FM modulation frequency > >would have to be so the spectrum analyzer never sees the peak spectral > >line. Imagine a sawtooth frequency modulation, which turns the > >spectral spike into a nice flat plateau. What sort of sawtooth > >frequency would work? > > > >My options are to add a modulated phase shifter in the clock path, or > >to replace the main XO with a VCO and apply some waveform to the VCO > >input to FM the whole FPGA clock and everything. Clock and data would > >sweep together, which is kind of nice. > > > >So, how wide and how fast should I sweep? > Wobbling the clock frequency to reduce EMI is in fact a standard trick > going back decades, with commodity chips to do just that. > > .<https://www.eetimes.com/isscc-spread-spectrum-clocks-mitigate-emi/>
I've always wondered if frequency wobbling is a method to reduce the interference impact of the emissions, or if it is just a way to impact the measurement. The same amount of power is being emitted at a given bandwidth at the time the sweep passes that range, swept or not. I would image there are victim devices that would still be impacted in the same way, even with the frequency sweeping. -- Rick C. - Get 1,000 miles of free Supercharging - Tesla referral code - https://ts.la/richard11209
On Wed, 9 Nov 2022 07:35:53 -0800 (PST), John Walliker
<jrwalliker@gmail.com> wrote:

>On Wednesday, 9 November 2022 at 14:39:38 UTC, John Larkin wrote: >> On 9 Nov 2022 10:32:55 GMT, Michael Schwingen >> <news-15...@discworld.dascon.de> wrote: >> >> >On 2022-11-03, John Larkin <jla...@highlandSNIPMEtechnology.com> wrote: >> >> So one idea is to spread-spectrum, wobulate the clock frequency or >> >> phase to smear the spectral peak below the CE limits. >> >> >> >> Has anyone done this? I wonder how wide a frequency sweep we'd need >> >> but more important is what the equivalent FM modulation frequency >> >> would have to be so the spectrum analyzer never sees the peak spectral >> >> line. Imagine a sawtooth frequency modulation, which turns the >> >> spectral spike into a nice flat plateau. What sort of sawtooth >> >> frequency would work? >> > >> >30-33kHz modulation frequency seem to be standard. There are lots of >> >ready-made SSC clock generators, and even 5*7mm-style crystal oscillators >> >with SSC output. >> That's interesting. We could just drop one into our board. Cool. >> >> We do have a PLL inside our FPGA that multiplies the 125 MHz clock up, >> to clock a 250 MHz ADC. A little jitter wouldn't bother me (the signal >> is grossly oversampled) but we need the PLL to still work. >> > >> >For CPU clocks etc., I like the SI5351A clock generator (if you can get them >> >since Skyworks bought the parts). You can either order them pre-programmed, >> >or you can set the registers via I2C after each power-on (that even works on >> >pre-programmed parts). PLLA can do SSC with configurable parameters, and >> >125MHz is in the range of supported outputs. >> > >> >cu >> >Michael >> Great. Thanks. > >Why not convert the clock into a pseudo-random sequence and XOR that with the >data. That way, both the clock and data will have a white noise spectrum (shaped >with a sinc that has a zero at the clock frequency). Reverse the process at the >other end. >As you are using fpgas the extra overhead should be minimal. >Alternatively, you could use Manchester coding which would achieve a similar result. > >John
The customer has designed an elaborate controller (it took them a few years) and doesn't want to change it, but is failing EMI. We would prefer to not change our box much either, any time soon. It's an interesting political situation. If we could change things, we could go 8b10b on the data lanes and have no clock pair in the cable. 8b10b is sort of spread-spectrum already, and tricks can make it better.
On Wednesday, 9 November 2022 at 16:50:02 UTC, John Larkin wrote:
> On Wed, 9 Nov 2022 07:35:53 -0800 (PST), John Walliker > <jrwal...@gmail.com> wrote: > > >On Wednesday, 9 November 2022 at 14:39:38 UTC, John Larkin wrote: > >> On 9 Nov 2022 10:32:55 GMT, Michael Schwingen > >> <news-15...@discworld.dascon.de> wrote: > >> > >> >On 2022-11-03, John Larkin <jla...@highlandSNIPMEtechnology.com> wrote: > >> >> So one idea is to spread-spectrum, wobulate the clock frequency or > >> >> phase to smear the spectral peak below the CE limits. > >> >> > >> >> Has anyone done this? I wonder how wide a frequency sweep we'd need > >> >> but more important is what the equivalent FM modulation frequency > >> >> would have to be so the spectrum analyzer never sees the peak spectral > >> >> line. Imagine a sawtooth frequency modulation, which turns the > >> >> spectral spike into a nice flat plateau. What sort of sawtooth > >> >> frequency would work? > >> > > >> >30-33kHz modulation frequency seem to be standard. There are lots of > >> >ready-made SSC clock generators, and even 5*7mm-style crystal oscillators > >> >with SSC output. > >> That's interesting. We could just drop one into our board. Cool. > >> > >> We do have a PLL inside our FPGA that multiplies the 125 MHz clock up, > >> to clock a 250 MHz ADC. A little jitter wouldn't bother me (the signal > >> is grossly oversampled) but we need the PLL to still work. > >> > > >> >For CPU clocks etc., I like the SI5351A clock generator (if you can get them > >> >since Skyworks bought the parts). You can either order them pre-programmed, > >> >or you can set the registers via I2C after each power-on (that even works on > >> >pre-programmed parts). PLLA can do SSC with configurable parameters, and > >> >125MHz is in the range of supported outputs. > >> > > >> >cu > >> >Michael > >> Great. Thanks. > > > >Why not convert the clock into a pseudo-random sequence and XOR that with the > >data. That way, both the clock and data will have a white noise spectrum (shaped > >with a sinc that has a zero at the clock frequency). Reverse the process at the > >other end. > >As you are using fpgas the extra overhead should be minimal. > >Alternatively, you could use Manchester coding which would achieve a similar result. > > > >John > The customer has designed an elaborate controller (it took them a few > years) and doesn't want to change it, but is failing EMI. We would > prefer to not change our box much either, any time soon. It's an > interesting political situation. > > If we could change things, we could go 8b10b on the data lanes and > have no clock pair in the cable. 8b10b is sort of spread-spectrum > already, and tricks can make it better.
In that case, maybe you should revisit grounding the shield at both ends (with a series capacitor self resonant at 62MHz if they insist on the "ground loop" being broken). Also did you establish whether they were applying industrial (A) or light commercial/residential (B) emissions limits? It does seem as if they want you to jump over hurdles with both legs tied together. John
On Wednesday, November 2, 2022 at 8:00:11 PM UTC-7, John Larkin wrote:
> We make a bunch of boxes that go into a semi fab tool. One measures an > optical waveform and shoots it to a bigger box, over three twisted > pairs (clock, data, data) using shielded RJ45 ethernet type stuff. >
Probably a dumb question, but those clock and data signals are source- terminated to drive ~100 ohms, right? If you have standing waves on the wire pairs, I can see them exciting the ungrounded shield at the current points, making a very effective antenna. Radiation from the cable could easily be 30 dB worse than expected. -- john, KE5FX
torsdag den 3. november 2022 kl. 04.00.11 UTC+1 skrev John Larkin:
> We make a bunch of boxes that go into a semi fab tool. One measures an > optical waveform and shoots it to a bigger box, over three twisted > pairs (clock, data, data) using shielded RJ45 ethernet type stuff. > > When we originally did it, they told us we were exempt from ROHS and > EMI standards, but now we aren't. ROHS is no big deal, but the little > box makes a continuous 62 MHz clock, differential at 5 volt swings, > and radiates too much. > > We can't lowpass filter the fundamental of course. We can't drop the > amplitude much. A common-mode balun might help some.
if it is balanced why do you need such a massive swing?
On Wednesday, November 9, 2022 at 8:42:59 AM UTC-8, Ricky wrote:
> On Thursday, November 3, 2022 at 10:37:53 AM UTC-4, Joe Gwinn wrote:
> > Wobbling the clock frequency to reduce EMI is in fact a standard trick > > going back decades, with commodity chips to do just that. > > > > .<https://www.eetimes.com/isscc-spread-spectrum-clocks-mitigate-emi/>
> I've always wondered if frequency wobbling is a method to reduce the interference impact of the emissions, or if it is just a way to impact the measurement. The same amount of power is being emitted at a given bandwidth at the time the sweep passes that range, swept or not. I would image there are victim devices that would still be impacted in the same way, even with the frequency sweeping.
At least in mechanical systems, there aren't a lot of damping mechanisms at work, and resonances tend to be sharp. It's a real challenge to make a good shock absorber. Between ohmic and magnetic-hysteresis and dielectric losses, mainly a resonance in electric circuits is going to be lossy and broad (on the scale of the megahertz frequencies we're considering in test). I'm thinking that 'victim devices' won't run away if the noise source is broadband, OR... they're so sensitive at all frequencies that you just run into all the other noise sources first. That presumes the victim box gets some shielding, and testing, before product release. I've seen consumer devices that have to have good separation, or the WiFi box garbles the sound at the audio box; presumably that's magnetic coupling from power supplies.
On Wed, 9 Nov 2022 11:11:06 -0800 (PST), Lasse Langwadt Christensen
<langwadt@fonz.dk> wrote:

>torsdag den 3. november 2022 kl. 04.00.11 UTC+1 skrev John Larkin: >> We make a bunch of boxes that go into a semi fab tool. One measures an >> optical waveform and shoots it to a bigger box, over three twisted >> pairs (clock, data, data) using shielded RJ45 ethernet type stuff. >> >> When we originally did it, they told us we were exempt from ROHS and >> EMI standards, but now we aren't. ROHS is no big deal, but the little >> box makes a continuous 62 MHz clock, differential at 5 volt swings, >> and radiates too much. >> >> We can't lowpass filter the fundamental of course. We can't drop the >> amplitude much. A common-mode balun might help some. > >if it is balanced why do you need such a massive swing? > >
The original design, about 10 years ago, used a big swing and a receive-end attenuator to give a lot of common-mode rejection against ground loops. This system is spread over floors of a big expensive building. We were exempt from EMI standards then.
"John Miles, KE5FX" <jmiles@gmail.com> wrote:

> On Wednesday, November 2, 2022 at 8:00:11 PM UTC-7, John Larkin wrote: >> We make a bunch of boxes that go into a semi fab tool. One measures an >> optical waveform and shoots it to a bigger box, over three twisted >> pairs (clock, data, data) using shielded RJ45 ethernet type stuff. >> > > Probably a dumb question, but those clock and data signals are source- > terminated to drive ~100 ohms, right? If you have standing waves > on the wire pairs, I can see them exciting the ungrounded shield at the > current points, making a very effective antenna. Radiation from the > cable could easily be 30 dB worse than expected. > > -- john, KE5FX
Cat 8 requires shield grounding. Example: LINKUP &#4294967295; [40Gbps Certified] Cat8 Ethernet Patch Cable Double Shielded?2000MHz (2GHz) CAD$21.96 https://www.amazon.ca/LINKUP-Ethernet-Screened-Stranded-Structure/dp/B08GCV 59L7/ Signal cables The best way to wire shielded cables for screening is to ground the shield at both ends of the cable.[6] Traditionally there existed a rule of thumb to ground only the source end of the shield to avoid ground loops. Best practice is to ground at both ends, but there is a possibility of ground loops. In airplanes, special cable is used with both an outer shield to protect against lightning and an inner shield grounded at one end to eliminate hum from the 400 Hz power system https://en.wikipedia.org/wiki/Shielded_cable JL likes to leave things ungrounded to increase the fun of troubleshooting. -- MRM
On Wed, 9 Nov 2022 21:35:34 -0000 (UTC), Mike Monett VE3BTI
<spamme@not.com> wrote:

>"John Miles, KE5FX" <jmiles@gmail.com> wrote: > >> On Wednesday, November 2, 2022 at 8:00:11 PM UTC-7, John Larkin wrote: >>> We make a bunch of boxes that go into a semi fab tool. One measures an >>> optical waveform and shoots it to a bigger box, over three twisted >>> pairs (clock, data, data) using shielded RJ45 ethernet type stuff. >>> >> >> Probably a dumb question, but those clock and data signals are source- >> terminated to drive ~100 ohms, right? If you have standing waves >> on the wire pairs, I can see them exciting the ungrounded shield at the >> current points, making a very effective antenna. Radiation from the >> cable could easily be 30 dB worse than expected. >> >> -- john, KE5FX > >Cat 8 requires shield grounding. Example: > >LINKUP &#4294967295; [40Gbps Certified] Cat8 Ethernet Patch Cable Double >Shielded?2000MHz (2GHz) CAD$21.96 > >https://www.amazon.ca/LINKUP-Ethernet-Screened-Stranded-Structure/dp/B08GCV >59L7/ > >Signal cables > >The best way to wire shielded cables for screening is to ground the shield >at both ends of the cable.[6] Traditionally there existed a rule of thumb >to ground only the source end of the shield to avoid ground loops. Best >practice is to ground at both ends, but there is a possibility of ground >loops. In airplanes, special cable is used with both an outer shield to >protect against lightning and an inner shield grounded at one end to >eliminate hum from the 400 Hz power system > >https://en.wikipedia.org/wiki/Shielded_cable > >JL likes to leave things ungrounded to increase the fun of >troubleshooting.
Who told you that? My policy is to chassis ground everything everywhere possible. That includes PCB ground planes, grounded at every mounting spacer and every connector shell and every heat sink. "Avoid ground loops" makes no sense for fast stuff, and doesn't even make sense for audio or thermocouples.