simulating TI switchers

On Mon, 24 Oct 2022 13:14:03 -0700 (PDT), Lasse Langwadt Christensen
<langwadt@fonz.dk> wrote:

>mandag den 24. oktober 2022 kl. 21.41.25 UTC+2 skrev John Larkin:
>> On Sun, 23 Oct 2022 18:21:37 -0400, Phil Hobbs 
>> <pcdhSpamM...@electrooptical.net> wrote: 
>> 
>> >John Larkin wrote: 
>> >> On Fri, 21 Oct 2022 12:02:17 -0700, John Larkin 
>> >> <jlarkin@highland_atwork_technology.com> wrote: 
>> >> 
>> >>> On Fri, 21 Oct 2022 08:38:59 -0700 (PDT), Fred Bloggs 
>> >>> <bloggs.fred...@gmail.com> wrote: 
>> >>> 
>> >>>> On Thursday, October 20, 2022 at 7:28:14 PM UTC-4, John Larkin wrote: 
>> >>>>> We are using TPS54302 and TPS562208. I haven't been able to get their 
>> >>>>> Pspice models to work in LT Spice. They throw goofy errors, or run but 
>> >>>>> at fs speeds and make no useful progress. 
>> >>>>> 
>> >>>>> TI apparently has their own sim, Cadence maybe, that might run these 
>> >>>>> parts. 
>> >>>>> 
>> >>>>> Does anyone know how to do that, run the TI models with the TI 
>> >>>>> software? Or to get the Pspice models to run usefully in LT Spice? 
>> >>>>> 
>> >>>>> We have a few situations I'd like to check for load step response and 
>> >>>>> maybe feedforward compensation in the feedback divider. We could pay a 
>> >>>>> consultant to help, to save us breadboarding time. 
>> >>>> 
>> >>>> They used to use TINA. 
>> >>> 
>> >>> That's being phased out. 
>> >>> 
>> >>> One of my guys installed their (brain-damaged) version of Pspice and 
>> >>> it looks like it will work to sim our weird switchers. Of course my 
>> >>> secondary switchers present a negative impedance load to the first 
>> >>> one, so we'll have to sim all four together. Even funner. 
>> >>> 
>> >>> 
>> >> 
>> >> A single switcher runs at about a minute per millisecond. Four 
>> >> together will run a couple of useful sims per day, if that. 
>> >> 
>> > 
>> >Aren't there any eval boards? 
>> > 
>> >Cheers 
>> > 
>> >Phil Hobbs
>> We have a couple. What I want to do is test my primary switcher, 12 or 
>> 24 volts down to +5, and then the three secondary switchers to 3.3, 
>> 1.8, and 1.0. The secondaries will present a negative load impedance 
>> to the primary, and we'll have a mess of bypass caps and ferrite beads 
>> everywhere. 
>> 
>> I really want to sim all that, but we'll breadboard if we have to. 
>> It's about worth a proto board PCB layout. Eval boards are messy, 
>> every possible jumper option.
>
>JLPCB has both in stock for assembly, so you could probably get 5 board with parts and assembly for $50 in a week

It would be convenient to buy a few boards assembled, but we could
assemble them here. The PCB layout would be a minor nuisance, annoying
because the TI sim is unusably slow.