On Tue, 22 Jun 2021 10:39:42 -0400, legg <legg@nospam.magma.ca> wrote:>On Mon, 21 Jun 2021 15:15:30 -0700, John Larkin ><jjlarkin@highlandtechnology.com> wrote: > >>On Mon, 21 Jun 2021 16:50:04 -0400, legg <legg@nospam.magma.ca> wrote: >> >>>On Mon, 21 Jun 2021 11:00:18 -0700, John Larkin >>><jjlarkin@highlandtechnology.com> wrote: >>> >>>>On Mon, 21 Jun 2021 19:44:55 +0200, Piotr Wyderski >>>><bombald@protonmail.com> wrote: >>>> >>>>>John Larkin wrote: >>>>> >>>>>> I'm not having much luck searching for isolated-tab mosfets. Ideal >>>>>> would be a dpak n-channel. Any suggestions? >>>>> >>>>>Are there any SMD parts with isolated tab? That would be interesting. >>>>>OTOH, a ceramic tab made of AlN shouldn't be that expensive and the >>>>>thermal parameters would be great. >>>>> >>>>> Best regards, Piotr >>>> >>>>There are TO-220s with isolated tabs. >>>> >>>>I'll be using two n-fets per channel, in a multichannel programmable >>>>load board. If they were isolated, a pair of fets could share heat >>>>sinking. >>>> >>>>Isolated DPAKs with the solder-on straddling heat sinks would be >>>>ideal, all surface mount. >>> >>>Isolated surface-mount parts that share a heatsink. >>> >>>Surface mount heat sink - it does not compute. >>> >>>RL >> >>There are tons of heat sinks in this style: >> >>https://www.digikey.com/en/products/detail/aavid-thermal-division-of-boyd-corporation/573400D00000G/1625551 >> >>https://www.digikey.com/en/products/detail/wakefield-vette/217-36CTE6/1033769 >> >>They straddle a DPAK on the board. One pass through the reflow oven >>can solder the fet and the heat sink. >> >>My programmable load circuit sinks AC or DC. It uses two mosfets. If >>the source is AC, they share the dissipation. If DC, only one gets >>hot. So it would be great to share the heat sinking. >> >>Using two non-isolated fets and two heat sinks, the trick would be to >>transfer heat between the two but keep them insulated. That could >>work. > >I have only used those types of parts in situations where, in the >past, a clip-on might be used for through-hole parts.Nothing over >a watt or two. None are made for coupling heat sources of > significance. They are expensive, difficult to reflow and >largely ineffective without forced air. > >I've only used isolated TO220 (not TO263) where emc prohibited >capacitive coupling - and then only TO220F (plastic) - nothing with >an internal ceramic wafer ($$$)- something you'd need to retain >the SMD mounting methods of TO263 (D2). > >AC applications will distribute heat because they are AC. If you >mean reversible DC, then equal heat distribution is worth >persuing.Right. I have an AC/DC dummy load circuit with two mosfets. With DC, one of them dissipates all the heat.> >You seem to have a lot of small heat sources in mind. These are >the kind that are least affected by an electrical isolation barrier.8 loads on a board roughy 3x12 inches, two fets per load, good air flow. But the more power we can spec it for, the more people might buy it. There are no doubt better thermally conductive laminates than FR4, but I'd rather try cleverness first.> >RL-- John Larkin Highland Technology, Inc The best designs are necessarily accidental.
isolated mosfets
Started by ●June 21, 2021
Reply by ●June 22, 20212021-06-22
Reply by ●June 22, 20212021-06-22
On Tue, 22 Jun 2021 18:31:59 +0200, Piotr Wyderski <bombald@protonmail.com> wrote:>legg wrote: > >> Isolated surface-mount parts that share a heatsink. >> >> Surface mount heat sink - it does not compute. > >Actually, it does. In one of my projects I had a very similar set or >requirements. A ceramic substrate PCB, ideally made of AlN, would be a >perfect solution -- it is a great insulator and a decent heat conductor. >Unfortunately, even the price of alumina turned out to be a killer. > > Best regards, PiotrAlN is magical, but it would be insanely expensive to make a pcb with it. Individual AlN insulators, TO-220 size or so, are cheap. AlN conducts heat about as well as the average aluminum alloy. I could use two TO-220s with AlN insulators per channel, maybe all 16 fets on one giant heat sink, but that's labor intensive.
Reply by ●June 23, 20212021-06-23
On Tue, 22 Jun 2021 07:08:10 -0700, jlarkin@highlandsniptechnology.com wrote:>On Mon, 21 Jun 2021 21:25:38 -0700, boB <boB@K7IQ.com> wrote: > >>On Mon, 21 Jun 2021 15:15:30 -0700, John Larkin >><jjlarkin@highlandtechnology.com> wrote: >> >>>On Mon, 21 Jun 2021 16:50:04 -0400, legg <legg@nospam.magma.ca> wrote: >>> >>>>On Mon, 21 Jun 2021 11:00:18 -0700, John Larkin >>>><jjlarkin@highlandtechnology.com> wrote: >>>> >>>>>On Mon, 21 Jun 2021 19:44:55 +0200, Piotr Wyderski >>>>><bombald@protonmail.com> wrote: >>>>> >>>>>>John Larkin wrote: >>>>>> >>>>>>> I'm not having much luck searching for isolated-tab mosfets. Ideal >>>>>>> would be a dpak n-channel. Any suggestions? >>>>>> >>>>>>Are there any SMD parts with isolated tab? That would be interesting. >>>>>>OTOH, a ceramic tab made of AlN shouldn't be that expensive and the >>>>>>thermal parameters would be great. >>>>>> >>>>>> Best regards, Piotr >>>>> >>>>>There are TO-220s with isolated tabs. >>>>> >>>>>I'll be using two n-fets per channel, in a multichannel programmable >>>>>load board. If they were isolated, a pair of fets could share heat >>>>>sinking. >>>>> >>>>>Isolated DPAKs with the solder-on straddling heat sinks would be >>>>>ideal, all surface mount. >>>> >>>>Isolated surface-mount parts that share a heatsink. >>>> >>>>Surface mount heat sink - it does not compute. >>>> >>>>RL >>> >>>There are tons of heat sinks in this style: >>> >>>https://www.digikey.com/en/products/detail/aavid-thermal-division-of-boyd-corporation/573400D00000G/1625551 >>> >>>https://www.digikey.com/en/products/detail/wakefield-vette/217-36CTE6/1033769 >>> >>>They straddle a DPAK on the board. One pass through the reflow oven >>>can solder the fet and the heat sink. >>> >>>My programmable load circuit sinks AC or DC. It uses two mosfets. If >>>the source is AC, they share the dissipation. If DC, only one gets >>>hot. So it would be great to share the heat sinking. >>> >>>Using two non-isolated fets and two heat sinks, the trick would be to >>>transfer heat between the two but keep them insulated. That could >>>work. >> >> >>There are lots of isolated tab D-Squared paks (TO-263 ?) Most we >>use will have a TO-220 and D-Squared package with the same die. >> >>We also use D-Pak N channel FETs and P channel D-Pak FETs. >> >>Look at IRF part numbers for D-Pak as I remember that we use. > >I can't find any isolated dpak fets. Got any part numbers? > >There are isolated TO-220s, mostly obsolete. But if I use TO-220s, I >can bolt them to a big heat sink with insulators. Last resort. > >Some PCB layout tricks might couple them thermally but provide >insulation. Not perfect, but better than nothing. > >> >>And you can heat sink D2Pak FETs. Just have to think about it. >>We do kilo-watts with D-Squared isolated. 7 lead and 3 lead with the >>middle lead missing of course. > >Got part numbers?Uh OH ! My brain COMPLETELY farted ! Either that or I was drunk. But I don't even drink ! For some reason I got isolated and non-isolated reversed ! Ooops. Sorry. I have used isolated TO-220s before but I don't think I have seen an isolated DPAK either.
Reply by ●June 23, 20212021-06-23
On Tue, 22 Jun 2021 21:55:59 -0700, boB <boB@K7IQ.com> wrote:>On Tue, 22 Jun 2021 07:08:10 -0700, jlarkin@highlandsniptechnology.com >wrote: > >>On Mon, 21 Jun 2021 21:25:38 -0700, boB <boB@K7IQ.com> wrote: >> >>>On Mon, 21 Jun 2021 15:15:30 -0700, John Larkin >>><jjlarkin@highlandtechnology.com> wrote: >>> >>>>On Mon, 21 Jun 2021 16:50:04 -0400, legg <legg@nospam.magma.ca> wrote: >>>> >>>>>On Mon, 21 Jun 2021 11:00:18 -0700, John Larkin >>>>><jjlarkin@highlandtechnology.com> wrote: >>>>> >>>>>>On Mon, 21 Jun 2021 19:44:55 +0200, Piotr Wyderski >>>>>><bombald@protonmail.com> wrote: >>>>>> >>>>>>>John Larkin wrote: >>>>>>> >>>>>>>> I'm not having much luck searching for isolated-tab mosfets. Ideal >>>>>>>> would be a dpak n-channel. Any suggestions? >>>>>>> >>>>>>>Are there any SMD parts with isolated tab? That would be interesting. >>>>>>>OTOH, a ceramic tab made of AlN shouldn't be that expensive and the >>>>>>>thermal parameters would be great. >>>>>>> >>>>>>> Best regards, Piotr >>>>>> >>>>>>There are TO-220s with isolated tabs. >>>>>> >>>>>>I'll be using two n-fets per channel, in a multichannel programmable >>>>>>load board. If they were isolated, a pair of fets could share heat >>>>>>sinking. >>>>>> >>>>>>Isolated DPAKs with the solder-on straddling heat sinks would be >>>>>>ideal, all surface mount. >>>>> >>>>>Isolated surface-mount parts that share a heatsink. >>>>> >>>>>Surface mount heat sink - it does not compute. >>>>> >>>>>RL >>>> >>>>There are tons of heat sinks in this style: >>>> >>>>https://www.digikey.com/en/products/detail/aavid-thermal-division-of-boyd-corporation/573400D00000G/1625551 >>>> >>>>https://www.digikey.com/en/products/detail/wakefield-vette/217-36CTE6/1033769 >>>> >>>>They straddle a DPAK on the board. One pass through the reflow oven >>>>can solder the fet and the heat sink. >>>> >>>>My programmable load circuit sinks AC or DC. It uses two mosfets. If >>>>the source is AC, they share the dissipation. If DC, only one gets >>>>hot. So it would be great to share the heat sinking. >>>> >>>>Using two non-isolated fets and two heat sinks, the trick would be to >>>>transfer heat between the two but keep them insulated. That could >>>>work. >>> >>> >>>There are lots of isolated tab D-Squared paks (TO-263 ?) Most we >>>use will have a TO-220 and D-Squared package with the same die. >>> >>>We also use D-Pak N channel FETs and P channel D-Pak FETs. >>> >>>Look at IRF part numbers for D-Pak as I remember that we use. >> >>I can't find any isolated dpak fets. Got any part numbers? >> >>There are isolated TO-220s, mostly obsolete. But if I use TO-220s, I >>can bolt them to a big heat sink with insulators. Last resort. >> >>Some PCB layout tricks might couple them thermally but provide >>insulation. Not perfect, but better than nothing. >> >>> >>>And you can heat sink D2Pak FETs. Just have to think about it. >>>We do kilo-watts with D-Squared isolated. 7 lead and 3 lead with the >>>middle lead missing of course. >> >>Got part numbers? > >Uh OH ! My brain COMPLETELY farted ! > >Either that or I was drunk. But I don't even drink ! > >For some reason I got isolated and non-isolated reversed ! > >Ooops. Sorry. > >I have used isolated TO-220s before but I don't think I have seen an >isolated DPAK either. > >Thinking about this again... If a D-Pak has the middle drain pin cut, same as a typical TO-263 D2PAK, how would you access the drain except by the tab ?>
Reply by ●June 23, 20212021-06-23
On Mon, 21 Jun 2021 10:33:53 -0700, John Larkin <jjlarkin@highlandtechnology.com> wrote:>I'm not having much luck searching for isolated-tab mosfets. Ideal >would be a dpak n-channel. Any suggestions?I might do this with ordinary dpak or d2 fets: https://www.dropbox.com/s/3ux357nmpyh7i59/Dpak_Heat_Sink_1.jpg?raw=1 If the fets could be made isothermal somehow, it would double the heat sinking when one is doing all the work. Dream on. They are being thermally shunted mostly by the layer 2 ground plane. I can make that 2 oz copper and make the 1/2 dielectric thin. I can via down to pours on layer 6, which will help a little. Long vias don't conduct heat very well. I think I can model this in LT Spice, with lots of resistors. I wonder if I can make layer 1 from 2 oz copper... I will have a bga FPGA too, FTG256 package but not many balls used. -- John Larkin Highland Technology, Inc The best designs are necessarily accidental.
Reply by ●June 23, 20212021-06-23
On Tue, 22 Jun 2021 23:40:12 -0700, boB <boB@K7IQ.com> wrote:>On Tue, 22 Jun 2021 21:55:59 -0700, boB <boB@K7IQ.com> wrote: > >>On Tue, 22 Jun 2021 07:08:10 -0700, jlarkin@highlandsniptechnology.com >>wrote: >> >>>On Mon, 21 Jun 2021 21:25:38 -0700, boB <boB@K7IQ.com> wrote: >>> >>>>On Mon, 21 Jun 2021 15:15:30 -0700, John Larkin >>>><jjlarkin@highlandtechnology.com> wrote: >>>> >>>>>On Mon, 21 Jun 2021 16:50:04 -0400, legg <legg@nospam.magma.ca> wrote: >>>>> >>>>>>On Mon, 21 Jun 2021 11:00:18 -0700, John Larkin >>>>>><jjlarkin@highlandtechnology.com> wrote: >>>>>> >>>>>>>On Mon, 21 Jun 2021 19:44:55 +0200, Piotr Wyderski >>>>>>><bombald@protonmail.com> wrote: >>>>>>> >>>>>>>>John Larkin wrote: >>>>>>>> >>>>>>>>> I'm not having much luck searching for isolated-tab mosfets. Ideal >>>>>>>>> would be a dpak n-channel. Any suggestions? >>>>>>>> >>>>>>>>Are there any SMD parts with isolated tab? That would be interesting. >>>>>>>>OTOH, a ceramic tab made of AlN shouldn't be that expensive and the >>>>>>>>thermal parameters would be great. >>>>>>>> >>>>>>>> Best regards, Piotr >>>>>>> >>>>>>>There are TO-220s with isolated tabs. >>>>>>> >>>>>>>I'll be using two n-fets per channel, in a multichannel programmable >>>>>>>load board. If they were isolated, a pair of fets could share heat >>>>>>>sinking. >>>>>>> >>>>>>>Isolated DPAKs with the solder-on straddling heat sinks would be >>>>>>>ideal, all surface mount. >>>>>> >>>>>>Isolated surface-mount parts that share a heatsink. >>>>>> >>>>>>Surface mount heat sink - it does not compute. >>>>>> >>>>>>RL >>>>> >>>>>There are tons of heat sinks in this style: >>>>> >>>>>https://www.digikey.com/en/products/detail/aavid-thermal-division-of-boyd-corporation/573400D00000G/1625551 >>>>> >>>>>https://www.digikey.com/en/products/detail/wakefield-vette/217-36CTE6/1033769 >>>>> >>>>>They straddle a DPAK on the board. One pass through the reflow oven >>>>>can solder the fet and the heat sink. >>>>> >>>>>My programmable load circuit sinks AC or DC. It uses two mosfets. If >>>>>the source is AC, they share the dissipation. If DC, only one gets >>>>>hot. So it would be great to share the heat sinking. >>>>> >>>>>Using two non-isolated fets and two heat sinks, the trick would be to >>>>>transfer heat between the two but keep them insulated. That could >>>>>work. >>>> >>>> >>>>There are lots of isolated tab D-Squared paks (TO-263 ?) Most we >>>>use will have a TO-220 and D-Squared package with the same die. >>>> >>>>We also use D-Pak N channel FETs and P channel D-Pak FETs. >>>> >>>>Look at IRF part numbers for D-Pak as I remember that we use. >>> >>>I can't find any isolated dpak fets. Got any part numbers? >>> >>>There are isolated TO-220s, mostly obsolete. But if I use TO-220s, I >>>can bolt them to a big heat sink with insulators. Last resort. >>> >>>Some PCB layout tricks might couple them thermally but provide >>>insulation. Not perfect, but better than nothing. >>> >>>> >>>>And you can heat sink D2Pak FETs. Just have to think about it. >>>>We do kilo-watts with D-Squared isolated. 7 lead and 3 lead with the >>>>middle lead missing of course. >>> >>>Got part numbers? >> >>Uh OH ! My brain COMPLETELY farted ! >> >>Either that or I was drunk. But I don't even drink ! >> >>For some reason I got isolated and non-isolated reversed ! >> >>Ooops. Sorry. >> >>I have used isolated TO-220s before but I don't think I have seen an >>isolated DPAK either. >> >> > >Thinking about this again... If a D-Pak has the middle drain pin >cut, same as a typical TO-263 D2PAK, how would you access the drain >except by the tab ? >It would need a middle pin. There are some isolated-tab power opamps around, so it's not impossible. But I'd better work with standard parts to be safe. -- John Larkin Highland Technology, Inc The best designs are necessarily accidental.
Reply by ●June 23, 20212021-06-23
onsdag den 23. juni 2021 kl. 17.45.21 UTC+2 skrev jla...@highlandsniptechnology.com:> On Mon, 21 Jun 2021 10:33:53 -0700, John Larkin > <jjla...@highlandtechnology.com> wrote: > > >I'm not having much luck searching for isolated-tab mosfets. Ideal > >would be a dpak n-channel. Any suggestions? > I might do this with ordinary dpak or d2 fets: > > https://www.dropbox.com/s/3ux357nmpyh7i59/Dpak_Heat_Sink_1.jpg?raw=1 > > If the fets could be made isothermal somehow, it would double the heat > sinking when one is doing all the work. Dream on. > > They are being thermally shunted mostly by the layer 2 ground plane. I > can make that 2 oz copper and make the 1/2 dielectric thin. > > I can via down to pours on layer 6, which will help a little. Long > vias don't conduct heat very well. > > I think I can model this in LT Spice, with lots of resistors. > > I wonder if I can make layer 1 from 2 oz copper... I will have a bga > FPGA too, FTG256 package but not many balls used. > --expensive but, https://www.digikey.com/en/products/detail/vishay-dale-thin-film/THJP1206ABT1/11313317
Reply by ●June 23, 20212021-06-23
On Wed, 23 Jun 2021 09:25:06 -0700 (PDT), Lasse Langwadt Christensen <langwadt@fonz.dk> wrote:>onsdag den 23. juni 2021 kl. 17.45.21 UTC+2 skrev jla...@highlandsniptechnology.com: >> On Mon, 21 Jun 2021 10:33:53 -0700, John Larkin >> <jjla...@highlandtechnology.com> wrote: >> >> >I'm not having much luck searching for isolated-tab mosfets. Ideal >> >would be a dpak n-channel. Any suggestions? >> I might do this with ordinary dpak or d2 fets: >> >> https://www.dropbox.com/s/3ux357nmpyh7i59/Dpak_Heat_Sink_1.jpg?raw=1 >> >> If the fets could be made isothermal somehow, it would double the heat >> sinking when one is doing all the work. Dream on. >> >> They are being thermally shunted mostly by the layer 2 ground plane. I >> can make that 2 oz copper and make the 1/2 dielectric thin. >> >> I can via down to pours on layer 6, which will help a little. Long >> vias don't conduct heat very well. >> >> I think I can model this in LT Spice, with lots of resistors. >> >> I wonder if I can make layer 1 from 2 oz copper... I will have a bga >> FPGA too, FTG256 package but not many balls used. >> -- > >expensive but, https://www.digikey.com/en/products/detail/vishay-dale-thin-film/THJP1206ABT1/11313317 > > >Maybe they could bridge the gap between the two fets. Heat would be concentrated in the small pad area, so it would be best to use several of these along the gap. The 0612 version is 4 k/w, so two or three of those might be pretty good, with 2 oz copper. -- John Larkin Highland Technology, Inc The best designs are necessarily accidental.
Reply by ●June 23, 20212021-06-23
On Wed, 23 Jun 2021 09:25:06 -0700 (PDT), Lasse Langwadt Christensen <langwadt@fonz.dk> wrote:>onsdag den 23. juni 2021 kl. 17.45.21 UTC+2 skrev jla...@highlandsniptechnology.com: >> On Mon, 21 Jun 2021 10:33:53 -0700, John Larkin >> <jjla...@highlandtechnology.com> wrote: >> >> >I'm not having much luck searching for isolated-tab mosfets. Ideal >> >would be a dpak n-channel. Any suggestions? >> I might do this with ordinary dpak or d2 fets: >> >> https://www.dropbox.com/s/3ux357nmpyh7i59/Dpak_Heat_Sink_1.jpg?raw=1 >> >> If the fets could be made isothermal somehow, it would double the heat >> sinking when one is doing all the work. Dream on. >> >> They are being thermally shunted mostly by the layer 2 ground plane. I >> can make that 2 oz copper and make the 1/2 dielectric thin. >> >> I can via down to pours on layer 6, which will help a little. Long >> vias don't conduct heat very well. >> >> I think I can model this in LT Spice, with lots of resistors. >> >> I wonder if I can make layer 1 from 2 oz copper... I will have a bga >> FPGA too, FTG256 package but not many balls used. >> -- > >expensive but, https://www.digikey.com/en/products/detail/vishay-dale-thin-film/THJP1206ABT1/11313317 > > >https://www.mouser.com/ProductDetail/Welwyn-Components-TT-Electronics/TJC0612LF-T3?qs=T3oQrply3y9aw42O4j9OUQ%3D%3D That's 4.6 k/w and not crazy expensive. Pick and place. -- John Larkin Highland Technology, Inc The best designs are necessarily accidental.
Reply by ●June 23, 20212021-06-23
onsdag den 23. juni 2021 kl. 18.42.46 UTC+2 skrev jla...@highlandsniptechnology.com:> On Wed, 23 Jun 2021 09:25:06 -0700 (PDT), Lasse Langwadt Christensen > <lang...@fonz.dk> wrote: > > >onsdag den 23. juni 2021 kl. 17.45.21 UTC+2 skrev jla...@highlandsniptechnology.com: > >> On Mon, 21 Jun 2021 10:33:53 -0700, John Larkin > >> <jjla...@highlandtechnology.com> wrote: > >> > >> >I'm not having much luck searching for isolated-tab mosfets. Ideal > >> >would be a dpak n-channel. Any suggestions? > >> I might do this with ordinary dpak or d2 fets: > >> > >> https://www.dropbox.com/s/3ux357nmpyh7i59/Dpak_Heat_Sink_1.jpg?raw=1 > >> > >> If the fets could be made isothermal somehow, it would double the heat > >> sinking when one is doing all the work. Dream on. > >> > >> They are being thermally shunted mostly by the layer 2 ground plane. I > >> can make that 2 oz copper and make the 1/2 dielectric thin. > >> > >> I can via down to pours on layer 6, which will help a little. Long > >> vias don't conduct heat very well. > >> > >> I think I can model this in LT Spice, with lots of resistors. > >> > >> I wonder if I can make layer 1 from 2 oz copper... I will have a bga > >> FPGA too, FTG256 package but not many balls used. > >> -- > > > >expensive but, https://www.digikey.com/en/products/detail/vishay-dale-thin-film/THJP1206ABT1/11313317 > > > > > > > Maybe they could bridge the gap between the two fets. Heat would be > concentrated in the small pad area, so it would be best to use several > of these along the gap. > > The 0612 version is 4 k/w, so two or three of those might be pretty > good, with 2 oz copper.how about two duals like this http://www.farnell.com/datasheets/2200463.pdf parallel one from a each so heat split between packages
