The datasheet of C3M0065090J says its VGSmax is -4/+15V, but Note (2) says the "MOSFET can also safely operate at 0/15V." What is "safely" supposed to mean? As safely as a Si MOSFET with no negative gate voltage? Could you please share your opinion on SiC device driving based on your actual experience? Best regards, Piotr
Negative VG for SiC MOSFETs
Started by ●December 13, 2018
Reply by ●December 13, 20182018-12-13
On Thu, 13 Dec 2018 09:01:11 +0100, Piotr Wyderski <peter.pan@neverland.mil> wrote:>The datasheet of C3M0065090J says its VGSmax is -4/+15V, but Note (2) >says the "MOSFET can also safely operate at 0/15V." What is "safely" >supposed to mean? As safely as a Si MOSFET with no negative gate >voltage? Could you please share your opinion on SiC device driving >based on your actual experience? > > Best regards, PiotrI'm driving the Cree parts at +20 and -6, pulsing real fast, in the 10 ns pulse width range at over 1KV. If you don't need to go as fast, you can probably do fine without driving the gate negative. We found that negative swing speeds up the switching edges. Running at high frequency, negative swing will speed up turn-off and overcome Miller feedback and reduce switching losses. What's your frequency? I blew up some Crees driving the gates too hard. They are serious about the Vgs-max numbers. A little series inductive peaking helps too, to critically damp the actual internal gate pulse. SiC fets tend to have more internal gate series resistance than mosfets; some are terrible. That's probably why the negative gate swing helps. We had to make our own gate driver circuits to slam the Cree gates really fast, amps per nanosecond. Can't show that. The substrate diodes, and their Spice models, are awful. -- John Larkin Highland Technology, Inc picosecond timing precision measurement jlarkin att highlandtechnology dott com http://www.highlandtechnology.com
Reply by ●December 13, 20182018-12-13
John Larkin wrote:> Running at high frequency, negative swing will speed up turn-off and > overcome Miller feedback and reduce switching losses. What's your > frequency?<=300kHz. I'm really there because of the high VDS_max, insanely low R_DS_on and low Qrr. This will allow me to bulid a bridgeless PFC aimed at ~700V. The GaN parts are only available up to 650V, way too expensive and there are long-term reliability concerns. Hence the SiC parts. I just want to drive them properly, but not in an excessively complex way. The SiC MOSFET-JFET cascodes are also an option, but I would like to use a purely SiC part if it can be driven in a sane way. 0/+15V is sane.> We had to make our own gate driver circuits to slam the Cree gates > really fast, amps per nanosecond. Can't show that.No problem, I'm not even remotely close to this switching speed requirements. BTW, the market demand is surprisingly high, it's hard to buy these parts. Best regards, Piotr
Reply by ●December 13, 20182018-12-13
On Thu, 13 Dec 2018 21:29:27 +0100, Piotr Wyderski <peter.pan@neverland.mil> wrote:>John Larkin wrote: > >> Running at high frequency, negative swing will speed up turn-off and >> overcome Miller feedback and reduce switching losses. What's your >> frequency? > ><=300kHz. I'm really there because of the high VDS_max, insanely >low R_DS_on and low Qrr. This will allow me to bulid a bridgeless >PFC aimed at ~700V. The GaN parts are only available up to 650V, >way too expensive and there are long-term reliability concerns.SiC fets avalanche politely like a good mosfet. GaN, when over-voltaged, just dies. I have some numbers on that. We use GaN for fast switching at lower voltages. They only need maybe 5 volts of gate drive.>Hence the SiC parts. I just want to drive them properly, but not >in an excessively complex way. The SiC MOSFET-JFET cascodes are >also an option, but I would like to use a purely SiC part if it >can be driven in a sane way. 0/+15V is sane.You can use a commodity gate driver at your speeds. I found the Cree Spice models to be pretty good (excepting that substrate diode) so you could experiment with whether negative gate drive is worth it. The cascode specs aren't impressive so far.> >> We had to make our own gate driver circuits to slam the Cree gates >> really fast, amps per nanosecond. Can't show that. > >No problem, I'm not even remotely close to this switching speed >requirements. > >BTW, the market demand is surprisingly high, it's hard to >buy these parts. > > Best regards, PiotrWe noticed that. I think there's a lot of automotive use. ST has some nice SiC fets. OK Rds-on but an impressively flat tempco of same, so they beat the Crees at high current. The SiC chips are tiny, so cooling is a problem. Thermal runaway from the Rds-on tempco is possible in the Crees. https://www.dropbox.com/s/hnu2b7qlfw98bwq/Cree_Chip.JPG?dl=0 That's a C2M0280120. Putting that tiny chip in a TO247 package is kind of silly. -- John Larkin Highland Technology, Inc picosecond timing precision measurement jlarkin att highlandtechnology dott com http://www.highlandtechnology.com
