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FPGA as heater

Started by John Larkin April 10, 2017
We have a ZYNQ whose predicted timing isn't meeting decent margins.
And we don't want a lot of output pin timing variation in real life.

We can measure the chip temperature with the XADC thing. So, why not
make an on-chip heater? Use a PLL to clock a bunch of flops, and vary
the PLL output frequency to keep the chip temp roughly constant.


-- 

John Larkin         Highland Technology, Inc
picosecond timing   precision measurement 

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com

On Mon, 10 Apr 2017 18:13:13 -0700, John Larkin
<jjlarkin@highland_snip_technology.com> wrote:

>We have a ZYNQ whose predicted timing isn't meeting decent margins. >And we don't want a lot of output pin timing variation in real life. > >We can measure the chip temperature with the XADC thing. So, why not >make an on-chip heater? Use a PLL to clock a bunch of flops, and vary >the PLL output frequency to keep the chip temp roughly constant.
Why not? Don't bother with the output frequency, just vary the number of flops wiggling.
On Mon, 10 Apr 2017 22:15:50 -0400, krw@notreal.com wrote:

>On Mon, 10 Apr 2017 18:13:13 -0700, John Larkin ><jjlarkin@highland_snip_technology.com> wrote: > >>We have a ZYNQ whose predicted timing isn't meeting decent margins. >>And we don't want a lot of output pin timing variation in real life. >> >>We can measure the chip temperature with the XADC thing. So, why not >>make an on-chip heater? Use a PLL to clock a bunch of flops, and vary >>the PLL output frequency to keep the chip temp roughly constant. > >Why not? Don't bother with the output frequency, just vary the number >of flops wiggling.
That would work too. Maybe have a 2-bit heat control word, to get coarse steps of power dissipation, 4 groups of flops. I suppose a single on-off bit could be a simple bang-bang thermostat. The PLL thing would be elegant, proportional control of all the flops in the distributed heater array. I'm thinking we could reduce the overall effect of ambient temp changes by some healthy factor, 4:1 or 10:1 or something. -- John Larkin Highland Technology, Inc lunatic fringe electronics
On 4/10/2017 11:06 PM, John Larkin wrote:
> On Mon, 10 Apr 2017 22:15:50 -0400, krw@notreal.com wrote: > >> On Mon, 10 Apr 2017 18:13:13 -0700, John Larkin >> <jjlarkin@highland_snip_technology.com> wrote: >> >>> We have a ZYNQ whose predicted timing isn't meeting decent margins. >>> And we don't want a lot of output pin timing variation in real life. >>> >>> We can measure the chip temperature with the XADC thing. So, why not >>> make an on-chip heater? Use a PLL to clock a bunch of flops, and vary >>> the PLL output frequency to keep the chip temp roughly constant. >> >> Why not? Don't bother with the output frequency, just vary the number >> of flops wiggling. > > That would work too. Maybe have a 2-bit heat control word, to get > coarse steps of power dissipation, 4 groups of flops. I suppose a > single on-off bit could be a simple bang-bang thermostat. > > The PLL thing would be elegant, proportional control of all the flops > in the distributed heater array. > > I'm thinking we could reduce the overall effect of ambient temp > changes by some healthy factor, 4:1 or 10:1 or something.
Are the die temperature variations caused by ambient temp changes, or on chip heat generation changes? -- Rick C
On Mon, 10 Apr 2017 18:13:13 -0700, the renowned John Larkin
<jjlarkin@highland_snip_technology.com> wrote:

>We have a ZYNQ whose predicted timing isn't meeting decent margins. >And we don't want a lot of output pin timing variation in real life. > >We can measure the chip temperature with the XADC thing. So, why not >make an on-chip heater? Use a PLL to clock a bunch of flops, and vary >the PLL output frequency to keep the chip temp roughly constant.
Clever, and maybe patentable. Maybe you could servo a ring oscillator frequency to the clock by changing the dissipation and directly stabilize the timing. --sp -- Best regards, Spehro Pefhany
On Tue, 11 Apr 2017 00:26:33 -0400, Spehro Pefhany
<speffSNIP@interlogDOTyou.knowwhat> wrote:

>On Mon, 10 Apr 2017 18:13:13 -0700, the renowned John Larkin ><jjlarkin@highland_snip_technology.com> wrote: > >>We have a ZYNQ whose predicted timing isn't meeting decent margins. >>And we don't want a lot of output pin timing variation in real life. >> >>We can measure the chip temperature with the XADC thing. So, why not >>make an on-chip heater? Use a PLL to clock a bunch of flops, and vary >>the PLL output frequency to keep the chip temp roughly constant. > >Clever, and maybe patentable. Maybe you could servo a ring oscillator >frequency to the clock by changing the dissipation and directly >stabilize the timing. > >--sp
That would work too. We'd have to persuade/fool the tools into letting us build a ring oscillator! I've used ring oscillators to measure FPGA chip temp before: https://dl.dropboxusercontent.com/u/53724080/Thermal/ESM_Ring_Oscillator.jpg The change in prop delay vs temp is fairly small. -- John Larkin Highland Technology, Inc lunatic fringe electronics
John Larkin wrote:

> We can measure the chip temperature with the XADC thing. So, why not > make an on-chip heater? Use a PLL to clock a bunch of flops, and vary > the PLL output frequency to keep the chip temp roughly constant.
Reminds me my old idea of building domestic heaters out of Pentium4 chips. 20 chips with TDP of 135W make a decent heater and one can always sell the waste MIPS. Best regards, Piotr
In comp.arch.fpga Piotr Wyderski <peter.pan@neverland.mil> wrote:
> John Larkin wrote: > > > We can measure the chip temperature with the XADC thing. So, why not > > make an on-chip heater? Use a PLL to clock a bunch of flops, and vary > > the PLL output frequency to keep the chip temp roughly constant.
We do that by controlling the fan speed: keeps the FPGA ~40C which is in the middle of its timing range.
> Reminds me my old idea of building domestic heaters out of Pentium4 > chips. 20 chips with TDP of 135W make a decent heater and one can > always sell the waste MIPS.
BTDT. It's not as simple as that, because CPUs are point heat sources. To distribute the heat (and stop them melting) you need decent heatsinks and cooling. Servers, which do useful compute and emit waste heat, tend to be cooled assuming a high-velocity, high-noise environment. Domestic heating wants low-velocity, low-noise - which needs different enclosure and cooling arrangements. The system ends up being substantially custom by the end of it. You can get a long way with a dual-socket server board (~400W) in a 'workstation' case, but it's quite space-inefficient. You can't pack CPUs too closely together, first for thermal reasons but also because RAM and IO take up board area. (Blade servers do that, but again they're designed for fast air cooling). Unless you plan to put your 'furnace' in the basement with enough sound insulation to deaden the howling fans. Or watercool - needing most custom stuff. Theo
>We can measure the chip temperature with the XADC thing. So, why not >make an on-chip heater? Use a PLL to clock a bunch of flops, and vary >the PLL output frequency to keep the chip temp roughly constant.
I sometimes use a monolithic quad to make a temperature-controlled diff pair. One diagonally opposite pair is the amp, and of the others, one is a diode temperature sensor and one is a heater. Works great. Cheers Phil Hobbs
On Tue, 11 Apr 2017 07:48:17 +0200, Piotr Wyderski
<peter.pan@neverland.mil> wrote:

>John Larkin wrote: > >> We can measure the chip temperature with the XADC thing. So, why not >> make an on-chip heater? Use a PLL to clock a bunch of flops, and vary >> the PLL output frequency to keep the chip temp roughly constant. > >Reminds me my old idea of building domestic heaters out of Pentium4 >chips. 20 chips with TDP of 135W make a decent heater and one can >always sell the waste MIPS. > > Best regards, Piotr >
What a waste of Pentium chips. They make such excellent x-acto knife sharpeners. -- John Larkin Highland Technology, Inc lunatic fringe electronics