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Multiplexer sample and hold

Started by bitrex January 17, 2016
On Sun, 17 Jan 2016 18:41:33 +0000, John Devereux
<john@devereux.me.uk> wrote:

>John Larkin <jjlarkin@highlandtechnology.com> writes: > >> On Sun, 17 Jan 2016 11:10:28 -0500 (EST), bitrex >> <bitrex@de.lete.earthlink.net> wrote: >> >>> >>>In some old schematics for analog music synthesizers, where the >>> analog signal path is under microprocessor control, I see that >>> they use a multiplexer arrangement to route control voltages >>> around being driven from a single DAC, usually like a DAC08 or >>> something. They feed it into something like a 4051 multiplexer, >>> followed up with a JFET input amp like a TL084 configured as a >>> buffer, with a polystyrene or C0G holdup cap of a few hundred p >>> on the noninverting input. >>> >>>Is this an approach that continues to make any sense from a cost >>> perspective in year of our Lord 2k16, as we have serial input i2c >>> DACs with multiple outputs available, or processors with tons of >>> pins that can hardware PWM? >> >> That's not common any more. Charge injection and drift limit accuracy, >> and buffered multichannel DACs are small and cheap. > >It works fine where you only need "DC" or low frequencies. Then you can >use a NPO and quite a high value (10-100nF say). > >I used it for a 8-channel 0-10V output where it was just going to a PLC >monitoring slow process variables. There was an IRQ that drove the 4051 >address lines and updated the next output, every 100us or whatever.
Sure it works, but is it sensible to replace one octal DAC chip with a DAC, a mux, eight caps, and eight opamps? Less often than in the past.
> >> We sometimes make slow DACs from one pin of an FPGA, delta-sigma and >> an RC lowpass filter. That's an alternate to PWM. I guess that >> software bit-bang delta-sigma is not a totally crazy idea. > >I don't know why the hardware is not more common to do that, in >microcontrollers. PWM can be extremely accurate. Market it as a 24 bit >DAC.
PWM has some ugly tradeoffs between speed and accuracy. It does seem like uP PWM blocks could add a delta-sigma mode with a tiny bit more silicon, but accuracy will still be limited by ground loops and Vcc accuracy and stuff. -- John Larkin Highland Technology, Inc lunatic fringe electronics
On Sunday, January 17, 2016 at 10:41:41 AM UTC-8, John Devereux wrote:

> >>In some old schematics ... [ mux a DAC output to multiple] > >> ... a TL084 configured as a > >> buffer, with a polystyrene or C0G holdup cap of a few hundred p > >> on the noninverting input.
> It works fine where you only need "DC" or low frequencies. Then you can > use a NPO and quite a high value (10-100nF say).
Why does NPO matter here? You have a reset every few milliseconds, anyhow, and it's hard to believe there's any microphonic problem or drift issue. More to the point, if you're gonna do a dozen of these, why not pester the manufacturers to come up with a purpose built track/hold chip, it just takes plus/minus power, capacitor, input, output, and strobe. That way, the leakage and pickup on the full mux-to-amp trace doesn't noise up the output. As I read it, that trace is just floating most of the time.
On Sun, 17 Jan 2016 12:43:32 -0800 (PST), whit3rd <whit3rd@gmail.com>
wrote:

>On Sunday, January 17, 2016 at 10:41:41 AM UTC-8, John Devereux wrote: > >> >>In some old schematics ... [ mux a DAC output to multiple] >> >> ... a TL084 configured as a >> >> buffer, with a polystyrene or C0G holdup cap of a few hundred p >> >> on the noninverting input. > >> It works fine where you only need "DC" or low frequencies. Then you can >> use a NPO and quite a high value (10-100nF say). > >Why does NPO matter here? You have a reset every few milliseconds, anyhow, >and it's hard to believe there's any microphonic problem or drift issue.
Other ceramics suffer from dielectric absorption which will totally screw a S&H.
> >More to the point, if you're gonna do a dozen of these, why not pester the >manufacturers to come up with a purpose built track/hold chip, >it just takes plus/minus power, capacitor, input, output, and strobe. >That way, the leakage and pickup on the full mux-to-amp trace doesn't noise up >the output. As I read it, that trace is just floating most of the time.
The issue is still the cap. Why go to the bother of all that, instead of just building more ADCs? Pins are expensive. Transistors are free.
On Sunday, January 17, 2016 at 5:12:56 PM UTC-8, krw wrote:
> On Sun, 17 Jan 2016 12:43:32 -0800 (PST), whit3rd <whit3rd@gmail.com> > wrote:
> >> It works fine where you only need "DC" or low frequencies. Then you can > >> use a NPO and quite a high value (10-100nF say). > > > >Why does NPO matter here? You have a reset every few milliseconds, anyhow, > >and it's hard to believe there's any microphonic problem or drift issue. > > Other ceramics suffer from dielectric absorption which will totally > screw a S&H.
Dielectric absorption is a problem for monostable reset (and in dual-slope converters), but not for a filter cap that regularly gets updated from a reference.
On Sun, 17 Jan 2016 17:27:58 -0800 (PST), whit3rd <whit3rd@gmail.com>
wrote:

>On Sunday, January 17, 2016 at 5:12:56 PM UTC-8, krw wrote: >> On Sun, 17 Jan 2016 12:43:32 -0800 (PST), whit3rd <whit3rd@gmail.com> >> wrote: > >> >> It works fine where you only need "DC" or low frequencies. Then you can >> >> use a NPO and quite a high value (10-100nF say). >> > >> >Why does NPO matter here? You have a reset every few milliseconds, anyhow, >> >and it's hard to believe there's any microphonic problem or drift issue. >> >> Other ceramics suffer from dielectric absorption which will totally >> screw a S&H. > >Dielectric absorption is a problem for monostable reset (and in dual-slope converters), >but not for a filter cap that regularly gets updated from a reference.
If it's being charged from a fixed voltage, why do you need a S&H?
On Sunday, January 17, 2016 at 5:46:46 PM UTC-8, krw wrote:
> On Sun, 17 Jan 2016 17:27:58 -0800 (PST), whit3rd <whit3rd@gmail.com> > wrote:
> >Dielectric absorption is a problem for monostable reset (and in dual-slope converters), > >but not for a filter cap that regularly gets updated from a reference. > > If it's being charged from a fixed voltage, why do you need a S&H?
Because the source spends most of its time in a high-impedance state. Wasn't that clear from the original question and discussion?
John Larkin wrote:
> > That's not common any more. Charge injection and drift limit accuracy, > and buffered multichannel DACs are small and cheap.
Is sample and hold still used for ADC? --
On Sunday, January 17, 2016 at 8:17:26 PM UTC+1, John Larkin wrote:
> On Sun, 17 Jan 2016 18:41:33 +0000, John Devereux > <john@devereux.me.uk> wrote: > > >John Larkin <jjlarkin@highlandtechnology.com> writes: > > > >> On Sun, 17 Jan 2016 11:10:28 -0500 (EST), bitrex > >> <bitrex@de.lete.earthlink.net> wrote: > >> > >>> > >>>In some old schematics for analog music synthesizers, where the > >>> analog signal path is under microprocessor control, I see that > >>> they use a multiplexer arrangement to route control voltages > >>> around being driven from a single DAC, usually like a DAC08 or > >>> something. They feed it into something like a 4051 multiplexer, > >>> followed up with a JFET input amp like a TL084 configured as a > >>> buffer, with a polystyrene or C0G holdup cap of a few hundred p > >>> on the noninverting input. > >>> > >>>Is this an approach that continues to make any sense from a cost > >>> perspective in year of our Lord 2k16, as we have serial input i2c > >>> DACs with multiple outputs available, or processors with tons of > >>> pins that can hardware PWM? > >> > >> That's not common any more. Charge injection and drift limit accuracy, > >> and buffered multichannel DACs are small and cheap. > > > >It works fine where you only need "DC" or low frequencies. Then you can > >use a NPO and quite a high value (10-100nF say). > > > >I used it for a 8-channel 0-10V output where it was just going to a PLC > >monitoring slow process variables. There was an IRQ that drove the 4051 > >address lines and updated the next output, every 100us or whatever. > > Sure it works, but is it sensible to replace one octal DAC chip with a > DAC, a mux, eight caps, and eight opamps? Less often than in the past. >
Yes. I've used it in a design where we saved a great deal of money doing that. I have also used a simelar technique to reduce power consumption of a reference using S/H low current amp. Cheers Klaus
On Sun, 17 Jan 2016 20:16:32 -0800 (PST), whit3rd <whit3rd@gmail.com>
wrote:

>On Sunday, January 17, 2016 at 5:46:46 PM UTC-8, krw wrote: >> On Sun, 17 Jan 2016 17:27:58 -0800 (PST), whit3rd <whit3rd@gmail.com> >> wrote: > >> >Dielectric absorption is a problem for monostable reset (and in dual-slope converters), >> >but not for a filter cap that regularly gets updated from a reference. >> >> If it's being charged from a fixed voltage, why do you need a S&H? > >Because the source spends most of its time in a high-impedance state. >Wasn't that clear from the original question and discussion?
If you don't care about the results, don't measure anything. I like your minimalist attitude.
John Larkin <jjlarkin@highlandtechnology.com> writes:

> On Sun, 17 Jan 2016 18:41:33 +0000, John Devereux > <john@devereux.me.uk> wrote: > >>John Larkin <jjlarkin@highlandtechnology.com> writes: >> >>> On Sun, 17 Jan 2016 11:10:28 -0500 (EST), bitrex >>> <bitrex@de.lete.earthlink.net> wrote: >>> >>>> >>>>In some old schematics for analog music synthesizers, where the >>>> analog signal path is under microprocessor control, I see that >>>> they use a multiplexer arrangement to route control voltages >>>> around being driven from a single DAC, usually like a DAC08 or >>>> something. They feed it into something like a 4051 multiplexer, >>>> followed up with a JFET input amp like a TL084 configured as a >>>> buffer, with a polystyrene or C0G holdup cap of a few hundred p >>>> on the noninverting input. >>>> >>>>Is this an approach that continues to make any sense from a cost >>>> perspective in year of our Lord 2k16, as we have serial input i2c >>>> DACs with multiple outputs available, or processors with tons of >>>> pins that can hardware PWM? >>> >>> That's not common any more. Charge injection and drift limit accuracy, >>> and buffered multichannel DACs are small and cheap. >> >>It works fine where you only need "DC" or low frequencies. Then you can >>use a NPO and quite a high value (10-100nF say). >> >>I used it for a 8-channel 0-10V output where it was just going to a PLC >>monitoring slow process variables. There was an IRQ that drove the 4051 >>address lines and updated the next output, every 100us or whatever. > > Sure it works, but is it sensible to replace one octal DAC chip with a > DAC, a mux, eight caps, and eight opamps? Less often than in the past.
Well the DAC was free, and it would need to be a "high voltage" octal DAC.
>> >>> We sometimes make slow DACs from one pin of an FPGA, delta-sigma and >>> an RC lowpass filter. That's an alternate to PWM. I guess that >>> software bit-bang delta-sigma is not a totally crazy idea. >> >>I don't know why the hardware is not more common to do that, in >>microcontrollers. PWM can be extremely accurate. Market it as a 24 bit >>DAC. > > PWM has some ugly tradeoffs between speed and accuracy. > > It does seem like uP PWM blocks could add a delta-sigma mode with a > tiny bit more silicon, but accuracy will still be limited by ground > loops and Vcc accuracy and stuff.
I usually run it through external tinylogic gates powered from the precision supply. Or make it drive an analog switch that alternates between ground and the supply. -- John Devereux