On 15/12/2015 16:30, Phil Hobbs wrote:>> Cute. I might be more inclined to turn the ALC transistor upside down >> and use a PNP. That would avoid loading the emitter of the oscillator >> transistor. > > Come to think about it, by omitting the diode and cap, connecting the PNP's base to the NPN's collector, and putting a bit of positive bias on the PNP's emitter, it could kill the NPN's collector current before saturation occurs. That wouldn't have any slow bias TCs. > > Cheers > > Phil Hobbs >That is a very neat idea, true cycle by cycle control, the tank Q will clean up the even harmonic distortion. piglet
inductor tempco
Started by ●December 13, 2015
Reply by ●December 16, 20152015-12-16
Reply by ●December 16, 20152015-12-16
On Wednesday, 16 December 2015 14:28:32 UTC+11, John Larkin wrote:> On Wed, 16 Dec 2015 11:57:26 +1100, Chris Jones > <lugnut808@spam.yahoo.com> wrote: > > >On 15/12/2015 03:24, John Larkin wrote: > >> On Mon, 14 Dec 2015 18:46:06 +1100, Chris Jones > >> <lugnut808@spam.yahoo.com> wrote: > >>> On 14/12/2015 18:10, Bill Sloman wrote: > >>>> On Monday, 14 December 2015 12:26:17 UTC+11, John Larkin wrote: > >>>>> These look great, very high Q. I'm thinking about a 50 or maybe 100 > >>>>> MHz Colpitts oscillator PLL. > >>>>> > >>>>> http://www.coilcraft.com/1515sq.cfm > >>>>> > >>>>> I wonder if the thermal expansion tempco of the FR4 board will stretch > >>>>> the coil and change its native tempco. FR4 is variously cited as being > >>>>> around +5 to +17 ppm/K, which isn't bad. That might even reduce the > >>>>> tempco of the inductor. > >>>>> > >>>>> I also wonder how a PCB ground plane effects L and Q. I guess I'll > >>>>> order a kit and try it. > >>>> > >>>> Why a Colpitts? If you wanted a clean and reasonably fast tuneable sine wave oscillator you could use a pair of Analog Devices fast multipliers - the AD834, AD835 or ADL5391 are all fast enough for a 100MHz oscillator. > >>>> > >>>> One multiplier would provide the adjustable in-phase feedback to keep the amplitude where you wanted it, and the other would provide adjustable (positive or negative) quadrature input to allow you to pull the frequency up or down. At 100MHz, half a metre of coax could provide the quadrature component to be fed into the second multiplier. A coax delay line isn't a broad-band solution, but sufficiently broad-band for something you might otherwise fine-tune with a varicap. > >>>> > >>>> It's a more complicated solution than you'd come up with on your own, but it would be easier to explain to customers than the traditional approach. > >>>> > >>> > >>> It might be quite noisy though. Multipliers tend to be noisy because the > >>> "LO port" is in small-signal operation all the time, and therefore the > >>> devices contribute noise. If you replace the multipliers in your scheme > >>> with hard-driven mixers then it would be less noisy as the switching > >>> devices in the mixer core don't contribute to the current noise when > >>> they are fully on or fully off. The harmonic content in the mixer output > >>> current should not matter as the tank will filter it out, and even if it > >>> didn't, filtering out 3rd and higher harmonics is not very difficult > >>> unless the tuning range approaches an octave. > >> > >> A BFT25 costs us 36 cents. > > > >I didn't say that the scheme with mixers would be cost-effective or > >good, just that doing it with analogue multipliers would give worse > >phase noise than doing it with mixers.Which is probably wrong.> >If I were doing it, I would probably try to avoid the instant-start > >oscillator entirely, but then I would need to know what is the > >higher-level problem that you are solving which I can only guess at for now. > > I'm generating time delays from a trigger. The oscillator counts out > coarse ticks and then an analog interpolator gets resolution down to > picoseconds.That was what we were doing back around 1990. We were stuck with a 10psec granularity requirement, so used an 800MHz oscillator (phased lock to a 50MHz crystal) as a our coarse clock and digitised ramps for the fine stuff. 1.25nsec divided by 256 got us close enough to 5psec to keep our lunatic specification writer happy. A few years later I designed a similar system (which didn't - in the end - get built) around a much nicer 500MHz oscillator - using a thinned crystal which you could buy of the shelf, and an MC100E196 for the delays (which wasn't available in 1990). The MC100 E196 needs recalibrating at frequent intervals. http://www.onsemi.com/pub_link/Collateral/MC10E196-D.PDF Nowadays you'd use the http://www.onsemi.com/pub_link/Collateral/MC100EP196-D.PDF which still needs frequent calibration (or careful temperature control). Calibration is easy enough (and quick) if you use the time delay to set up mark-to-space ratios and digitise the average (filtered) DC voltage that come out. -- Bill Sloman, Sydney
Reply by ●December 16, 20152015-12-16
On 12/16/2015 04:06 AM, piglet wrote:> On 15/12/2015 16:30, Phil Hobbs wrote: >>> Cute. I might be more inclined to turn the ALC transistor upside down >>> and use a PNP. That would avoid loading the emitter of the oscillator >>> transistor. >> >> Come to think about it, by omitting the diode and cap, connecting the >> PNP's base to the NPN's collector, and putting a bit of positive bias >> on the PNP's emitter, it could kill the NPN's collector current before >> saturation occurs. That wouldn't have any slow bias TCs. >> >> Cheers >> >> Phil Hobbs >> > > That is a very neat idea, true cycle by cycle control, the tank Q will > clean up the even harmonic distortion. > > piglet >Seems to work all right, though there's some loading from the PNP's base, which seems to be mostly capacitive. Cheers Phil Hobbs ============== Version 4 SHEET 1 1968 680 WIRE 128 -144 -16 -144 WIRE 128 -96 128 -144 WIRE -16 -32 -16 -144 WIRE 160 16 48 16 WIRE 240 16 160 16 WIRE 320 16 240 16 WIRE 432 16 320 16 WIRE 160 64 160 16 WIRE 96 112 64 112 WIRE 240 112 240 16 WIRE 320 112 320 16 WIRE 432 128 432 16 WIRE 64 144 64 112 WIRE -16 192 -16 64 WIRE 160 192 160 160 WIRE 160 192 -16 192 WIRE 240 192 240 176 WIRE 240 192 160 192 WIRE 160 208 160 192 WIRE 240 208 240 192 WIRE 240 288 240 272 WIRE 320 288 320 192 WIRE 320 288 240 288 WIRE -48 304 -64 304 WIRE 48 304 32 304 WIRE 160 304 160 288 WIRE 160 304 128 304 WIRE 320 320 320 288 WIRE -64 336 -64 304 WIRE 160 352 160 304 WIRE 432 352 432 208 WIRE 432 352 160 352 FLAG -64 336 0 FLAG 320 320 0 FLAG 64 144 0 FLAG 128 -16 0 SYMBOL npn 96 64 R0 WINDOW 3 -58 -6 Left 2 SYMATTR Value BFT25A SYMATTR InstName Q1 SYMBOL ind 304 96 R0 WINDOW 3 30 120 Left 2 SYMATTR InstName L1 SYMATTR Value 220n SYMBOL res 144 192 R0 SYMATTR InstName R1 SYMATTR Value 20k SYMBOL voltage -64 304 R270 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName V1 SYMATTR Value 5 SYMBOL cap 224 112 R0 SYMATTR InstName C1 SYMATTR Value 42p SYMBOL cap 224 208 R0 SYMATTR InstName C2 SYMATTR Value 390p SYMBOL current 432 128 R0 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName I1 SYMATTR Value PULSE({(0.8-Valc)/77} 0 50n 1n 1n) SYMBOL pnp 48 64 R180 SYMATTR InstName Q2 SYMATTR Value BFT92 SYMBOL voltage 128 -112 R0 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName V2 SYMATTR Value {Valc} SYMBOL res 144 288 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R2 SYMATTR Value 500R TEXT 488 344 Left 2 !.tran 250n TEXT 256 400 Left 2 !.step param Valc 0.15 0.65 .1 TEXT 936 -136 Left 2 !.MODEL BFT25A NPN( IS = 1.3775E-017 BF = 85.654 NF = .9799 VAF = 50.805\n+ IKF = 10 ISE = 2.1998E-015 NE = 1.85715 BR = 16.975 NR = .98551\n+ VAR = 2.49144 IKR = .188014 ISC = 2.0516E-016 NC = 1.1073 RB = 80\n+ IRB = 1E-006 RBM = 80 RE = 7.911 RC = 5.3 EG = 1.11 XTI = 3\n+ CJE = 2.2303E-013 VJE = .6697 MJE = 5.9664E-002 TF = 5.1121E-012\n+ XTF = 7.9092 VTF = 1.3388 ITF = 5.6626E-003 PTF = 15.3714\n+ CJC = 2.2902E-013 VJC = .394786 MJC = 4.3323E-002 XCJC = .05\n+ TR = 1.3269E-008 VJS = .75 FC = .987824) TEXT 928 128 Left 2 !.MODEL BFT92 PNP( IS = 4.3756E-016 BF = 33.5815 NF = 1.0097 VAF = 23.3946\n+ IKF = 9.9538E-002 ISE = 8.7054E-014 NE = 1.94395 BR = 4.9472\n+ NR = 1.00254 VAR = 3.90385 IKR = 5.2816E-003 ISC = 3.5886E-014\n+ NC = 1.3933 RB = 5 IRB = 1E-006 RBM = 5 RE = 1 RC = 10 EG = 1.11\n+ XTI = 3 CJE = 7.4666E-013 VJE = .6 MJE = .35683 TF = 1.7492E-011\n+ XTF = 1.3546 VTF = .155654 ITF = 1E-003 PTF = 45 CJC = 9.371E-013\n+ VJC = .396455 MJC = .19995 XCJC = .106 TR = 8.422E-009\n+ VJS = .75 FC = .767856) -- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 hobbs at electrooptical dot net http://electrooptical.net
Reply by ●December 16, 20152015-12-16
On Wed, 16 Dec 2015 10:19:08 -0500, Phil Hobbs <pcdhSpamMeSenseless@electrooptical.net> wrote:>On 12/16/2015 04:06 AM, piglet wrote: >> On 15/12/2015 16:30, Phil Hobbs wrote: >>>> Cute. I might be more inclined to turn the ALC transistor upside down >>>> and use a PNP. That would avoid loading the emitter of the oscillator >>>> transistor. >>> >>> Come to think about it, by omitting the diode and cap, connecting the >>> PNP's base to the NPN's collector, and putting a bit of positive bias >>> on the PNP's emitter, it could kill the NPN's collector current before >>> saturation occurs. That wouldn't have any slow bias TCs. >>> >>> Cheers >>> >>> Phil Hobbs >>> >> >> That is a very neat idea, true cycle by cycle control, the tank Q will >> clean up the even harmonic distortion. >> >> piglet >> > >Seems to work all right, though there's some loading from the PNP's >base, which seems to be mostly capacitive.That seems to me to be about equivalent to diode clipping the tank to limit amplitude, or at least diode clipping with a bit of added series resistance to soften things up. The gain-limiting current is still mostly short, peak-of-sine spikes. They are applied to the capacitor tap, not to the top of the tank, but then are correspondingly bigger. A slow AGC would gradually reduce the loop gain, but that would be, well, slow. Any fast AGC must look ohmic to the tank and thus kill Q. Here's an oscillator with diode+resistor clipping. The capacitor ratio is extreme, 24:1, which in unconventional but makes the NPN run fairly linear. https://dl.dropboxusercontent.com/u/53724080/Circuits/Oscillators/JL_LC_1.zip I guess the ideal circuit would use hard clipping at first and gracefully transition to a slow leveling loop. The PNP sort of does that, but its current is still spikey. If you don't mind the amplitude changing 10 or 20% before it stabilizes, just a slowish loop would be OK, and Q would benefit. My circuit has the charm of simplicity, and settles fast, and may be good enough for what I want to do. The overall PLL takes over after a while, so extreme Q isn't really needed. Windows identifies BFT25A.mod as a 275 byte "movie clip." That sounds fast and furious.
Reply by ●December 16, 20152015-12-16
On 12/16/2015 12:30 PM, John Larkin wrote:> On Wed, 16 Dec 2015 10:19:08 -0500, Phil Hobbs > <pcdhSpamMeSenseless@electrooptical.net> wrote: > >> On 12/16/2015 04:06 AM, piglet wrote: >>> On 15/12/2015 16:30, Phil Hobbs wrote: >>>>> Cute. I might be more inclined to turn the ALC transistor upside down >>>>> and use a PNP. That would avoid loading the emitter of the oscillator >>>>> transistor. >>>> >>>> Come to think about it, by omitting the diode and cap, connecting the >>>> PNP's base to the NPN's collector, and putting a bit of positive bias >>>> on the PNP's emitter, it could kill the NPN's collector current before >>>> saturation occurs. That wouldn't have any slow bias TCs. >>>> >>>> Cheers >>>> >>>> Phil Hobbs >>>> >>> >>> That is a very neat idea, true cycle by cycle control, the tank Q will >>> clean up the even harmonic distortion. >>> >>> piglet >>> >> >> Seems to work all right, though there's some loading from the PNP's >> base, which seems to be mostly capacitive. > > That seems to me to be about equivalent to diode clipping the tank to > limit amplitude, or at least diode clipping with a bit of added series > resistance to soften things up.I don't think so, on account of the beta of the PNP, which reduces the tank loading (which is more or less the point of the exercise). At those sorts of speeds, it's probably possible to use a PNP Darlington. The gain-limiting current is still> mostly short, peak-of-sine spikes. They are applied to the capacitor > tap, not to the top of the tank, but then are correspondingly bigger. > > A slow AGC would gradually reduce the loop gain, but that would be, > well, slow. Any fast AGC must look ohmic to the tank and thus kill Q.If the PNP's beta and Early voltage were infinite, it would look exactly like switching the NPN's emitter current on and off. No tank loading at all.> > Here's an oscillator with diode+resistor clipping. The capacitor ratio > is extreme, 24:1, which in unconventional but makes the NPN run fairly > linear. > > https://dl.dropboxusercontent.com/u/53724080/Circuits/Oscillators/JL_LC_1.zipYou're pulling a big spike out of the top of the tank, though--put another of those 1m resistors between the tank and the collector, and you'll see. My PNP pulls almost all capacitive current out of the top of the tank, and there aren't any spikes there.> > I guess the ideal circuit would use hard clipping at first and > gracefully transition to a slow leveling loop. The PNP sort of does > that, but its current is still spikey. If you don't mind the amplitude > changing 10 or 20% before it stabilizes, just a slowish loop would be > OK, and Q would benefit. >On the other hand, just rebiasing it so that it current limits instead of voltage limiting will increase the loaded Q by a large factor. A resistor between the emitter and the tank helps too. (Small capacitors also work.) For instance, your circuit (280 uA quiescent bias) gets a peak inductor current of 8 mA, whereas the one below (72 uA quiescent bias) peaks at 60 mA. So that's a factor of 30 reduction in loading, with a corresponding increase in loaded Q.> My circuit has the charm of simplicity, and settles fast, and may be > good enough for what I want to do. The overall PLL takes over after a > while, so extreme Q isn't really needed.Well, the higher the Q, the less vulnerable the resonator is to external effects. That has a direct impact on the jitter. Cheers Phil Hobbs =================== Version 4 SHEET 1 980 680 WIRE 208 16 160 16 WIRE 320 16 288 16 WIRE 384 16 320 16 WIRE 512 16 384 16 WIRE 160 64 160 16 WIRE 96 112 -16 112 WIRE 320 112 320 16 WIRE 384 112 384 16 WIRE -16 128 -16 112 WIRE 512 128 512 16 WIRE 160 192 160 160 WIRE 208 192 160 192 WIRE 320 192 320 176 WIRE 320 192 288 192 WIRE 160 208 160 192 WIRE 320 208 320 192 WIRE 320 288 320 272 WIRE 384 288 384 192 WIRE 384 288 320 288 WIRE 512 288 512 208 WIRE -48 304 -64 304 WIRE 48 304 32 304 WIRE 160 304 160 288 WIRE 160 304 128 304 WIRE 384 320 384 288 WIRE -64 336 -64 304 FLAG -64 336 0 FLAG 384 320 0 FLAG -16 208 0 FLAG 512 288 0 SYMBOL npn 96 64 R0 WINDOW 3 -58 -6 Left 2 SYMATTR Value BFT25A SYMATTR InstName Q1 SYMBOL ind 368 96 R0 SYMATTR InstName L1 SYMATTR Value 220n SYMBOL res 144 192 R0 SYMATTR InstName R1 SYMATTR Value 10k SYMBOL voltage -64 304 R270 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName V1 SYMATTR Value 5 SYMBOL cap 304 112 R0 SYMATTR InstName C1 SYMATTR Value 42p SYMBOL cap 304 208 R0 SYMATTR InstName C2 SYMATTR Value 390p SYMBOL current 512 128 R0 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName I1 SYMATTR Value PULSE(60m 0 50n 1n 1n) SYMBOL voltage -16 112 R0 WINDOW 123 0 0 Left 2 WINDOW 39 24 124 Left 2 SYMATTR SpiceLine Rser=1m SYMATTR InstName V2 SYMATTR Value -3.5 SYMBOL res 144 288 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R2 SYMATTR Value 500R SYMBOL res 304 208 M270 WINDOW 0 32 56 VTop 2 WINDOW 3 0 56 VBottom 2 SYMATTR InstName R3 SYMATTR Value 100 SYMBOL res 304 32 M270 WINDOW 0 32 56 VTop 2 WINDOW 3 0 56 VBottom 2 SYMATTR InstName R4 SYMATTR Value 1m TEXT 352 336 Left 2 !.tran 15u TEXT 504 360 Left 2 !.include BFT25A.mod -- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 hobbs at electrooptical dot net http://electrooptical.net
Reply by ●December 16, 20152015-12-16
On 12/16/2015 01:08 PM, Phil Hobbs wrote:> On 12/16/2015 12:30 PM, John Larkin wrote: >> On Wed, 16 Dec 2015 10:19:08 -0500, Phil Hobbs >> <pcdhSpamMeSenseless@electrooptical.net> wrote: >> >>> On 12/16/2015 04:06 AM, piglet wrote: >>>> On 15/12/2015 16:30, Phil Hobbs wrote: >>>>>> Cute. I might be more inclined to turn the ALC transistor upside down >>>>>> and use a PNP. That would avoid loading the emitter of the oscillator >>>>>> transistor. >>>>> >>>>> Come to think about it, by omitting the diode and cap, connecting the >>>>> PNP's base to the NPN's collector, and putting a bit of positive bias >>>>> on the PNP's emitter, it could kill the NPN's collector current before >>>>> saturation occurs. That wouldn't have any slow bias TCs. >>>>> >>>>> Cheers >>>>> >>>>> Phil Hobbs >>>>> >>>> >>>> That is a very neat idea, true cycle by cycle control, the tank Q will >>>> clean up the even harmonic distortion. >>>> >>>> piglet >>>> >>> >>> Seems to work all right, though there's some loading from the PNP's >>> base, which seems to be mostly capacitive. >> >> That seems to me to be about equivalent to diode clipping the tank to >> limit amplitude, or at least diode clipping with a bit of added series >> resistance to soften things up. > > I don't think so, on account of the beta of the PNP, which reduces the > tank loading (which is more or less the point of the exercise). At > those sorts of speeds, it's probably possible to use a PNP Darlington. > > The gain-limiting current is still >> mostly short, peak-of-sine spikes. They are applied to the capacitor >> tap, not to the top of the tank, but then are correspondingly bigger. >> >> A slow AGC would gradually reduce the loop gain, but that would be, >> well, slow. Any fast AGC must look ohmic to the tank and thus kill Q. > > If the PNP's beta and Early voltage were infinite, it would look exactly > like switching the NPN's emitter current on and off. No tank loading at > all. > >> >> Here's an oscillator with diode+resistor clipping. The capacitor ratio >> is extreme, 24:1, which in unconventional but makes the NPN run fairly >> linear. >> >> https://dl.dropboxusercontent.com/u/53724080/Circuits/Oscillators/JL_LC_1.zip > > You're pulling a big spike out of the top of the tank, though--put > another of those 1m resistors between the tank and the collector, and > you'll see. My PNP pulls almost all capacitive current out of the top > of the tank, and there aren't any spikes there. > >> >> I guess the ideal circuit would use hard clipping at first and >> gracefully transition to a slow leveling loop. The PNP sort of does >> that, but its current is still spikey. If you don't mind the amplitude >> changing 10 or 20% before it stabilizes, just a slowish loop would be >> OK, and Q would benefit. >> > > On the other hand, just rebiasing it so that it current limits instead > of voltage limiting will increase the loaded Q by a large factor. A > resistor between the emitter and the tank helps too. (Small capacitors > also work.) > > For instance, your circuit (280 uA quiescent bias) gets a peak inductor > current of 8 mA, whereas the one below (72 uA quiescent bias) peaks at > 60 mA. So that's a factor of 30 reduction in loading, with a > corresponding increase in loaded Q. > >> My circuit has the charm of simplicity, and settles fast, and may be >> good enough for what I want to do. The overall PLL takes over after a >> while, so extreme Q isn't really needed. > > Well, the higher the Q, the less vulnerable the resonator is to external > effects. That has a direct impact on the jitter.Belay that. It's much better, but it still voltage-limits. Revised version coming soon to a simulator near you. Cheers Phil Hobbs -- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 hobbs at electrooptical dot net http://electrooptical.net
Reply by ●December 16, 20152015-12-16
On 12/16/2015 01:16 PM, Phil Hobbs wrote:> On 12/16/2015 01:08 PM, Phil Hobbs wrote: >> On 12/16/2015 12:30 PM, John Larkin wrote: >>> On Wed, 16 Dec 2015 10:19:08 -0500, Phil Hobbs >>> <pcdhSpamMeSenseless@electrooptical.net> wrote: >>> >>>> On 12/16/2015 04:06 AM, piglet wrote: >>>>> On 15/12/2015 16:30, Phil Hobbs wrote: >>>>>>> Cute. I might be more inclined to turn the ALC transistor upside down >>>>>>> and use a PNP. That would avoid loading the emitter of the oscillator >>>>>>> transistor. >>>>>> >>>>>> Come to think about it, by omitting the diode and cap, connecting the >>>>>> PNP's base to the NPN's collector, and putting a bit of positive bias >>>>>> on the PNP's emitter, it could kill the NPN's collector current before >>>>>> saturation occurs. That wouldn't have any slow bias TCs. >>>>>> >>>>>> Cheers >>>>>> >>>>>> Phil Hobbs >>>>>> >>>>> >>>>> That is a very neat idea, true cycle by cycle control, the tank Q will >>>>> clean up the even harmonic distortion. >>>>> >>>>> piglet >>>>> >>>> >>>> Seems to work all right, though there's some loading from the PNP's >>>> base, which seems to be mostly capacitive. >>> >>> That seems to me to be about equivalent to diode clipping the tank to >>> limit amplitude, or at least diode clipping with a bit of added series >>> resistance to soften things up. >> >> I don't think so, on account of the beta of the PNP, which reduces the >> tank loading (which is more or less the point of the exercise). At >> those sorts of speeds, it's probably possible to use a PNP Darlington. >> >> The gain-limiting current is still >>> mostly short, peak-of-sine spikes. They are applied to the capacitor >>> tap, not to the top of the tank, but then are correspondingly bigger. >>> >>> A slow AGC would gradually reduce the loop gain, but that would be, >>> well, slow. Any fast AGC must look ohmic to the tank and thus kill Q. >> >> If the PNP's beta and Early voltage were infinite, it would look exactly >> like switching the NPN's emitter current on and off. No tank loading at >> all. >> >>> >>> Here's an oscillator with diode+resistor clipping. The capacitor ratio >>> is extreme, 24:1, which in unconventional but makes the NPN run fairly >>> linear. >>> >>> https://dl.dropboxusercontent.com/u/53724080/Circuits/Oscillators/JL_LC_1.zip >> >> You're pulling a big spike out of the top of the tank, though--put >> another of those 1m resistors between the tank and the collector, and >> you'll see. My PNP pulls almost all capacitive current out of the top >> of the tank, and there aren't any spikes there. >> >>> >>> I guess the ideal circuit would use hard clipping at first and >>> gracefully transition to a slow leveling loop. The PNP sort of does >>> that, but its current is still spikey. If you don't mind the amplitude >>> changing 10 or 20% before it stabilizes, just a slowish loop would be >>> OK, and Q would benefit. >>> >> >> On the other hand, just rebiasing it so that it current limits instead >> of voltage limiting will increase the loaded Q by a large factor. A >> resistor between the emitter and the tank helps too. (Small capacitors >> also work.) >> >> For instance, your circuit (280 uA quiescent bias) gets a peak inductor >> current of 8 mA, whereas the one below (72 uA quiescent bias) peaks at >> 60 mA. So that's a factor of 30 reduction in loading, with a >> corresponding increase in loaded Q. >> >>> My circuit has the charm of simplicity, and settles fast, and may be >>> good enough for what I want to do. The overall PLL takes over after a >>> while, so extreme Q isn't really needed. >> >> Well, the higher the Q, the less vulnerable the resonator is to external >> effects. That has a direct impact on the jitter. > > Belay that. It's much better, but it still voltage-limits. Revised > version coming soon to a simulator near you. > > Cheers > > Phil Hobbs > >Okay, it's fixed. This one works essentially the same over a 6:1 range of Q_L (100 to 600 milliohms out of 60-odd ohms). With < 50 uA quiescent bias, it has circulating currents of 8-10 mA in the tank, and amplitude limiting is controlled by the transconductance of the NPN. Cheers Phil Hobbs ============== Version 4 SHEET 1 1968 680 WIRE 576 -64 512 -64 WIRE 512 -48 512 -64 WIRE 16 -32 -32 -32 WIRE -32 0 -32 -32 WIRE 16 0 16 -32 WIRE 224 16 160 16 WIRE 240 16 224 16 WIRE 320 16 240 16 WIRE 464 16 320 16 WIRE 576 16 576 -64 WIRE 576 16 560 16 WIRE 592 16 576 16 WIRE 752 16 672 16 WIRE 752 48 752 16 WIRE 160 64 160 16 WIRE 320 64 320 16 WIRE 16 112 16 80 WIRE 96 112 16 112 WIRE 240 112 240 16 WIRE 16 128 16 112 WIRE 752 144 752 128 WIRE 160 192 160 160 WIRE 240 192 240 176 WIRE 240 192 224 192 WIRE 320 192 320 144 WIRE 16 208 16 192 WIRE 160 208 160 192 WIRE 240 208 240 192 WIRE 240 288 240 272 WIRE 320 288 320 272 WIRE 320 288 240 288 WIRE -96 304 -112 304 WIRE 16 304 16 272 WIRE 16 304 -16 304 WIRE 160 304 160 288 WIRE 160 304 16 304 WIRE 320 320 320 288 WIRE -112 336 -112 304 FLAG -112 336 0 FLAG 320 320 0 FLAG 752 144 0 FLAG 224 16 TANK FLAG 16 112 BASE FLAG -32 0 0 SYMBOL npn 96 64 R0 WINDOW 3 11 -18 Left 2 SYMATTR Value BFT25A SYMATTR InstName Q1 SYMBOL ind 304 48 R0 WINDOW 3 30 120 Left 2 SYMATTR Value 220n SYMATTR InstName L1 SYMATTR SpiceLine Rser=0 Rpar=1T SYMBOL res 176 192 M0 SYMATTR InstName R1 SYMATTR Value 10k SYMBOL voltage -112 304 R270 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName V1 SYMATTR Value 5 SYMBOL cap 224 112 R0 SYMATTR InstName C1 SYMATTR Value 56p SYMBOL cap 224 208 R0 SYMATTR InstName C2 SYMATTR Value 120p SYMBOL cap 160 208 R270 WINDOW 0 32 32 VTop 2 WINDOW 3 0 32 VBottom 2 SYMATTR InstName C3 SYMATTR Value 22p SYMBOL res 304 176 R0 SYMATTR InstName R2 SYMATTR Value {Rser} SYMBOL res 576 32 R270 WINDOW 0 32 56 VTop 2 WINDOW 3 0 56 VBottom 2 SYMATTR InstName R3 SYMATTR Value 220 SYMBOL voltage 752 32 R0 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName !GO SYMATTR Value PULSE(3.3 0 50n 500p 500p) SYMBOL npn 560 -48 R90 SYMATTR InstName Q2 SYMATTR Value BFT25A SYMBOL diode 0 128 R0 WINDOW 3 -85 31 Left 2 SYMATTR InstName D1 SYMATTR Value 1N914 SYMBOL res 0 -16 R0 SYMATTR InstName R4 SYMATTR Value 2k SYMBOL diode 0 208 R0 WINDOW 0 36 30 Left 2 WINDOW 3 -80 8 Left 2 SYMATTR InstName D2 SYMATTR Value 1N914 TEXT 488 344 Left 2 !.tran 100u TEXT 936 -136 Invisible 2 !.MODEL BFT25A NPN( IS = 1.3775E-017 BF = 85.654 NF = .9799 VAF = 50.805\n+ IKF = 10 ISE = 2.1998E-015 NE = 1.85715 BR = 16.975 NR = .98551\n+ VAR = 2.49144 IKR = .188014 ISC = 2.0516E-016 NC = 1.1073 RB = 80\n+ IRB = 1E-006 RBM = 80 RE = 7.911 RC = 5.3 EG = 1.11 XTI = 3\n+ CJE = 2.2303E-013 VJE = .6697 MJE = 5.9664E-002 TF = 5.1121E-012\n+ XTF = 7.9092 VTF = 1.3388 ITF = 5.6626E-003 PTF = 15.3714\n+ CJC = 2.2902E-013 VJC = .394786 MJC = 4.3323E-002 XCJC = .05\n+ TR = 1.3269E-008 VJS = .75 FC = .987824) TEXT 928 128 Invisible 2 !.MODEL BFT92 PNP( IS = 4.3756E-016 BF = 33.5815 NF = 1.0097 VAF = 23.3946\n+ IKF = 9.9538E-002 ISE = 8.7054E-014 NE = 1.94395 BR = 4.9472\n+ NR = 1.00254 VAR = 3.90385 IKR = 5.2816E-003 ISC = 3.5886E-014\n+ NC = 1.3933 RB = 5 IRB = 1E-006 RBM = 5 RE = 1 RC = 10 EG = 1.11\n+ XTI = 3 CJE = 7.4666E-013 VJE = .6 MJE = .35683 TF = 1.7492E-011\n+ XTF = 1.3546 VTF = .155654 ITF = 1E-003 PTF = 45 CJC = 9.371E-013\n+ VJC = .396455 MJC = .19995 XCJC = .106 TR = 8.422E-009\n+ VJS = .75 FC = .767856) TEXT 424 304 Left 2 !.step param Rser 100m 600m 100m -- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 hobbs at electrooptical dot net http://electrooptical.net
Reply by ●December 16, 20152015-12-16
On 17/12/15 09:22, Phil Hobbs wrote:> On 12/16/2015 01:16 PM, Phil Hobbs wrote: >> On 12/16/2015 01:08 PM, Phil Hobbs wrote: >>> On 12/16/2015 12:30 PM, John Larkin wrote: >>>> On Wed, 16 Dec 2015 10:19:08 -0500, Phil Hobbs >>>> <pcdhSpamMeSenseless@electrooptical.net> wrote: >>>> >>>>> On 12/16/2015 04:06 AM, piglet wrote: >>>>>> On 15/12/2015 16:30, Phil Hobbs wrote: >>>>>>>> Cute. I might be more inclined to turn the ALC transistor >>>>>>>> upside down >>>>>>>> and use a PNP. That would avoid loading the emitter of the >>>>>>>> oscillator >>>>>>>> transistor. >>>>>>> >>>>>>> Come to think about it, by omitting the diode and cap, connecting >>>>>>> the >>>>>>> PNP's base to the NPN's collector, and putting a bit of positive >>>>>>> bias >>>>>>> on the PNP's emitter, it could kill the NPN's collector current >>>>>>> before >>>>>>> saturation occurs. That wouldn't have any slow bias TCs. >>>>>>> >>>>>>> Cheers >>>>>>> >>>>>>> Phil Hobbs >>>>>>> >>>>>> >>>>>> That is a very neat idea, true cycle by cycle control, the tank Q >>>>>> will >>>>>> clean up the even harmonic distortion. >>>>>> >>>>>> piglet >>>>>> >>>>> >>>>> Seems to work all right, though there's some loading from the PNP's >>>>> base, which seems to be mostly capacitive. >>>> >>>> That seems to me to be about equivalent to diode clipping the tank to >>>> limit amplitude, or at least diode clipping with a bit of added series >>>> resistance to soften things up. >>> >>> I don't think so, on account of the beta of the PNP, which reduces the >>> tank loading (which is more or less the point of the exercise). At >>> those sorts of speeds, it's probably possible to use a PNP Darlington. >>> >>> The gain-limiting current is still >>>> mostly short, peak-of-sine spikes. They are applied to the capacitor >>>> tap, not to the top of the tank, but then are correspondingly bigger. >>>> >>>> A slow AGC would gradually reduce the loop gain, but that would be, >>>> well, slow. Any fast AGC must look ohmic to the tank and thus kill Q. >>> >>> If the PNP's beta and Early voltage were infinite, it would look exactly >>> like switching the NPN's emitter current on and off. No tank loading at >>> all. >>> >>>> >>>> Here's an oscillator with diode+resistor clipping. The capacitor ratio >>>> is extreme, 24:1, which in unconventional but makes the NPN run fairly >>>> linear. >>>> >>>> https://dl.dropboxusercontent.com/u/53724080/Circuits/Oscillators/JL_LC_1.zip >>>> >>> >>> You're pulling a big spike out of the top of the tank, though--put >>> another of those 1m resistors between the tank and the collector, and >>> you'll see. My PNP pulls almost all capacitive current out of the top >>> of the tank, and there aren't any spikes there. >>> >>>> >>>> I guess the ideal circuit would use hard clipping at first and >>>> gracefully transition to a slow leveling loop. The PNP sort of does >>>> that, but its current is still spikey. If you don't mind the amplitude >>>> changing 10 or 20% before it stabilizes, just a slowish loop would be >>>> OK, and Q would benefit. >>>> >>> >>> On the other hand, just rebiasing it so that it current limits instead >>> of voltage limiting will increase the loaded Q by a large factor. A >>> resistor between the emitter and the tank helps too. (Small capacitors >>> also work.) >>> >>> For instance, your circuit (280 uA quiescent bias) gets a peak inductor >>> current of 8 mA, whereas the one below (72 uA quiescent bias) peaks at >>> 60 mA. So that's a factor of 30 reduction in loading, with a >>> corresponding increase in loaded Q. >>> >>>> My circuit has the charm of simplicity, and settles fast, and may be >>>> good enough for what I want to do. The overall PLL takes over after a >>>> while, so extreme Q isn't really needed. >>> >>> Well, the higher the Q, the less vulnerable the resonator is to external >>> effects. That has a direct impact on the jitter. >> >> Belay that. It's much better, but it still voltage-limits. Revised >> version coming soon to a simulator near you. >> >> Cheers >> >> Phil Hobbs >> >> > Okay, it's fixed. This one works essentially the same over a 6:1 range > of Q_L (100 to 600 milliohms out of 60-odd ohms). With < 50 uA > quiescent bias, it has circulating currents of 8-10 mA in the tank, and > amplitude limiting is controlled by the transconductance of the NPN.Thanks. The initial amplitude is dependent on the 220R. What else does it depend on? May need to make that a trimpot.
Reply by ●December 16, 20152015-12-16
On 12/16/2015 06:46 PM, Clifford Heath wrote:> On 17/12/15 09:22, Phil Hobbs wrote: >> On 12/16/2015 01:16 PM, Phil Hobbs wrote: >>> On 12/16/2015 01:08 PM, Phil Hobbs wrote: >>>> On 12/16/2015 12:30 PM, John Larkin wrote: >>>>> On Wed, 16 Dec 2015 10:19:08 -0500, Phil Hobbs >>>>> <pcdhSpamMeSenseless@electrooptical.net> wrote: >>>>> >>>>>> On 12/16/2015 04:06 AM, piglet wrote: >>>>>>> On 15/12/2015 16:30, Phil Hobbs wrote: >>>>>>>>> Cute. I might be more inclined to turn the ALC transistor >>>>>>>>> upside down >>>>>>>>> and use a PNP. That would avoid loading the emitter of the >>>>>>>>> oscillator >>>>>>>>> transistor. >>>>>>>> >>>>>>>> Come to think about it, by omitting the diode and cap, connecting >>>>>>>> the >>>>>>>> PNP's base to the NPN's collector, and putting a bit of positive >>>>>>>> bias >>>>>>>> on the PNP's emitter, it could kill the NPN's collector current >>>>>>>> before >>>>>>>> saturation occurs. That wouldn't have any slow bias TCs. >>>>>>>> >>>>>>>> Cheers >>>>>>>> >>>>>>>> Phil Hobbs >>>>>>>> >>>>>>> >>>>>>> That is a very neat idea, true cycle by cycle control, the tank Q >>>>>>> will >>>>>>> clean up the even harmonic distortion. >>>>>>> >>>>>>> piglet >>>>>>> >>>>>> >>>>>> Seems to work all right, though there's some loading from the PNP's >>>>>> base, which seems to be mostly capacitive. >>>>> >>>>> That seems to me to be about equivalent to diode clipping the tank to >>>>> limit amplitude, or at least diode clipping with a bit of added series >>>>> resistance to soften things up. >>>> >>>> I don't think so, on account of the beta of the PNP, which reduces the >>>> tank loading (which is more or less the point of the exercise). At >>>> those sorts of speeds, it's probably possible to use a PNP Darlington. >>>> >>>> The gain-limiting current is still >>>>> mostly short, peak-of-sine spikes. They are applied to the capacitor >>>>> tap, not to the top of the tank, but then are correspondingly bigger. >>>>> >>>>> A slow AGC would gradually reduce the loop gain, but that would be, >>>>> well, slow. Any fast AGC must look ohmic to the tank and thus kill Q. >>>> >>>> If the PNP's beta and Early voltage were infinite, it would look >>>> exactly >>>> like switching the NPN's emitter current on and off. No tank >>>> loading at >>>> all. >>>> >>>>> >>>>> Here's an oscillator with diode+resistor clipping. The capacitor ratio >>>>> is extreme, 24:1, which in unconventional but makes the NPN run fairly >>>>> linear. >>>>> >>>>> https://dl.dropboxusercontent.com/u/53724080/Circuits/Oscillators/JL_LC_1.zip >>>>> >>>>> >>>> >>>> You're pulling a big spike out of the top of the tank, though--put >>>> another of those 1m resistors between the tank and the collector, and >>>> you'll see. My PNP pulls almost all capacitive current out of the top >>>> of the tank, and there aren't any spikes there. >>>> >>>>> >>>>> I guess the ideal circuit would use hard clipping at first and >>>>> gracefully transition to a slow leveling loop. The PNP sort of does >>>>> that, but its current is still spikey. If you don't mind the amplitude >>>>> changing 10 or 20% before it stabilizes, just a slowish loop would be >>>>> OK, and Q would benefit. >>>>> >>>> >>>> On the other hand, just rebiasing it so that it current limits instead >>>> of voltage limiting will increase the loaded Q by a large factor. A >>>> resistor between the emitter and the tank helps too. (Small capacitors >>>> also work.) >>>> >>>> For instance, your circuit (280 uA quiescent bias) gets a peak inductor >>>> current of 8 mA, whereas the one below (72 uA quiescent bias) peaks at >>>> 60 mA. So that's a factor of 30 reduction in loading, with a >>>> corresponding increase in loaded Q. >>>> >>>>> My circuit has the charm of simplicity, and settles fast, and may be >>>>> good enough for what I want to do. The overall PLL takes over after a >>>>> while, so extreme Q isn't really needed. >>>> >>>> Well, the higher the Q, the less vulnerable the resonator is to >>>> external >>>> effects. That has a direct impact on the jitter. >>> >>> Belay that. It's much better, but it still voltage-limits. Revised >>> version coming soon to a simulator near you. >>> >>> >> Okay, it's fixed. This one works essentially the same over a 6:1 range >> of Q_L (100 to 600 milliohms out of 60-odd ohms). With < 50 uA >> quiescent bias, it has circulating currents of 8-10 mA in the tank, and >> amplitude limiting is controlled by the transconductance of the NPN. > > Thanks. > > The initial amplitude is dependent on the 220R. What else does it depend > on? May need to make that a trimpot.Right. The equilibrium amplitude depends on the tank Q, and matching that with the kickstart amplitude is required if one wants to avoid the envelope transient. OTOH if you're just using a comparator to look for zero crossings, the amplitude is a second-order effect anyway. Cheers Phil Hobbs -- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 hobbs at electrooptical dot net http://electrooptical.net
Reply by ●December 16, 20152015-12-16
On Thu, 17 Dec 2015 10:46:41 +1100, Clifford Heath <no.spam@please.net> wrote:>On 17/12/15 09:22, Phil Hobbs wrote: >> On 12/16/2015 01:16 PM, Phil Hobbs wrote: >>> On 12/16/2015 01:08 PM, Phil Hobbs wrote: >>>> On 12/16/2015 12:30 PM, John Larkin wrote: >>>>> On Wed, 16 Dec 2015 10:19:08 -0500, Phil Hobbs >>>>> <pcdhSpamMeSenseless@electrooptical.net> wrote: >>>>> >>>>>> On 12/16/2015 04:06 AM, piglet wrote: >>>>>>> On 15/12/2015 16:30, Phil Hobbs wrote: >>>>>>>>> Cute. I might be more inclined to turn the ALC transistor >>>>>>>>> upside down >>>>>>>>> and use a PNP. That would avoid loading the emitter of the >>>>>>>>> oscillator >>>>>>>>> transistor. >>>>>>>> >>>>>>>> Come to think about it, by omitting the diode and cap, connecting >>>>>>>> the >>>>>>>> PNP's base to the NPN's collector, and putting a bit of positive >>>>>>>> bias >>>>>>>> on the PNP's emitter, it could kill the NPN's collector current >>>>>>>> before >>>>>>>> saturation occurs. That wouldn't have any slow bias TCs. >>>>>>>> >>>>>>>> Cheers >>>>>>>> >>>>>>>> Phil Hobbs >>>>>>>> >>>>>>> >>>>>>> That is a very neat idea, true cycle by cycle control, the tank Q >>>>>>> will >>>>>>> clean up the even harmonic distortion. >>>>>>> >>>>>>> piglet >>>>>>> >>>>>> >>>>>> Seems to work all right, though there's some loading from the PNP's >>>>>> base, which seems to be mostly capacitive. >>>>> >>>>> That seems to me to be about equivalent to diode clipping the tank to >>>>> limit amplitude, or at least diode clipping with a bit of added series >>>>> resistance to soften things up. >>>> >>>> I don't think so, on account of the beta of the PNP, which reduces the >>>> tank loading (which is more or less the point of the exercise). At >>>> those sorts of speeds, it's probably possible to use a PNP Darlington. >>>> >>>> The gain-limiting current is still >>>>> mostly short, peak-of-sine spikes. They are applied to the capacitor >>>>> tap, not to the top of the tank, but then are correspondingly bigger. >>>>> >>>>> A slow AGC would gradually reduce the loop gain, but that would be, >>>>> well, slow. Any fast AGC must look ohmic to the tank and thus kill Q. >>>> >>>> If the PNP's beta and Early voltage were infinite, it would look exactly >>>> like switching the NPN's emitter current on and off. No tank loading at >>>> all. >>>> >>>>> >>>>> Here's an oscillator with diode+resistor clipping. The capacitor ratio >>>>> is extreme, 24:1, which in unconventional but makes the NPN run fairly >>>>> linear. >>>>> >>>>> https://dl.dropboxusercontent.com/u/53724080/Circuits/Oscillators/JL_LC_1.zip >>>>> >>>> >>>> You're pulling a big spike out of the top of the tank, though--put >>>> another of those 1m resistors between the tank and the collector, and >>>> you'll see. My PNP pulls almost all capacitive current out of the top >>>> of the tank, and there aren't any spikes there. >>>> >>>>> >>>>> I guess the ideal circuit would use hard clipping at first and >>>>> gracefully transition to a slow leveling loop. The PNP sort of does >>>>> that, but its current is still spikey. If you don't mind the amplitude >>>>> changing 10 or 20% before it stabilizes, just a slowish loop would be >>>>> OK, and Q would benefit. >>>>> >>>> >>>> On the other hand, just rebiasing it so that it current limits instead >>>> of voltage limiting will increase the loaded Q by a large factor. A >>>> resistor between the emitter and the tank helps too. (Small capacitors >>>> also work.) >>>> >>>> For instance, your circuit (280 uA quiescent bias) gets a peak inductor >>>> current of 8 mA, whereas the one below (72 uA quiescent bias) peaks at >>>> 60 mA. So that's a factor of 30 reduction in loading, with a >>>> corresponding increase in loaded Q. >>>> >>>>> My circuit has the charm of simplicity, and settles fast, and may be >>>>> good enough for what I want to do. The overall PLL takes over after a >>>>> while, so extreme Q isn't really needed. >>>> >>>> Well, the higher the Q, the less vulnerable the resonator is to external >>>> effects. That has a direct impact on the jitter. >>> >>> Belay that. It's much better, but it still voltage-limits. Revised >>> version coming soon to a simulator near you. >>> >>> Cheers >>> >>> Phil Hobbs >>> >>> >> Okay, it's fixed. This one works essentially the same over a 6:1 range >> of Q_L (100 to 600 milliohms out of 60-odd ohms). With < 50 uA >> quiescent bias, it has circulating currents of 8-10 mA in the tank, and >> amplitude limiting is controlled by the transconductance of the NPN. > >Thanks. > >The initial amplitude is dependent on the 220R. What else does it depend >on? May need to make that a trimpot.Whenever I mention "trimpot" the kids here start calling assisted-care retirement facilities to ship me off to. My only objection to a trimpot here is, how would you set it? You can hardly probe the tank without upsetting it. With 2% Ls and Cs and reasonable care as regards idle current, the startup amplitude should be pretty close. We already expect the first cycle or to to be some picoseconds off schedule, and we calibrate for that. Here's an older design, one I hope to both simplify and improve. https://dl.dropboxusercontent.com/u/53724080/Circuits/Oscillators/Burst_Sine.JPG https://dl.dropboxusercontent.com/u/53724080/Circuits/Oscillators/Burst_Osc_2.JPG It's untweaked, a production unit. -- John Larkin Highland Technology, Inc picosecond timing precision measurement jlarkin att highlandtechnology dott com http://www.highlandtechnology.com
