On Wed, 9 Nov 2011 14:25:17 -0800 (PST), dagmargoodboat@yahoo.com wrote:>On Nov 7, 9:37�pm, John Larkin ><jjlar...@highNOTlandTHIStechnologyPART.com> wrote: >> On Wed, 02 Nov 2011 20:51:39 -0700, John Larkin >> >> >> >> <jjlar...@highNOTlandTHIStechnologyPART.com> wrote: >> >This >> >> >http://www.panoramio.com/photo/61564837 >> >> >might work for powering a thing I'm doing. I can use a standard cheap >> >Coiltronix dual-coil inductor as the transformer. The complementary >> >emitter followers will have no shoot-through and can have controllably >> >slow switching edges, since they will just follow the base drive. >> >> >Anybody got ideas for the base driver device? Ideally it would be >> >self-oscillating, set with some R-C; have a moderate slew rate; swing >> >to the rails. I'm thinking roughly 150 KHz maybe, a few watts output. >> >> >Maybe an LM8261 opamp? I'd have to see if it winds up when it rails. >> >It might not. >> >> >Some sort of fet gate driver would be OK, but few go to 24 volts. >> >> >Something discrete maybe, like a 2N7002 to 24-, and maybe a >> >bootstrapped pullup? >> >> >John >> >> This looks pretty good: >> >> http://www.panoramio.com/photo/61831924 >> >> http://www.panoramio.com/photo/61831918 >> >> http://www.panoramio.com/photo/61831931 >> >> http://www.panoramio.com/photo/61715323 >> >> That little IR driver chip is really very nice. It has a 1 us >> anti-shoot-through delay, and with 270 ohm gate resistors everything >> is nice and trapezoidal, sort of what I had in mind with the original >> circuit idea. >> >> Thanks for the discussion and ideas. >> >> ======================= >> >> As soon as we started programming, we found to our surprise that it >> wasn't as easy to get programs right as we had thought. Debugging had >> to be discovered. I can remember the exact instant when I realized >> that a large part of my life from then on was going to be spent in >> finding mistakes in my own programs. >> >> � � � � � Maurice Wilkes discovers debugging, 1949 >> >> ====================== >> >> I'm thinking that I may spend a large part of my life from now on >> designing power supplies. >> >> John > >Maybe not. > >http://www.mouser.com/nationalsimpleswitcher/?cm_sp=homepage-_-newproducts-_-National+Products+from+Texas+Instruments+LMR62014+SIMPLE+SWITCHER+StepUp+Voltage+Regulators >That's cool. We're already using the LTM8023, 2 amps at about $9 each. I could festoon my boards with a mix of them. Great word, festoon. The other thing that would be nice would be a module with a lot of outputs, 4 or 5 maybe.>Or, >http://www.mouser.com/search/refine.aspx?Ntk=P_MarCom&Ntt=177757480 > > >Hey, back on topic (isolated converters), how's this for an SSR from >hell: > > > .-----. > >-----|cheap|--+----.|-------> > | DC- | | || > | DC | R1 ||->- > | | | | > .---| |--+---------+---> > | '-----' > ===I've done that! A $4 dc/dc SIP and a 50 amp fet is a cheap 50 amp SSR. John
isolated DC/DC converter
Started by ●November 3, 2011
Reply by ●November 9, 20112011-11-09
Reply by ●November 10, 20112011-11-10
On Wed, 09 Nov 2011 19:10:27 -0800, John Larkin <jjlarkin@highNOTlandTHIStechnologyPART.com> wrote:>On Wed, 09 Nov 2011 12:17:48 -0600, Vladimir Vassilevsky ><nospam@nowhere.com> wrote: ><snip>>>Problem is the stray impeadance of the dump path, plus the turn-on time >>of the diodes. All of that appears to be surprisingly non-zero. > >That's what's so neat about adding the capacitor to ground in the >half-bridge. When a fet turns off, the current goes into the cap, and >you get a nice smooth transition to the opposite rail. Neither fet >ever sees a high-dissipation zone; no diodes have high di/dt to mess >with their holes and electrons. There's no big dV/dT or ringing >anywhere and no shoot-through. It's cool and quiet. > >A really smart fet driver would synchronize the gate drives with this >capacitive trapezoid thing. That's patentable. I hereby donate it to >the world. Well, every million chips, you have to buy me a beer. > >JohnI think some already do that, by monitoring gate current flow, but they're not telling. RL
Reply by ●November 10, 20112011-11-10
John Larkin <jjlarkin@highNOTlandTHIStechnologyPART.com> wrote:> That's what's so neat about adding the capacitor to ground in the > half-bridge. When a fet turns off, the current goes into the cap, and > you get a nice smooth transition to the opposite rail. Neither fet > ever sees a high-dissipation zone; no diodes have high di/dt to mess > with their holes and electrons. There's no big dV/dT or ringing > anywhere and no shoot-through. It's cool and quiet. > > A really smart fet driver would synchronize the gate drives with this > capacitive trapezoid thing. That's patentable. I hereby donate it to > the world. Well, every million chips, you have to buy me a beer. > > JohnJohn, I'm having trouble discovering what is so unusual about your circuit. I made a half bridge driving an inductive load. I added 4 diodes to shunt the back emf away from the mosfet body diode so I can measure the current. I used 250KHz because I misread a post saying you were using 150KHz. But I don't think that affects things much. When a mosfet turns off, the inductor forces the voltage to go to the opposite rail, where it turns on the bypass diode. The current through the inductor starts decreasing linearly. There is no ringing on the output voltage or inductor current, but there may be on an actual layout due to stray inductance. A little while later, the mosfet fet on that side turns on. But nothing happens since the inductor is still forcing current through the bypass diode. So there is no shoot-through and no power dissipated in the mosfet at turnon. When the mosfet turns off, the opposite happens. The inductor forces the voltage to the opposite rail and turns on the bypass diode. The inductor current decreases linearly, and a little while later, the opposite mosfet turns on. Again, there is no current through the mosfet, so there is no power dissipated at turnon. When you add a 2nF cap to ground, basically very little changes. The voltage transient becomes a ramp, but it is still over before the opposing mosfet turns on, so nothing has changed. The only difference seems to be a small hump in the mosfet voltage at turnoff. This may increase the power dissipated slightly. I don't know which DRQ127 inductor you are using, so I had to guess. I tried many different values with little overall change in the operation. Since you mentioned the waveforms are trapezoidal, I ended up with 50uH, but I don't think it matters a great deal. I also tried different gate resistors, and larger values definitely affect the performance. Again, I had to use whatever mosfets were in the LTspice inventory, so that definitely would affect things if the ones you use have much lower input capacity. Since everything seems to be governed by the inductor forcing current through the bypass diode until it goes through zero and the mosfet turns on, there does not seem to be any need to synchronize the gate drive. About the only thing I can see is the cap slows down the transition, as you would have to expect. If it helps reduce the noise injected into the ground plane is not clear, since it is connected to ground and all the current through the cap goes into the ground plane. So all things considered, I don't see much difference between having a bypass cap to ground, except it slows down the transitions. But it's not clear if that helps the noise injected into the ground plane. I am including the LTspice ASC and PLT files. If you could, would you like to see if the analysis is correct? Thanks, Mike SHEET 1 2108 800 WIRE 1072 -416 1056 -416 WIRE 1280 -416 1072 -416 WIRE 1424 -416 1280 -416 WIRE 1424 -400 1424 -416 WIRE 1056 -384 1056 -416 WIRE 1280 -304 1280 -416 WIRE 1424 -304 1424 -320 WIRE 1056 -288 1056 -320 WIRE 848 -208 816 -208 WIRE 992 -208 928 -208 WIRE 1008 -208 992 -208 WIRE 816 -192 816 -208 WIRE 1280 -192 1280 -240 WIRE 1344 -192 1280 -192 WIRE 1584 -192 1424 -192 WIRE 816 -96 816 -112 WIRE 1056 -96 1056 -192 WIRE 1056 -96 816 -96 WIRE 1168 -96 1056 -96 WIRE 1280 -96 1280 -192 WIRE 1280 -96 1168 -96 WIRE 1312 -96 1280 -96 WIRE 1344 -96 1312 -96 WIRE 1456 -96 1424 -96 WIRE 1488 -96 1456 -96 WIRE 1584 -96 1584 -192 WIRE 1584 -96 1568 -96 WIRE 1168 -80 1168 -96 WIRE 1056 -64 1056 -96 WIRE 1584 -48 1584 -96 WIRE 1168 0 1168 -16 WIRE 1280 0 1280 -96 WIRE 1056 48 1056 0 WIRE 1584 48 1584 32 WIRE 848 128 816 128 WIRE 976 128 928 128 WIRE 1008 128 976 128 WIRE 1280 128 1280 64 WIRE 816 144 816 128 WIRE 1056 160 1056 144 WIRE 816 240 816 224 FLAG 976 128 M2G FLAG 1056 160 0 FLAG 816 240 0 FLAG 1424 -304 0 FLAG 1584 48 0 FLAG 1312 -96 Vout FLAG 1072 -416 VCC FLAG 816 128 Vin FLAG 992 -208 M1G FLAG 1280 128 0 FLAG 1168 0 0 FLAG 1456 -96 L1R1 FLAG 816 -208 Vin2 SYMBOL voltage 816 128 R0 WINDOW 123 24 134 Left 2 WINDOW 3 25 95 Left 2 SYMATTR Value PULSE(0 12 500n 50n 50n 1.5u 4u) SYMATTR SpiceLine Rser=1 SYMATTR InstName V1 SYMBOL Voltage 1424 -416 R0 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName V3 SYMATTR Value 24v SYMBOL Voltage 1584 -64 R0 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName V4 SYMATTR Value 12v SYMBOL res 1584 -112 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R1 SYMATTR Value 1 SYMBOL diode 1040 -64 R0 SYMATTR InstName D2 SYMATTR Value ES1D SYMBOL res 944 112 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R3 SYMATTR Value 10 SYMBOL ind 1328 -80 R270 WINDOW 0 32 56 VTop 2 WINDOW 3 5 56 VBottom 2 SYMATTR InstName L1 SYMATTR Value 50� SYMATTR SpiceLine Rser=1u Rpar=1e9 Cpar=1pf SYMBOL diode 1264 -240 M180 WINDOW 0 24 72 Left 2 WINDOW 3 24 0 Left 2 SYMATTR InstName D3 SYMATTR Value ES1D SYMBOL diode 1264 64 M180 WINDOW 0 24 72 Left 2 WINDOW 3 24 0 Left 2 SYMATTR InstName D4 SYMATTR Value ES1D SYMBOL diode 1072 -384 M0 SYMATTR InstName D1 SYMATTR Value ES1D SYMBOL cap 1152 -80 R0 SYMATTR InstName C1 SYMATTR Value 1p SYMBOL nmos 1008 -288 R0 SYMATTR InstName M1 SYMATTR Value STP8NM60 SYMBOL nmos 1008 48 R0 SYMATTR InstName M2 SYMATTR Value STP8NM60 SYMBOL voltage 816 -208 R0 WINDOW 123 24 134 Left 2 WINDOW 3 -60 136 Left 2 SYMATTR Value PULSE(12 0 50n 50n 50n 2.4u 4u) SYMATTR SpiceLine Rser=1 SYMATTR InstName V2 SYMBOL res 944 -224 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R2 SYMATTR Value 10 SYMBOL res 1440 -208 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R4 SYMATTR Value 1k TEXT 1064 -536 Left 2 ;'Larkin's MOSFET driver TEXT 1056 -504 Left 2 !.tran 0 120u 110u 100ns [Transient Analysis] { Npanes: 3 Active Pane: 2 { traces: 2 {589826,0,"V(vout)"} {34603014,1,"I(L1)"} X: ('�',0,0,1e-006,1e-005) Y[0]: (' ',0,-3,3,27) Y[1]: ('m',0,-0.25,0.05,0.25) Volts: (' ',0,0,0,-3,3,27) Amps: ('m',0,0,0,-0.25,0.05,0.25) Log: 0 0 0 GridStyle: 1 }, { traces: 4 {589826,0,"V(m1g)-V(vout)"} {589827,0,"V(m2g)"} {34668551,1,"I(D4)"} {34668556,1,"I(D3)"} X: ('�',0,0,1e-006,1e-005) Y[0]: (' ',0,-1,1,13) Y[1]: ('m',0,-0.02,0.02,0.26) Volts: (' ',0,0,0,-1,1,13) Amps: ('m',0,0,0,-0.02,0.02,0.26) Log: 0 0 0 GridStyle: 1 }, { traces: 3 {34668548,0,"Id(M1)"} {34668547,0,"Id(M2)"} {34603013,0,"I(V3)"} X: ('�',0,0,1e-006,1e-005) Y[0]: ('m',0,-0.25,0.05,0.25) Y[1]: ('m',0,1e+308,0.04,-1e+308) Amps: ('m',0,0,0,-0.25,0.05,0.25) Log: 0 0 0 GridStyle: 1 } }
Reply by ●November 10, 20112011-11-10
Actually, if you were going to add a slowdown cap, I'd put it directly across the inductor. That way it slows down the dv/dt across the mosfets, but the current is dumped back into the inductor instead of into ground. That will be 2 beer please:) Mike
Reply by ●November 10, 20112011-11-10
Mike <spam@me.not> wrote:> Actually, if you were going to add a slowdown cap, I'd put it directly > across the inductor. That way it slows down the dv/dt across the > mosfets, but the current is dumped back into the inductor instead of > into ground. > > That will be 2 beer please:) > > MikeNever mind. There is still a current pulse dumped through the other end of the inductor to ground. Fast edges, substantial current. Very noisy. The only thing that seems to improve the noise is to reduce the cap to around 100pf or so. There should be an optimum value that minimizes the noise from dv/dt across the mosfets, and the current spike into ground. Mike
Reply by ●November 10, 20112011-11-10
On Mon, 07 Nov 2011 18:15:04 -0800, John Larkin <jjlarkin@highNOTlandTHIStechnologyPART.com> wrote:>On Tue, 08 Nov 2011 01:13:16 GMT, Mike <spam@me.not> wrote: > >>Joerg <invalid@invalid.invalid> wrote: >> >>> Those aren't necessarily the problem. What I like to keep muffled are >>> the current spikes into the secondary caps after each polarity >>> reversal on the primary side. This stuff tend to magnetically couple >>> into things where one really doesn't want to see it. >> >>This is of general interest for low level work. >> >>Part of the problem is the huge difference between the supply voltage,=20 >>24V, and the LSB with a 20 dB op amp input gain. The lsb with a 2v p-p=20 >>adc is 2/2^12 =3D 488uV. With 20dB input buffer gain, the lsb is 48uV. =The=20>>supply is 24V, so the total attenuation required is greater than >> >>20*log(24/48e-6) =3D 113.979 dB >> >>That is going to be extremely tough on a pcb when the source and victim==20>>are only 2 inches apart. > >The ADC is an LTC2242-12. Its input range is 2 volts p-p, and I >catually have 3V p-p coming into the board. I gain it up a little and >throw away half in a 70 MHz lowpass filter, so I never have a bunch of >gain. > >Yup, an LSB is 488 uV at tha ADC. Heck, cell phones have switching >regulators and work with microvolt inputs.Hardly an appropriate comparison. Cell phones vs instruments, and acceptable levels of disturbance for the purpose.> >See my other post. > >John
Reply by ●November 10, 20112011-11-10
John Larkin wrote:> A really smart fet driver would synchronize the gate drives with this > capacitive trapezoid thing. That's patentable.Indeed. It is probably covered already in a bunch of patents.> I hereby donate it to > the world. Well, every million chips, you have to buy me a beer.Hold on. You may end up having to donate to patent owners. VLV
Reply by ●November 10, 20112011-11-10
On Thu, 10 Nov 2011 06:33:37 GMT, Mike <spam@me.not> wrote:>John Larkin <jjlarkin@highNOTlandTHIStechnologyPART.com> wrote: > >> That's what's so neat about adding the capacitor to ground in the >> half-bridge. When a fet turns off, the current goes into the cap, and >> you get a nice smooth transition to the opposite rail. Neither fet >> ever sees a high-dissipation zone; no diodes have high di/dt to mess >> with their holes and electrons. There's no big dV/dT or ringing >> anywhere and no shoot-through. It's cool and quiet. >> >> A really smart fet driver would synchronize the gate drives with this >> capacitive trapezoid thing. That's patentable. I hereby donate it to >> the world. Well, every million chips, you have to buy me a beer. >> >> John > >John, I'm having trouble discovering what is so unusual about your >circuit. I made a half bridge driving an inductive load. I added 4 diodes >to shunt the back emf away from the mosfet body diode so I can measure >the current. I used 250KHz because I misread a post saying you were using >150KHz. But I don't think that affects things much. > >When a mosfet turns off, the inductor forces the voltage to go to the >opposite rail, where it turns on the bypass diode.Consider the lower fet: while it's turning off, its drain voltage is going up but the inductor/load is still forcing current into it. That product of volts and amps, during the transition, is a lot of power dissipation. Now you have two choices: start turning on the upper fet (and get a huge shoot-through current) or have a deadband with both fets off (and get a bunch of ringing). Either way there's dissipation in one fet or both. Switching faster helps, but that's noisy... I've seen hundreds of amps of shoot-through current in not many nanoseconds... nasty stuff. With a cap from the switch node to ground, the lower fet turns off gently at zero volts and the inductive current shifts out of the fet and into the cap. The cap voltage then ramps to the opposite rail, and the upper fet turns on at zero voltage drop. The switch node has to get from one rail to the other. It's better to have that happen through a non-dissipative component than through a dissipative one. Our situations are a little different. I'm driving a transformer which has a bridge rectifier and a load on its output. I'm seeing both the magnetizing inductance of the transformer and its leakage inductance. To get a little closer to my case, make L=3u and R1=5. That rings like hell. Now the cap, maybe 10nF, looks useful. Note that I'm using an IRS2153 driver that has a fixed non-overlap time of about a microsecond. So I don't have arbitrary timing available to, for example, close that gap to prevent ringing. John The current through>the inductor starts decreasing linearly. There is no ringing on the >output voltage or inductor current, but there may be on an actual layout >due to stray inductance. > >A little while later, the mosfet fet on that side turns on. But nothing >happens since the inductor is still forcing current through the bypass >diode. So there is no shoot-through and no power dissipated in the mosfet >at turnon. > >When the mosfet turns off, the opposite happens. The inductor forces the >voltage to the opposite rail and turns on the bypass diode. The inductor >current decreases linearly, and a little while later, the opposite mosfet >turns on. Again, there is no current through the mosfet, so there is no >power dissipated at turnon. > >When you add a 2nF cap to ground, basically very little changes. The >voltage transient becomes a ramp, but it is still over before the >opposing mosfet turns on, so nothing has changed. > >The only difference seems to be a small hump in the mosfet voltage at >turnoff. This may increase the power dissipated slightly. > >I don't know which DRQ127 inductor you are using, so I had to guess. I >tried many different values with little overall change in the operation. >Since you mentioned the waveforms are trapezoidal, I ended up with 50uH, >but I don't think it matters a great deal. > >I also tried different gate resistors, and larger values definitely >affect the performance. Again, I had to use whatever mosfets were in the >LTspice inventory, so that definitely would affect things if the ones you >use have much lower input capacity. > >Since everything seems to be governed by the inductor forcing current >through the bypass diode until it goes through zero and the mosfet turns >on, there does not seem to be any need to synchronize the gate drive. > >About the only thing I can see is the cap slows down the transition, as >you would have to expect. If it helps reduce the noise injected into the >ground plane is not clear, since it is connected to ground and all the >current through the cap goes into the ground plane. > >So all things considered, I don't see much difference between having a >bypass cap to ground, except it slows down the transitions. But it's not >clear if that helps the noise injected into the ground plane. > >I am including the LTspice ASC and PLT files. If you could, would you >like to see if the analysis is correct? > >Thanks, > >Mike > >SHEET 1 2108 800 >WIRE 1072 -416 1056 -416 >WIRE 1280 -416 1072 -416 >WIRE 1424 -416 1280 -416 >WIRE 1424 -400 1424 -416 >WIRE 1056 -384 1056 -416 >WIRE 1280 -304 1280 -416 >WIRE 1424 -304 1424 -320 >WIRE 1056 -288 1056 -320 >WIRE 848 -208 816 -208 >WIRE 992 -208 928 -208 >WIRE 1008 -208 992 -208 >WIRE 816 -192 816 -208 >WIRE 1280 -192 1280 -240 >WIRE 1344 -192 1280 -192 >WIRE 1584 -192 1424 -192 >WIRE 816 -96 816 -112 >WIRE 1056 -96 1056 -192 >WIRE 1056 -96 816 -96 >WIRE 1168 -96 1056 -96 >WIRE 1280 -96 1280 -192 >WIRE 1280 -96 1168 -96 >WIRE 1312 -96 1280 -96 >WIRE 1344 -96 1312 -96 >WIRE 1456 -96 1424 -96 >WIRE 1488 -96 1456 -96 >WIRE 1584 -96 1584 -192 >WIRE 1584 -96 1568 -96 >WIRE 1168 -80 1168 -96 >WIRE 1056 -64 1056 -96 >WIRE 1584 -48 1584 -96 >WIRE 1168 0 1168 -16 >WIRE 1280 0 1280 -96 >WIRE 1056 48 1056 0 >WIRE 1584 48 1584 32 >WIRE 848 128 816 128 >WIRE 976 128 928 128 >WIRE 1008 128 976 128 >WIRE 1280 128 1280 64 >WIRE 816 144 816 128 >WIRE 1056 160 1056 144 >WIRE 816 240 816 224 >FLAG 976 128 M2G >FLAG 1056 160 0 >FLAG 816 240 0 >FLAG 1424 -304 0 >FLAG 1584 48 0 >FLAG 1312 -96 Vout >FLAG 1072 -416 VCC >FLAG 816 128 Vin >FLAG 992 -208 M1G >FLAG 1280 128 0 >FLAG 1168 0 0 >FLAG 1456 -96 L1R1 >FLAG 816 -208 Vin2 >SYMBOL voltage 816 128 R0 >WINDOW 123 24 134 Left 2 >WINDOW 3 25 95 Left 2 >SYMATTR Value PULSE(0 12 500n 50n 50n 1.5u 4u) >SYMATTR SpiceLine Rser=1 >SYMATTR InstName V1 >SYMBOL Voltage 1424 -416 R0 >WINDOW 123 0 0 Left 2 >WINDOW 39 0 0 Left 2 >SYMATTR InstName V3 >SYMATTR Value 24v >SYMBOL Voltage 1584 -64 R0 >WINDOW 123 0 0 Left 2 >WINDOW 39 0 0 Left 2 >SYMATTR InstName V4 >SYMATTR Value 12v >SYMBOL res 1584 -112 R90 >WINDOW 0 0 56 VBottom 2 >WINDOW 3 32 56 VTop 2 >SYMATTR InstName R1 >SYMATTR Value 1 >SYMBOL diode 1040 -64 R0 >SYMATTR InstName D2 >SYMATTR Value ES1D >SYMBOL res 944 112 R90 >WINDOW 0 0 56 VBottom 2 >WINDOW 3 32 56 VTop 2 >SYMATTR InstName R3 >SYMATTR Value 10 >SYMBOL ind 1328 -80 R270 >WINDOW 0 32 56 VTop 2 >WINDOW 3 5 56 VBottom 2 >SYMATTR InstName L1 >SYMATTR Value 50� >SYMATTR SpiceLine Rser=1u Rpar=1e9 Cpar=1pf >SYMBOL diode 1264 -240 M180 >WINDOW 0 24 72 Left 2 >WINDOW 3 24 0 Left 2 >SYMATTR InstName D3 >SYMATTR Value ES1D >SYMBOL diode 1264 64 M180 >WINDOW 0 24 72 Left 2 >WINDOW 3 24 0 Left 2 >SYMATTR InstName D4 >SYMATTR Value ES1D >SYMBOL diode 1072 -384 M0 >SYMATTR InstName D1 >SYMATTR Value ES1D >SYMBOL cap 1152 -80 R0 >SYMATTR InstName C1 >SYMATTR Value 1p >SYMBOL nmos 1008 -288 R0 >SYMATTR InstName M1 >SYMATTR Value STP8NM60 >SYMBOL nmos 1008 48 R0 >SYMATTR InstName M2 >SYMATTR Value STP8NM60 >SYMBOL voltage 816 -208 R0 >WINDOW 123 24 134 Left 2 >WINDOW 3 -60 136 Left 2 >SYMATTR Value PULSE(12 0 50n 50n 50n 2.4u 4u) >SYMATTR SpiceLine Rser=1 >SYMATTR InstName V2 >SYMBOL res 944 -224 R90 >WINDOW 0 0 56 VBottom 2 >WINDOW 3 32 56 VTop 2 >SYMATTR InstName R2 >SYMATTR Value 10 >SYMBOL res 1440 -208 R90 >WINDOW 0 0 56 VBottom 2 >WINDOW 3 32 56 VTop 2 >SYMATTR InstName R4 >SYMATTR Value 1k >TEXT 1064 -536 Left 2 ;'Larkin's MOSFET driver >TEXT 1056 -504 Left 2 !.tran 0 120u 110u 100ns > >[Transient Analysis] >{ > Npanes: 3 > Active Pane: 2 > { > traces: 2 {589826,0,"V(vout)"} {34603014,1,"I(L1)"} > X: ('�',0,0,1e-006,1e-005) > Y[0]: (' ',0,-3,3,27) > Y[1]: ('m',0,-0.25,0.05,0.25) > Volts: (' ',0,0,0,-3,3,27) > Amps: ('m',0,0,0,-0.25,0.05,0.25) > Log: 0 0 0 > GridStyle: 1 > }, > { > traces: 4 {589826,0,"V(m1g)-V(vout)"} {589827,0,"V(m2g)"} >{34668551,1,"I(D4)"} {34668556,1,"I(D3)"} > X: ('�',0,0,1e-006,1e-005) > Y[0]: (' ',0,-1,1,13) > Y[1]: ('m',0,-0.02,0.02,0.26) > Volts: (' ',0,0,0,-1,1,13) > Amps: ('m',0,0,0,-0.02,0.02,0.26) > Log: 0 0 0 > GridStyle: 1 > }, > { > traces: 3 {34668548,0,"Id(M1)"} {34668547,0,"Id(M2)"} >{34603013,0,"I(V3)"} > X: ('�',0,0,1e-006,1e-005) > Y[0]: ('m',0,-0.25,0.05,0.25) > Y[1]: ('m',0,1e+308,0.04,-1e+308) > Amps: ('m',0,0,0,-0.25,0.05,0.25) > Log: 0 0 0 > GridStyle: 1 > } >}
Reply by ●November 10, 20112011-11-10
On 10 Nov., 04:19, John Larkin <jjlar...@highNOTlandTHIStechnologyPART.com> wrote:> On Wed, 9 Nov 2011 14:25:17 -0800 (PST), dagmargoodb...@yahoo.com > wrote: > > > > > > > > > > >On Nov 7, 9:37=A0pm, John Larkin > ><jjlar...@highNOTlandTHIStechnologyPART.com> wrote: > >> On Wed, 02 Nov 2011 20:51:39 -0700, John Larkin > > >> <jjlar...@highNOTlandTHIStechnologyPART.com> wrote: > >> >This > > >> >http://www.panoramio.com/photo/61564837 > > >> >might work for powering a thing I'm doing. I can use a standard cheap > >> >Coiltronix dual-coil inductor as the transformer. The complementary > >> >emitter followers will have no shoot-through and can have controllabl=y> >> >slow switching edges, since they will just follow the base drive. > > >> >Anybody got ideas for the base driver device? Ideally it would be > >> >self-oscillating, set with some R-C; have a moderate slew rate; swing > >> >to the rails. I'm thinking roughly 150 KHz maybe, a few watts output. > > >> >Maybe an LM8261 opamp? I'd have to see if it winds up when it rails. > >> >It might not. > > >> >Some sort of fet gate driver would be OK, but few go to 24 volts. > > >> >Something discrete maybe, like a 2N7002 to 24-, and maybe a > >> >bootstrapped pullup? > > >> >John > > >> This looks pretty good: > > >>http://www.panoramio.com/photo/61831924 > > >>http://www.panoramio.com/photo/61831918 > > >>http://www.panoramio.com/photo/61831931 > > >>http://www.panoramio.com/photo/61715323 > > >> That little IR driver chip is really very nice. It has a 1 us > >> anti-shoot-through delay, and with 270 ohm gate resistors everything > >> is nice and trapezoidal, sort of what I had in mind with the original > >> circuit idea. > > >> Thanks for the discussion and ideas. > > >> =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > > >> As soon as we started programming, we found to our surprise that it > >> wasn't as easy to get programs right as we had thought. Debugging had > >> to be discovered. I can remember the exact instant when I realized > >> that a large part of my life from then on was going to be spent in > >> finding mistakes in my own programs. > > >> =A0 =A0 =A0 =A0 =97 Maurice Wilkes discovers debugging, 1949 > > >> =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > > >> I'm thinking that I may spend a large part of my life from now on > >> designing power supplies. > > >> John > > >Maybe not. > > >http://www.mouser.com/nationalsimpleswitcher/?cm_sp=3Dhomepage-_-newpro.=..> > That's cool. We're already using the LTM8023, 2 amps at about $9 each. > I could festoon my boards with a mix of them. Great word, festoon. > > The other thing that would be nice would be a module with a lot of > outputs, 4 or 5 maybe. >not a module, but, it seems there's quiet a few mostly automotive regulator ICs with a few buck converters a few ldos, watchdog reset and some diagnostics all in one> > >Or, > >http://www.mouser.com/search/refine.aspx?Ntk=3DP_MarCom&Ntt=3D177757480 > > >Hey, back on topic (isolated converters), how's this for an SSR from > >hell: > > > =A0 =A0 =A0 =A0.-----. > > =A0>-----|cheap|--+----.|-------> > > =A0 =A0 =A0 =A0| DC- | =A0| =A0 =A0|| > > =A0 =A0 =A0 =A0| =A0DC | =A0R1 =A0 ||->- > > =A0 =A0 =A0 =A0| =A0 =A0 | =A0| =A0 =A0 =A0 =A0 | > > =A0 =A0.---| =A0 =A0 |--+---------+---> > > =A0 =A0| =A0 '-----' > > =A0 =3D=3D=3D > > I've done that! A $4 dc/dc SIP and a 50 amp fet is a cheap 50 amp SSR. > > JohnWith two FETs back to back it works on AC, I've used it as a kind of fast acting automatic fuse on mains, an MCU that already measured current and voltage could turn of the power to a number of triacs -Lasse
Reply by ●November 10, 20112011-11-10
On 10 Nov., 17:09, John Larkin <jjlar...@highNOTlandTHIStechnologyPART.com> wrote:>snip> > Note that I'm using an IRS2153 driver that has a fixed non-overlap > time of about a microsecond. So I don't have arbitrary timing > available to, for example, close that gap to prevent ringing. > > Johntheres an ir2157 with quite a few more features including deadtime set with a resistor a bit in this too: http://www.irf.com/technical-info/designtp/dt98-4.pdf -Lasse
