Paul Keinanen wrote:> On Wed, 03 Nov 2010 03:52:19 -0400, Phil Hobbs > <pcdhSpamMeSenseless@electrooptical.net> wrote: > > >> It's a bridged amp design with a single-ended power supply. The output >> of the cap multiplier is about +46.5 V with a +48 V input. > > With bridged configurations, shouldn't extreme opposite symmetry > between the left and right side layout help in reducing differential > ripple voltages ? > > Anyway, 1 nV ripple requirement seems a bit strange. > > At room temperatures and 50 kHz bandwidth, the noise power (kTB) is > -127 dBm. > > Thus, the source resistance would have to be a few milliohms. > > Is this realistic in practice ? >I'm interested in getting rid of the 50 kHz and its harmonics down to that sort of level, not the broadband noise. I can't describe the application in detail, unfortunately, but it's an ultrasensitive interferometric instrument being developed by a client of mine, and needs really really good laser locking. The SMPS noise is getting into the piezos, which puts sidebands on the laser line in very inconvenient places--they alias all over the place, due to a 12.5 kHz digitizing rate. Onion problems are best treated by nailing each layer to the floor--otherwise a couple of layers later, you wind up having to do it over again. The difference is between "I'm sure it'll be fine" and "Junk on the power supply lead is _not_ the problem." (Yes, you do have to be paranoid about inductive coupling into supply traces after the cap multiplier...but if so, that's another layer.) Cheers Phil Hobbs -- Dr Philip C D Hobbs Principal ElectroOptical Innovations 55 Orchard Rd Briarcliff Manor NY 10510 845-480-2058 email: hobbs (atsign) electrooptical (period) net http://electrooptical.net
Improved capacitance multiplier
Started by ●November 2, 2010
Reply by ●November 3, 20102010-11-03
Reply by ●November 4, 20102010-11-04
"Jamie" <jamie_ka1lpa_not_valid_after_ka1lpa_@charter.net> wrote in message news:bxlAo.5967$Mk2.5398@newsfe13.iad...>> Or MIL-39006 tantalums. I wonder if you can get them with heavy gold >> plating. >> > You like flames?Er, check out M39006 -- they're *liquid* tants! So if they cook off at all, they spray boiling sulfuric acid gel, but don't go all thermite on you. They're rated to absurdly high temperatures, too, like 200C. AFAIK, ESR is comparable to any other type. The only problem is they're expensive as hell. Hence my gold plating comment. I think it was Jim Williams, who once needed large, very low leakage caps. It turns out, these tants are essentially ideal, after a few days settling time. But it's rather pricey to sort through, say, ten of them, to get maybe three with really, really low leakage... Tim -- Deep Friar: a very philosophical monk. Website: http://webpages.charter.net/dawill/tmoranwms
Reply by ●November 4, 20102010-11-04
Paul Keinanen <keinanen@sci.fi> wrote:
: On Wed, 03 Nov 2010 03:52:19 -0400, Phil Hobbs
: <pcdhSpamMeSenseless@electrooptical.net> wrote:
: Anyway, 1 nV ripple requirement seems a bit strange.
: At room temperatures and 50 kHz bandwidth, the noise power (kTB) is
: -127 dBm.
There are applications where this sort of ripple requirements make
sense. I'm looking at Phil's design with keen interest: in my application
(SQUID biasing) the resistive parts of the circuit are at liquid helium
temperature where picovolts count. The circuit to be biased might also
be physically at room temperature, but far from thermal equilibrium, such
as low-loss capacitive MEMS systems.
Ken Tucker proposed voltage sensing fast feedback, but that's exactly
what Phil's circuit does: it observes Vbe of the final transistor
and 'feeds back' by controlling the transistor current. With a given
transistor technology (a given fT) it's hard to imagine how one might do
this faster (i.e. get a better high frequency rejection) - any more
complicated combination of transistors (such as an op amp) is bound to
have a longer feedback path and be slower. Or maybe I'm overlooking some
possibility?
Regards,
Mikko
Reply by ●November 4, 20102010-11-04
"Okkim Atnarivik" <Okkim.Atnarivik@twentyfour.fi.invalid> wrote in message news:iatvpp$qmm$1@epityr.hut.fi...> Ken Tucker proposed voltage sensing fast feedback, but that's exactly > what Phil's circuit does: it observes Vbe of the final transistor > and 'feeds back' by controlling the transistor current. With a given > transistor technology (a given fT) it's hard to imagine how one might do > this faster (i.e. get a better high frequency rejection) - any more > complicated combination of transistors (such as an op amp) is bound to > have a longer feedback path and be slower. Or maybe I'm overlooking some > possibility?That's true to some extent, because there are only so many ways to combine transistors in stages while maintaining stability. For instance, if you just cascade a bunch of stages, you can easily get gobs of gain (>>120dB), but with an obscene phase shift, you can't use it for anything. It's like cascading op-amps: you need a loop around each one. If you simply put one amp straight into the other, you're cascading integrators and you get an overall 180 degree phase shift at almost any frequency. The slightest loop phase shift sets the exact oscillating frequency. Any attempt to compensate such a monstrosity will only become stable well below rated fT. Thing is, even if you bring thousands of transistors to bear, in the digital domain for instance, you can still get a circuit that operates up near a useful fraction of fT. Practical analog circuits can use hundreds of transistors and still obtain disturbingly excellent behavior (LT1016 for instance, a 60GHz GBW comparator that's also unity gain stable as an op-amp!). Tim -- Deep Friar: a very philosophical monk. Website: http://webpages.charter.net/dawill/tmoranwms
Reply by ●November 4, 20102010-11-04
On Nov 2, 1:48=A0am, Phil Hobbs <pcdhSpamMeSensel...@electrooptical.net> wrote:> So, I had this application requiring really absurd amounts of ripple > rejection--it's a piezo driver in a laser wavelength locker that (for > historical reasons) has to run off a fairly crappy dual isolated 48V > DC-DC converter. =A0The 48V has almost a half volt of ripple at 47 kHz, > and the output noise needed to be in the nanovolts. > > As we've discussed here before, ordinary cap multipliers are limited by > Early effect and collector-emitter capacitance. =A0This one is a bit > complicated--14 parts--but according to LTSPICE it provides 180 dB of > ripple rejection from about 40 =A0kHz to above 10 MHz. =A0(In reality it > won't be this good of course.) =A0The interesting thing is that even with > a it drops only about 1.5V, due to daisy-chaining the RC lowpasses--the > second stage is biased from the base of the first stage instead of the > emitter, which saves a diode drop. =A0Adding the second stage requires > only about 350 mV total. > > The remaining limitations are due to the combined Early effect of the > transistors--very small, since they form a cascode pair--and all the > interelectrode capacitances in series. > > Good medicine for the present problem! > > Cheers > > Phil Hobbs > > =A0 =A0 =A0 =A0 =A0 =A0 =A0 Q1 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 Q2 > > IN =A0 =A0 =A0 =A0DNLS160 =A0 =A0 =A0 =A0 =A0 =A0DNLS160 =A0 =A0 =A0 3 ==A0 =A0 =A0 =A0 =A0OUT> > 0-----*--- =A0 =A0 =A0 =A0 --------- =A0 =A0 =A0 =A0 ------RR-*--------0 > =A0 =A0 =A0 =A0| =A0 \ =A0 =A0 =A0 / =A0 =A0 =A0 =A0 \ =A0 =A0 =A0 / =A0 ==A0 =A0 =A0 |> =A0 =A0 =A0 =A0| =A0 =A0\ =A0 =A0 A =A0 =A0 =A0 =A0 =A0 \ =A0 =A0 A =A0 ==A0 =A0 =A0 =A0|> =A0 =A0 =A0 =A0| =A0 --------- =A0 =A0 =A0 =A0 --------- =A0 =A0 =A0 =A0 =|> =A0 390 =A0R =A0 =A0 =A0 | =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 | =A0 =A0 =A0 ==A0 =A0 =A0=3D=3D=3D =A047uF alum> =A0 =A0 =A0 =A0R =A0 =A0 =A0 | =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 | =A0 =A0 ==A0 =A0 =A0 =A0 | =A0 || 1uF X7R> =A0 =A0 =A0 =A0| =A0390 =A0| =A0330 =A0 =A0 =A0330 =A0 | =A0 =A0 =A0 =A0 ==A0 =A0 |> =A0 =A0 =A0 =A0| =A0 =A0 =A0 | =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 | =A0 =A0 ==A0 =A0 =A0 =A0GND> =A0 =A0 =A0 =A0*--RR---*---RR---*---RR---*----+ > =A0 =A0 =A0 =A0| =A0 =A0 =A0 | =A0 =A0 =A0 =A0| =A0 =A0 =A0 =A0| =A0 =A0| > =A0 =A0 =A0 =A0| =A0 =A0 =A0 | =A0 =A0 =A0 =A0| =A0 =A0 =A0 =A0| =A0 =A0R=91k> =A0 =A0 =A0 =3D=3D=3D =A0 =A0 =3D=3D=3D =A0 =A0 =A0=3D=3D=3D =A0 =A0 =A0==3D=3D=3D =A0 R> =A0 =A0 1u | =A0 =A01u | =A0 =A0 1u | =A0 =A0 1u | =A0 =A0| > =A0 =A0 =A0 =A0| =A0 =A0 =A0 | =A0 =A0 =A0 =A0| =A0 =A0 =A0 =A0| =A0 =A0| > =A0 =A0 =A0 GND =A0 =A0 GND =A0 =A0 =A0GND =A0 =A0 =A0GND =A0GND > > -- > Dr Philip C D Hobbs > Principal > ElectroOptical Innovations > 55 Orchard Rd > Briarcliff Manor NY 10510 > 845-480-2058 > > email: hobbs (atsign) electrooptical (period) nethttp://electrooptical.ne=t This thread provided good fodder for thought. (Thanks Phil.) Though the cap multiplier provides low noise, it=92s got a few down sides as a power supply. First the output impedance is pretty poor. (a few ohms in the one I=92ve built.) Second the output voltage takes a while to settle down.. and can wander around a bit. (Again this is for my incarnation of the circuit. The wandering is at the 0.1mV level.) I thought I might be able to tame both these issues by sticking the whole circuit inside a slow control loop. Something like this, (V+)-+------------------------+ | | P |\ | 10k O<--R1R1--+---|+\ |/ c T | | >--RR--| b Q1 | C1 +-|-/ |\ e GND C1 | |/ | | | +-R2--+ GND | | | | | |/ c | +--+----| b Q2 | C2 |\ e | | | | GND | +------------+--Load | GND I slapped this together on some white proto-board. And it seemed to work OK. I=92ll have to build it more carefully and put it in a metal box to check the noise performance. A few questions, and comments. I built it first without the R1 C1 on the input. It was unstable. R2 C2 forms the cap multiplier with a TC of ~10ms. I had to slow the thing down. Is there some other way to slow down the loop? I=92ve now got the R1 C1 time equal to the R2 C2 time. After seeing Phil=92s circuit I realized I could use the output of the opamp as the reference for the cap mult. rather than the emitter Q1. This gained about 0.5 Volts of head room. George H.
Reply by ●November 4, 20102010-11-04
On Nov 3, 4:10=A0pm, Paul Keinanen <keina...@sci.fi> wrote:> On Wed, 03 Nov 2010 03:52:19 -0400, Phil Hobbs > > <pcdhSpamMeSensel...@electrooptical.net> wrote: > >It's a bridged amp design with a single-ended power supply. =A0The outpu=t> >of the cap multiplier is about +46.5 V with a +48 V input. > > With bridged configurations, shouldn't extreme opposite symmetry > between the left and right side layout help in reducing differential > ripple voltages ? > > Anyway, 1 nV ripple requirement seems a bit strange.Paul, it's not 1nV of ripple, but 1nV/rtHz of noise, which is not quite as extreme.> > At room temperatures and 50 kHz bandwidth, the noise power (kTB) is > -127 dBm. > > Thus, the source resistance would have to be a few milliohms. > > Is this realistic in practice ?We wanted to show that the current through a resistor had no shot noise. To do this we 'needed'* a power supply with less noise than the Johnson noise of the resistor. The cap multiplier was the answer. George H. * well we didn't really need this, but it makes it a lot more obvious.
Reply by ●November 4, 20102010-11-04
On Nov 4, 6:43 am, "Tim Williams" <tmoran...@charter.net> wrote:> "Okkim Atnarivik" <Okkim.Atnari...@twentyfour.fi.invalid> wrote in message > > news:iatvpp$qmm$1@epityr.hut.fi... > > > Ken Tucker proposed voltage sensing fast feedback, but that's exactly > > what Phil's circuit does: it observes Vbe of the final transistor > > and 'feeds back' by controlling the transistor current. With a given > > transistor technology (a given fT) it's hard to imagine how one might do > > this faster (i.e. get a better high frequency rejection) - any more > > complicated combination of transistors (such as an op amp) is bound to > > have a longer feedback path and be slower. Or maybe I'm overlooking some > > possibility? > > That's true to some extent, because there are only so many ways to combine > transistors in stages while maintaining stability. For instance, if you > just cascade a bunch of stages, you can easily get gobs of gain (>>120dB), > but with an obscene phase shift, you can't use it for anything. It's like > cascading op-amps: you need a loop around each one. If you simply put one > amp straight into the other, you're cascading integrators and you get an > overall 180 degree phase shift at almost any frequency. The slightest > loop phase shift sets the exact oscillating frequency. Any attempt to > compensate such a monstrosity will only become stable well below rated fT. > > Thing is, even if you bring thousands of transistors to bear, in the > digital domain for instance, you can still get a circuit that operates up > near a useful fraction of fT. Practical analog circuits can use hundreds > of transistors and still obtain disturbingly excellent behavior (LT1016 > for instance, a 60GHz GBW comparator that's also unity gain stable as an > op-amp!). > TimAgreed with the above posts and think Phil's approach is sound, here's a nice brief, http://en.wikipedia.org/wiki/Capacitance_multiplier I 'suppose' one can run them carefully in series to make successive use of capacitance multipliers. It's that 10^-9 Ripple Rejection done in a small economical space that becomes a challenge. Ken
Reply by ●November 4, 20102010-11-04
George Herold <gherold@teachspin.com> writes:> On Nov 3, 4:10 pm, Paul Keinanen <keina...@sci.fi> wrote: >> On Wed, 03 Nov 2010 03:52:19 -0400, Phil Hobbs >> >> <pcdhSpamMeSensel...@electrooptical.net> wrote: >> >It's a bridged amp design with a single-ended power supply. The output >> >of the cap multiplier is about +46.5 V with a +48 V input. >> >> With bridged configurations, shouldn't extreme opposite symmetry >> between the left and right side layout help in reducing differential >> ripple voltages ? >> >> Anyway, 1 nV ripple requirement seems a bit strange. > > Paul, it's not 1nV of ripple, but 1nV/rtHz of noise, which is not > quite as extreme.No, I think it was 1nV of ripple. IIRC he said 1V of 40kHz with 180dB of attenuation... [...] -- John Devereux
Reply by ●November 5, 20102010-11-05
On Nov 4, 4:24=A0pm, John Devereux <j...@devereux.me.uk> wrote:> George Herold <gher...@teachspin.com> writes: > > On Nov 3, 4:10=A0pm, Paul Keinanen <keina...@sci.fi> wrote: > >> On Wed, 03 Nov 2010 03:52:19 -0400, Phil Hobbs > > >> <pcdhSpamMeSensel...@electrooptical.net> wrote: > >> >It's a bridged amp design with a single-ended power supply. =A0The ou=tput> >> >of the cap multiplier is about +46.5 V with a +48 V input. > > >> With bridged configurations, shouldn't extreme opposite symmetry > >> between the left and right side layout help in reducing differential > >> ripple voltages ? > > >> Anyway, 1 nV ripple requirement seems a bit strange. > > > Paul, it's not 1nV of ripple, but 1nV/rtHz of noise, which is not > > quite as extreme. > > No, I think it was 1nV of ripple. IIRC he said 1V of 40kHz with 180dB of > attenuation... > > [...] > > -- > > John Devereux- Hide quoted text - > > - Show quoted text -Opps Sorry, my mistake. 'course that was only Phil's spice sim. In practice he may not do that well. George H.
Reply by ●November 5, 20102010-11-05
George Herold wrote:> On Nov 2, 1:48 am, Phil Hobbs<pcdhSpamMeSensel...@electrooptical.net> > wrote: >> So, I had this application requiring really absurd amounts of ripple >> rejection--it's a piezo driver in a laser wavelength locker that (for >> historical reasons) has to run off a fairly crappy dual isolated 48V >> DC-DC converter. The 48V has almost a half volt of ripple at 47 kHz, >> and the output noise needed to be in the nanovolts. >> >> As we've discussed here before, ordinary cap multipliers are limited by >> Early effect and collector-emitter capacitance. This one is a bit >> complicated--14 parts--but according to LTSPICE it provides 180 dB of >> ripple rejection from about 40 kHz to above 10 MHz. (In reality it >> won't be this good of course.) The interesting thing is that even with >> a it drops only about 1.5V, due to daisy-chaining the RC lowpasses--the >> second stage is biased from the base of the first stage instead of the >> emitter, which saves a diode drop. Adding the second stage requires >> only about 350 mV total. >> >> The remaining limitations are due to the combined Early effect of the >> transistors--very small, since they form a cascode pair--and all the >> interelectrode capacitances in series. >> >> Good medicine for the present problem! >> >> Cheers >> >> Phil Hobbs >> >> Q1 Q2 >> >> IN DNLS160 DNLS160 3 OUT >> >> 0-----*--- --------- ------RR-*--------0 >> | \ / \ / | >> | \ A \ A | >> | --------- --------- | >> 390 R | | === 47uF alum >> R | | | || 1uF X7R >> | 390 | 330 330 | | >> | | | GND >> *--RR---*---RR---*---RR---*----+ >> | | | | | >> | | | | R 91k >> === === === === R >> 1u | 1u | 1u | 1u | | >> | | | | | >> GND GND GND GND GND >> >> -- >> Dr Philip C D Hobbs >> Principal >> ElectroOptical Innovations >> 55 Orchard Rd >> Briarcliff Manor NY 10510 >> 845-480-2058 >> >> email: hobbs (atsign) electrooptical (period) nethttp://electrooptical.net > > This thread provided good fodder for thought. (Thanks Phil.) Though > the cap multiplier provides low noise, it�s got a few down sides as a > power supply. > First the output impedance is pretty poor. (a few ohms in the one > I�ve built.) Second the output voltage takes a while to settle down.. > and can wander around a bit. (Again this is for my incarnation of the > circuit. The wandering is at the 0.1mV level.) > > I thought I might be able to tame both these issues by sticking the > whole circuit inside a slow control loop. > > Something like this, > > (V+)-+------------------------+ > | | > P |\ | > 10k O<--R1R1--+---|+\ |/ c > T | |>--RR--| b Q1 > | C1 +-|-/ |\ e > GND C1 | |/ | > | | +-R2--+ > GND | | | > | | |/ c > | +--+----| b Q2 > | C2 |\ e > | | | > | GND | > +------------+--Load > | > GND > > I slapped this together on some white proto-board. And it seemed to > work OK. I�ll have to build it more carefully and put it in a metal > box to check the noise performance. > > A few questions, and comments. > > I built it first without the R1 C1 on the input. It was unstable. R2 > C2 forms the cap multiplier with a TC of ~10ms. I had to slow the > thing down. Is there some other way to slow down the loop? I�ve now > got the R1 C1 time equal to the R2 C2 time. > > After seeing Phil�s circuit I realized I could use the output of the > opamp as the reference for the cap mult. rather than the emitter Q1. > This gained about 0.5 Volts of head room. > > George H.I sometimes wrap really slow op amp loops around cap multipliers, but even with lead-lag compensation, it doesn't work that well. It's probably better to use a separate regulator after the cap multiplier if you really need a constant voltage. I typically don't use the supplies for voltage references when I can help it, so it's just a matter of the available output swing being slightly load dependent. Cheers Phil Hobbs
