In the simplified schematic for the Analog Devices AD825 there are two symbols I haven't seen before. One of them is an FET symbol and the other is a capacitor. These can be seen in Figure 32 on page 10 of the AD825 datasheet. The POS and NEG inputs each go the gate of FETs with this symbol. The capacitor symbol is labeled Cf and are connected to VOUT. Not sure if whay I'm looking at for Cf is unique symbol or it just indicates a layout feature. Thanks in advance.
Unfamiliar FET and capicitor schematic symbols
Started by ●January 10, 2017
Reply by ●January 10, 20172017-01-10
On 01/10/2017 11:05 AM, scott.hall@gmail.com wrote:> In the simplified schematic for the Analog Devices AD825 there are > two symbols I haven't seen before. One of them is an FET symbol and > the other is a capacitor. These can be seen in Figure 32 on page 10 > of the AD825 datasheet. The POS and NEG inputs each go the gate of > FETs with this symbol. The capacitor symbol is labeled Cf and are > connected to VOUT. Not sure if whay I'm looking at for Cf is unique > symbol or it just indicates a layout feature. > > Thanks in advance. >The circle on the FET inputs means that they're PFETs. (It's like the circle on an inverter output--they pull high when the gate goes low.) I've never seen the capacitor symbol, but on a SWAG it looks like they're showing which end of the cap is the top metal layer. Rolled film and oil+paper caps have markings for which lead is the outside foil. (This makes a big difference in their vulnerability to capacitive pickup.) Cheers Phil Hobbs -- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 hobbs at electrooptical dot net http://electrooptical.net
Reply by ●January 10, 20172017-01-10
On Tue, 10 Jan 2017 11:27:59 -0500, Phil Hobbs <pcdhSpamMeSenseless@electrooptical.net> wrote:>On 01/10/2017 11:05 AM, scott.hall@gmail.com wrote: >> In the simplified schematic for the Analog Devices AD825 there are >> two symbols I haven't seen before. One of them is an FET symbol and >> the other is a capacitor. These can be seen in Figure 32 on page 10 >> of the AD825 datasheet. The POS and NEG inputs each go the gate of >> FETs with this symbol. The capacitor symbol is labeled Cf and are >> connected to VOUT. Not sure if whay I'm looking at for Cf is unique >> symbol or it just indicates a layout feature. >> >> Thanks in advance. >> > >The circle on the FET inputs means that they're PFETs. (It's like the >circle on an inverter output--they pull high when the gate goes low.) > >I've never seen the capacitor symbol, but on a SWAG it looks like >they're showing which end of the cap is the top metal layer. Rolled >film and oil+paper caps have markings for which lead is the outside >foil. (This makes a big difference in their vulnerability to capacitive >pickup.) > >Cheers > >Phil HobbsIt's the TUB connection... the TUB is the isolating region/diffusion/implant that the capacitor is built into. It is likely a junction capacitance, but could be metal-over-Silicon (MOS). Metal-over-metal (MOM) caps typically/simply include a label, "TOP" or "BOT" ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | STV, Queen Creek, AZ 85142 Skype: skypeanalog | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 |
Reply by ●January 10, 20172017-01-10
On 01/10/2017 11:40 AM, Jim Thompson wrote:> On Tue, 10 Jan 2017 11:27:59 -0500, Phil Hobbs > <pcdhSpamMeSenseless@electrooptical.net> wrote: > >> On 01/10/2017 11:05 AM, scott.hall@gmail.com wrote: >>> In the simplified schematic for the Analog Devices AD825 there are >>> two symbols I haven't seen before. One of them is an FET symbol and >>> the other is a capacitor. These can be seen in Figure 32 on page 10 >>> of the AD825 datasheet. The POS and NEG inputs each go the gate of >>> FETs with this symbol. The capacitor symbol is labeled Cf and are >>> connected to VOUT. Not sure if whay I'm looking at for Cf is unique >>> symbol or it just indicates a layout feature. >>> >>> Thanks in advance. >>> >> >> The circle on the FET inputs means that they're PFETs. (It's like the >> circle on an inverter output--they pull high when the gate goes low.) >> >> I've never seen the capacitor symbol, but on a SWAG it looks like >> they're showing which end of the cap is the top metal layer. Rolled >> film and oil+paper caps have markings for which lead is the outside >> foil. (This makes a big difference in their vulnerability to capacitive >> pickup.) >> >> Cheers >> >> Phil Hobbs > > It's the TUB connection... the TUB is the isolating > region/diffusion/implant that the capacitor is built into. > > It is likely a junction capacitance, but could be metal-over-Silicon > (MOS). > > Metal-over-metal (MOM) caps typically/simply include a label, "TOP" or > "BOT" > > ...Jim Thompson >Interesting, thanks. Cheers Phil Hobbs -- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 hobbs at electrooptical dot net http://electrooptical.net
Reply by ●January 10, 20172017-01-10
On Tue, 10 Jan 2017 14:17:01 -0500, Phil Hobbs <pcdhSpamMeSenseless@electrooptical.net> wrote:>On 01/10/2017 11:40 AM, Jim Thompson wrote: >> On Tue, 10 Jan 2017 11:27:59 -0500, Phil Hobbs >> <pcdhSpamMeSenseless@electrooptical.net> wrote: >> >>> On 01/10/2017 11:05 AM, scott.hall@gmail.com wrote: >>>> In the simplified schematic for the Analog Devices AD825 there are >>>> two symbols I haven't seen before. One of them is an FET symbol and >>>> the other is a capacitor. These can be seen in Figure 32 on page 10 >>>> of the AD825 datasheet. The POS and NEG inputs each go the gate of >>>> FETs with this symbol. The capacitor symbol is labeled Cf and are >>>> connected to VOUT. Not sure if whay I'm looking at for Cf is unique >>>> symbol or it just indicates a layout feature. >>>> >>>> Thanks in advance. >>>> >>> >>> The circle on the FET inputs means that they're PFETs. (It's like the >>> circle on an inverter output--they pull high when the gate goes low.) >>> >>> I've never seen the capacitor symbol, but on a SWAG it looks like >>> they're showing which end of the cap is the top metal layer. Rolled >>> film and oil+paper caps have markings for which lead is the outside >>> foil. (This makes a big difference in their vulnerability to capacitive >>> pickup.) >>> >>> Cheers >>> >>> Phil Hobbs >> >> It's the TUB connection... the TUB is the isolating >> region/diffusion/implant that the capacitor is built into. >> >> It is likely a junction capacitance, but could be metal-over-Silicon >> (MOS). >> >> Metal-over-metal (MOM) caps typically/simply include a label, "TOP" or >> "BOT" >> >> ...Jim Thompson >> > >Interesting, thanks. > >Cheers > >Phil HobbsMostly I roll my own symbols in such a way that I can be sure to get those tub biases correct in the schematic, such that they netlist correctly, critical to getting the Silicon layout correct, and getting proper first-pass chip performance ;-) ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | STV, Queen Creek, AZ 85142 Skype: skypeanalog | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 |
Reply by ●January 10, 20172017-01-10
On Tue, 10 Jan 2017 12:25:13 -0700, Jim Thompson <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote:>On Tue, 10 Jan 2017 14:17:01 -0500, Phil Hobbs ><pcdhSpamMeSenseless@electrooptical.net> wrote: > >>On 01/10/2017 11:40 AM, Jim Thompson wrote: >>> On Tue, 10 Jan 2017 11:27:59 -0500, Phil Hobbs >>> <pcdhSpamMeSenseless@electrooptical.net> wrote: >>> >>>> On 01/10/2017 11:05 AM, scott.hall@gmail.com wrote: >>>>> In the simplified schematic for the Analog Devices AD825 there are >>>>> two symbols I haven't seen before. One of them is an FET symbol and >>>>> the other is a capacitor. These can be seen in Figure 32 on page 10 >>>>> of the AD825 datasheet. The POS and NEG inputs each go the gate of >>>>> FETs with this symbol. The capacitor symbol is labeled Cf and are >>>>> connected to VOUT. Not sure if whay I'm looking at for Cf is unique >>>>> symbol or it just indicates a layout feature. >>>>> >>>>> Thanks in advance. >>>>> >>>> >>>> The circle on the FET inputs means that they're PFETs. (It's like the >>>> circle on an inverter output--they pull high when the gate goes low.) >>>> >>>> I've never seen the capacitor symbol, but on a SWAG it looks like >>>> they're showing which end of the cap is the top metal layer. Rolled >>>> film and oil+paper caps have markings for which lead is the outside >>>> foil. (This makes a big difference in their vulnerability to capacitive >>>> pickup.) >>>> >>>> Cheers >>>> >>>> Phil Hobbs >>> >>> It's the TUB connection... the TUB is the isolating >>> region/diffusion/implant that the capacitor is built into. >>> >>> It is likely a junction capacitance, but could be metal-over-Silicon >>> (MOS). >>> >>> Metal-over-metal (MOM) caps typically/simply include a label, "TOP" or >>> "BOT" >>> >>> ...Jim Thompson >>> >> >>Interesting, thanks. >> >>Cheers >> >>Phil Hobbs > >Mostly I roll my own symbols in such a way that I can be sure to get >those tub biases correct in the schematic, such that they netlist >correctly, critical to getting the Silicon layout correct, and getting >proper first-pass chip performance ;-) > > ...Jim ThompsonI should have added that _symbols_ are simply visual aids for the human examiner... what matters is not directly visible on the schematic, the underlying _template_ which defines how the symbol netlists. ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | STV, Queen Creek, AZ 85142 Skype: skypeanalog | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 |
Reply by ●January 10, 20172017-01-10
On Tue, 10 Jan 2017 12:28:30 -0700, Jim Thompson wrote:> On Tue, 10 Jan 2017 12:25:13 -0700, Jim Thompson > <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote: > >>On Tue, 10 Jan 2017 14:17:01 -0500, Phil Hobbs >><pcdhSpamMeSenseless@electrooptical.net> wrote: >> >>>On 01/10/2017 11:40 AM, Jim Thompson wrote: >>>> On Tue, 10 Jan 2017 11:27:59 -0500, Phil Hobbs >>>> <pcdhSpamMeSenseless@electrooptical.net> wrote: >>>> >>>>> On 01/10/2017 11:05 AM, scott.hall@gmail.com wrote: >>>>>> In the simplified schematic for the Analog Devices AD825 there are >>>>>> two symbols I haven't seen before. One of them is an FET symbol and >>>>>> the other is a capacitor. These can be seen in Figure 32 on page 10 >>>>>> of the AD825 datasheet. The POS and NEG inputs each go the gate of >>>>>> FETs with this symbol. The capacitor symbol is labeled Cf and are >>>>>> connected to VOUT. Not sure if whay I'm looking at for Cf is unique >>>>>> symbol or it just indicates a layout feature. >>>>>> >>>>>> Thanks in advance. >>>>>> >>>>>> >>>>> The circle on the FET inputs means that they're PFETs. (It's like >>>>> the circle on an inverter output--they pull high when the gate goes >>>>> low.) >>>>> >>>>> I've never seen the capacitor symbol, but on a SWAG it looks like >>>>> they're showing which end of the cap is the top metal layer. Rolled >>>>> film and oil+paper caps have markings for which lead is the outside >>>>> foil. (This makes a big difference in their vulnerability to >>>>> capacitive pickup.) >>>>> >>>>> Cheers >>>>> >>>>> Phil Hobbs >>>> >>>> It's the TUB connection... the TUB is the isolating >>>> region/diffusion/implant that the capacitor is built into. >>>> >>>> It is likely a junction capacitance, but could be metal-over-Silicon >>>> (MOS). >>>> >>>> Metal-over-metal (MOM) caps typically/simply include a label, "TOP" >>>> or "BOT" >>>> >>>> ...Jim Thompson >>>> >>>> >>>Interesting, thanks. >>> >>>Cheers >>> >>>Phil Hobbs >> >>Mostly I roll my own symbols in such a way that I can be sure to get >>those tub biases correct in the schematic, such that they netlist >>correctly, critical to getting the Silicon layout correct, and getting >>proper first-pass chip performance ;-) >> >> ...Jim Thompson > > I should have added that _symbols_ are simply visual aids for the human > examiner... what matters is not directly visible on the schematic, the > underlying _template_ which defines how the symbol netlists.In the case of that schematic there's a good chance that it was done by some drawing program, by whatever person was tasked with making the data sheet pretty. -- Tim Wescott Wescott Design Services http://www.wescottdesign.com I'm looking for work -- see my website!
Reply by ●January 10, 20172017-01-10
On Tue, 10 Jan 2017 18:03:27 -0600, Tim Wescott <seemywebsite@myfooter.really> wrote:>On Tue, 10 Jan 2017 12:28:30 -0700, Jim Thompson wrote: > >> On Tue, 10 Jan 2017 12:25:13 -0700, Jim Thompson >> <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote: >> >>>On Tue, 10 Jan 2017 14:17:01 -0500, Phil Hobbs >>><pcdhSpamMeSenseless@electrooptical.net> wrote: >>> >>>>On 01/10/2017 11:40 AM, Jim Thompson wrote: >>>>> On Tue, 10 Jan 2017 11:27:59 -0500, Phil Hobbs >>>>> <pcdhSpamMeSenseless@electrooptical.net> wrote: >>>>> >>>>>> On 01/10/2017 11:05 AM, scott.hall@gmail.com wrote: >>>>>>> In the simplified schematic for the Analog Devices AD825 there are >>>>>>> two symbols I haven't seen before. One of them is an FET symbol and >>>>>>> the other is a capacitor. These can be seen in Figure 32 on page 10 >>>>>>> of the AD825 datasheet. The POS and NEG inputs each go the gate of >>>>>>> FETs with this symbol. The capacitor symbol is labeled Cf and are >>>>>>> connected to VOUT. Not sure if whay I'm looking at for Cf is unique >>>>>>> symbol or it just indicates a layout feature. >>>>>>> >>>>>>> Thanks in advance. >>>>>>> >>>>>>> >>>>>> The circle on the FET inputs means that they're PFETs. (It's like >>>>>> the circle on an inverter output--they pull high when the gate goes >>>>>> low.) >>>>>> >>>>>> I've never seen the capacitor symbol, but on a SWAG it looks like >>>>>> they're showing which end of the cap is the top metal layer. Rolled >>>>>> film and oil+paper caps have markings for which lead is the outside >>>>>> foil. (This makes a big difference in their vulnerability to >>>>>> capacitive pickup.) >>>>>> >>>>>> Cheers >>>>>> >>>>>> Phil Hobbs >>>>> >>>>> It's the TUB connection... the TUB is the isolating >>>>> region/diffusion/implant that the capacitor is built into. >>>>> >>>>> It is likely a junction capacitance, but could be metal-over-Silicon >>>>> (MOS). >>>>> >>>>> Metal-over-metal (MOM) caps typically/simply include a label, "TOP" >>>>> or "BOT" >>>>> >>>>> ...Jim Thompson >>>>> >>>>> >>>>Interesting, thanks. >>>> >>>>Cheers >>>> >>>>Phil Hobbs >>> >>>Mostly I roll my own symbols in such a way that I can be sure to get >>>those tub biases correct in the schematic, such that they netlist >>>correctly, critical to getting the Silicon layout correct, and getting >>>proper first-pass chip performance ;-) >>> >>> ...Jim Thompson >> >> I should have added that _symbols_ are simply visual aids for the human >> examiner... what matters is not directly visible on the schematic, the >> underlying _template_ which defines how the symbol netlists. > >In the case of that schematic there's a good chance that it was done by >some drawing program, by whatever person was tasked with making the data >sheet pretty.PSpice Schematics DO netlist properly. ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | STV, Queen Creek, AZ 85142 Skype: skypeanalog | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 |
Reply by ●January 11, 20172017-01-11
On Tuesday, January 10, 2017 at 11:05:43 AM UTC-5, scott...@gmail.com wrote:> In the simplified schematic for the Analog Devices AD825 there are two symbols I haven't seen before. One of them is an FET symbol and the other is a capacitor. These can be seen in Figure 32 on page 10 of the AD825 datasheet. The POS and NEG inputs each go the gate of FETs with this symbol. The capacitor symbol is labeled Cf and are connected to VOUT. Not sure if whay I'm looking at for Cf is unique symbol or it just indicates a layout feature. > > Thanks in advance.Thanks very much for all the replies.
Reply by ●January 12, 20172017-01-12
On Tue, 10 Jan 2017 17:16:04 -0700, Jim Thompson wrote:> On Tue, 10 Jan 2017 18:03:27 -0600, Tim Wescott > <seemywebsite@myfooter.really> wrote: > >>On Tue, 10 Jan 2017 12:28:30 -0700, Jim Thompson wrote: >> >>> On Tue, 10 Jan 2017 12:25:13 -0700, Jim Thompson >>> <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote: >>> >>>>On Tue, 10 Jan 2017 14:17:01 -0500, Phil Hobbs >>>><pcdhSpamMeSenseless@electrooptical.net> wrote: >>>> >>>>>On 01/10/2017 11:40 AM, Jim Thompson wrote: >>>>>> On Tue, 10 Jan 2017 11:27:59 -0500, Phil Hobbs >>>>>> <pcdhSpamMeSenseless@electrooptical.net> wrote: >>>>>> >>>>>>> On 01/10/2017 11:05 AM, scott.hall@gmail.com wrote: >>>>>>>> In the simplified schematic for the Analog Devices AD825 there >>>>>>>> are two symbols I haven't seen before. One of them is an FET >>>>>>>> symbol and the other is a capacitor. These can be seen in Figure >>>>>>>> 32 on page 10 of the AD825 datasheet. The POS and NEG inputs each >>>>>>>> go the gate of FETs with this symbol. The capacitor symbol is >>>>>>>> labeled Cf and are connected to VOUT. Not sure if whay I'm >>>>>>>> looking at for Cf is unique symbol or it just indicates a layout >>>>>>>> feature. >>>>>>>> >>>>>>>> Thanks in advance. >>>>>>>> >>>>>>>> >>>>>>> The circle on the FET inputs means that they're PFETs. (It's like >>>>>>> the circle on an inverter output--they pull high when the gate >>>>>>> goes low.) >>>>>>> >>>>>>> I've never seen the capacitor symbol, but on a SWAG it looks like >>>>>>> they're showing which end of the cap is the top metal layer. >>>>>>> Rolled film and oil+paper caps have markings for which lead is the >>>>>>> outside foil. (This makes a big difference in their vulnerability >>>>>>> to capacitive pickup.) >>>>>>> >>>>>>> Cheers >>>>>>> >>>>>>> Phil Hobbs >>>>>> >>>>>> It's the TUB connection... the TUB is the isolating >>>>>> region/diffusion/implant that the capacitor is built into. >>>>>> >>>>>> It is likely a junction capacitance, but could be >>>>>> metal-over-Silicon (MOS). >>>>>> >>>>>> Metal-over-metal (MOM) caps typically/simply include a label, "TOP" >>>>>> or "BOT" >>>>>> >>>>>> ...Jim Thompson >>>>>> >>>>>> >>>>>Interesting, thanks. >>>>> >>>>>Cheers >>>>> >>>>>Phil Hobbs >>>> >>>>Mostly I roll my own symbols in such a way that I can be sure to get >>>>those tub biases correct in the schematic, such that they netlist >>>>correctly, critical to getting the Silicon layout correct, and getting >>>>proper first-pass chip performance ;-) >>>> >>>> ...Jim Thompson >>> >>> I should have added that _symbols_ are simply visual aids for the >>> human examiner... what matters is not directly visible on the >>> schematic, the underlying _template_ which defines how the symbol >>> netlists. >> >>In the case of that schematic there's a good chance that it was done by >>some drawing program, by whatever person was tasked with making the data >>sheet pretty. > > PSpice Schematics DO netlist properly. >But did that schematic come out of PSpice? -- Tim Wescott Wescott Design Services http://www.wescottdesign.com I'm looking for work -- see my website!
