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Simulating Power Bandwidth

Started by Jim Thompson May 24, 2014
I'm trying to do a simulation to show power bandwidth for a (high
power) OpAmp versus compensation capacitor.

In the lab I would simply crank up the signal generator amplitude
until the output became triangular rather than sinusoidal.

Collect all the data for peak amplitudes versus frequency and then
plot.

Any ideas how I might do that automatically in a simulator, generating
a family of curves that looks like this...

 <http://www.analog-innovations.com/SED/PowerBandwidth_2014_05_08.png>

(I have performance Analysis in PSpice Probe available; or LTspice, if
it can do such a thing.)
		
                                        ...Jim Thompson
-- 
| James E.Thompson                                 |    mens     |
| Analog Innovations                               |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| San Tan Valley, AZ 85142   Skype: Contacts Only  |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |
             
                        #BringBackOurBalls
try second time....

On Sat, 24 May 2014 14:20:04 -0700, Jim Thompson  
<To-Email-Use-The-Envelope-Icon@on-my-web-site.com> wrote:

I'm trying to do a simulation to show power bandwidth for a (high
power) OpAmp versus compensation capacitor.

In the lab I would simply crank up the signal generator amplitude
until the output became triangular rather than sinusoidal.

Collect all the data for peak amplitudes versus frequency and then
plot.

Any ideas how I might do that automatically in a simulator, generating
a family of curves that looks like this...

  <http://www.analog-innovations.com/SED/PowerBandwidth_2014_05_08.png>

(I have performance Analysis in PSpice Probe available; or LTspice, if
it can do such a thing.)
		
                                         ...Jim Thompson

Are you after the Fundamental, or after 'individual' harmonics' energy?  
The fundamental limit is not a 'hard' limit, is it? So you must have some  
rule to determine 'when' you reach the max.

Does not matter, you can manipulate the data anyway you want,
plot ?? = (fundamental Energy)/(total output signal Energy).
Do anything you want.

If so, do that all the time, will put together a package and send to you.

remember how I combined .tran and .noise to create .tranoise analysis?  
After using .tranoise analyses, I can also REMOVE all signal tones to find  
the residual noise floor. You'd be surprised how the noise floor is a  
function of signal, distortion, etc.

 
On Sat, 24 May 2014 14:20:04 -0700, Jim Thompson  
<To-Email-Use-The-Envelope-Icon@on-my-web-site.com> wrote:

> I'm trying to do a simulation to show power bandwidth for a (high > power) OpAmp versus compensation capacitor. > > In the lab I would simply crank up the signal generator amplitude > until the output became triangular rather than sinusoidal. > > Collect all the data for peak amplitudes versus frequency and then > plot. > > Any ideas how I might do that automatically in a simulator, generating > a family of curves that looks like this... > > <http://www.analog-innovations.com/SED/PowerBandwidth_2014_05_08.png> > > (I have performance Analysis in PSpice Probe available; or LTspice, if > it can do such a thing.) > > ...Jim Thompson
Did you get an answer for this question? Just checked on a LT1028 powered with +/- 12Vdc as a simple inverter 1k, 1k resistors into a 2k 2.2pF load driven into slew rate limit with 7Vpk 1MHz. with 2.2pF, 10pF bypass caps. Not sure I trust the results because the way the LTspice 'bobbles' the bias around due to the large current surges at crossovers. Interestingly, I get 'close' to the FFT in LT's plot, but several things just aren't right when you purposely 'abuse' a component like that. What amp you trying to step the cap with? what circuitry?
On Tue, 27 May 2014 06:37:33 -0700, RobertMacy
<robert.a.macy@gmail.com> wrote:

>On Sat, 24 May 2014 14:20:04 -0700, Jim Thompson ><To-Email-Use-The-Envelope-Icon@on-my-web-site.com> wrote: > >> I'm trying to do a simulation to show power bandwidth for a (high >> power) OpAmp versus compensation capacitor. >> >> In the lab I would simply crank up the signal generator amplitude >> until the output became triangular rather than sinusoidal. >> >> Collect all the data for peak amplitudes versus frequency and then >> plot. >> >> Any ideas how I might do that automatically in a simulator, generating >> a family of curves that looks like this... >> >> <http://www.analog-innovations.com/SED/PowerBandwidth_2014_05_08.png> >> >> (I have performance Analysis in PSpice Probe available; or LTspice, if >> it can do such a thing.) >> >> ...Jim Thompson > >Did you get an answer for this question? > >Just checked on a LT1028 powered with +/- 12Vdc as a simple inverter 1k, >1k resistors into a 2k 2.2pF load driven into slew rate limit with 7Vpk >1MHz. with 2.2pF, 10pF bypass caps. Not sure I trust the results because >the way the LTspice 'bobbles' the bias around due to the large current >surges at crossovers. > >Interestingly, I get 'close' to the FFT in LT's plot, but several things >just aren't right when you purposely 'abuse' a component like that. > >What amp you trying to step the cap with? what circuitry?
Can't talk ;-) I've given up (for the moment) and I'll leave it to the lab guys to generate the data. The official definition is the max peak-to-peak SINE wave that can be handled. (In my particular case, I have a similar bias "bobbling" issue which blows self-peak-sampling... I had that working at the low end, but it goes haywire at a few hundred kHz.) ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: skypeanalog | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | #BringBackOurBalls
On Tue, 27 May 2014 09:05:49 -0700, Jim Thompson  
<To-Email-Use-The-Envelope-Icon@on-my-web-site.com> wrote:

>> ...snip.... > Can't talk ;-) > > I've given up (for the moment) and I'll leave it to the lab guys to > generate the data. > > The official definition is the max peak-to-peak SINE wave that can be > handled. > > (In my particular case, I have a similar bias "bobbling" issue which > blows self-peak-sampling... I had that working at the low end, but it > goes haywire at a few hundred kHz.) > > ...Jim Thompson
understand.
> The official definition is the max peak-to-peak SINE wave that can be > handled.
handled before what? The 'bobbling' is exacerbated at crossovers. I just ran the LT1028 with 7 Vpk at 1MHz and found some WILD current transients at crossovers from both supplies. All the 'bobbling' stopped when I forced the step size small enough to not have the error estimations, etc. interact with the approximation processes in the solver. For example, for 1MHz I had to go to maximum steps of 2nS !!! That's right. Larger steps, caused a 'walking' in the output that injected an immense amount of noise below 1MHz. PS: Thanks to you I used your tanh trick to 'smoothly' initiate the drive into the LT1028 else even the startup transient took a long time to recover from. I used the drive of 7.07 sin( 2 pi 1MHz t), but I multiplied it times a ramp up that took about 100microseconds to get the sine wave up, still caused significant spiking just before where I started taking data. again, take the sine wave time a scaled (tanh(k*time-5) + 1)/2 gives a nice clean 0 ramp quickly up to 1 within the first 100microseconds then use .tran 0 1.1m 0.1m 2nS to throw away all that transient stuff to get clean fft's and all went extremely well.
On Tue, 27 May 2014 17:30:52 -0700, RobertMacy
<robert.a.macy@gmail.com> wrote:

>On Tue, 27 May 2014 09:05:49 -0700, Jim Thompson ><To-Email-Use-The-Envelope-Icon@on-my-web-site.com> wrote: > >>> ...snip.... >> Can't talk ;-) >> >> I've given up (for the moment) and I'll leave it to the lab guys to >> generate the data. >> >> The official definition is the max peak-to-peak SINE wave that can be >> handled. >> >> (In my particular case, I have a similar bias "bobbling" issue which >> blows self-peak-sampling... I had that working at the low end, but it >> goes haywire at a few hundred kHz.) >> >> ...Jim Thompson > >understand. > >> The official definition is the max peak-to-peak SINE wave that can be >> handled. > >handled before what?
No longer sinusoidal.... it's a leftist-level definition >:-}
> > >The 'bobbling' is exacerbated at crossovers. I just ran the LT1028 with 7 >Vpk at 1MHz and found some WILD current transients at crossovers from both >supplies. All the 'bobbling' stopped when I forced the step size small >enough to not have the error estimations, etc. interact with the >approximation processes in the solver. > >For example, for 1MHz I had to go to maximum steps of 2nS !!! That's >right. Larger steps, caused a 'walking' in the output that injected an >immense amount of noise below 1MHz. > > >PS: Thanks to you I used your tanh trick to 'smoothly' initiate the drive >into the LT1028 else even the startup transient took a long time to >recover from. > >I used the drive of 7.07 sin( 2 pi 1MHz t), but I multiplied it times a >ramp up that took about 100microseconds to get the sine wave up, still >caused significant spiking just before where I started taking data. > >again, take the sine wave time a scaled (tanh(k*time-5) + 1)/2 gives a >nice clean 0 ramp quickly up to 1 within the first 100microseconds > >then use .tran 0 1.1m 0.1m 2nS >to throw away all that transient stuff to get clean fft's >and all went extremely well.
I _love_ TANH ;-) ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: skypeanalog | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
"RobertMacy" <robert.a.macy@gmail.com> wrote in message 
news:op.xgjnprcs2cx0wh@ajm...
> The 'bobbling' is exacerbated at crossovers. I just ran the LT1028 with > 7 > Vpk at 1MHz and found some WILD current transients at crossovers from > both supplies. All the 'bobbling' stopped when I forced the step size > small enough to not have the error estimations, etc. interact with the > approximation processes in the solver.
I don't get "bobbling" in my simulations. Did you neglect to change the integration method from TRAP to GEAR? :) Tim -- Seven Transistor Labs Electrical Engineering Consultation Website: http://seventransistorlabs.com
I can hold my tpnue no longer. How the fuck can an accomp;lished engineer like you not get this. It is so fucng simple. 

the bandwidth of an amp is what is it, but the power bandwidth is what the output stae (and its asociates) cn deliver. 

I mean like come on, you are not talking some fuckin weirdo ass shit here. 

I dunno anymore, should I just...

?
On Tue, 27 May 2014 18:32:10 -0700, Jim Thompson  
<To-Email-Use-The-Envelope-Icon@on-my-web-site.com> wrote:

> On Tue, 27 May 2014 17:30:52 -0700, RobertMacy > <robert.a.macy@gmail.com> wrote: >> ...snip... >> handled before what? > > No longer sinusoidal.... it's a leftist-level definition >:-}
Took half hour but I finally got it. [passing hand over forehead, saying whoosh]
On Wed, 28 May 2014 01:17:09 -0700, Tim Williams <tmoranwms@charter.net>  
wrote:

> "RobertMacy" <robert.a.macy@gmail.com> wrote in message > news:op.xgjnprcs2cx0wh@ajm... >> The 'bobbling' is exacerbated at crossovers. I just ran the LT1028 with >> 7 >> Vpk at 1MHz and found some WILD current transients at crossovers from >> both supplies. All the 'bobbling' stopped when I forced the step size >> small enough to not have the error estimations, etc. interact with the >> approximation processes in the solver. > > I don't get "bobbling" in my simulations. Did you neglect to change the > integration method from TRAP to GEAR? :) > > Tim >
Neglect?! spit! sputter! what the heck is that?! Again, and as usual, can't find any reference in the manual. Thanks, found it as .options method=gear or something like that, but no explanation of the impact of selecting that non-default value. Will try it. Has to make it faster than forcing the step size to be 50 times smaller. Exactly where is a good description for all these options?