On 4/14/2017 6:34 PM, bitrex wrote:> On 04/14/2017 05:16 PM, rickman wrote: > >> Do you really not understand what that means? With both HC and 4000 the >> absolute minimum means damage can occur and is -0.5 volts for both. HC >> has a "specified" operation from 2.0 to 6.0 or whatever limits the maker >> provides. That means the data is guaranteed over that range of Vcc. For >> 4000 series parts I find separate specs for operation at 5 10 and 15 >> volts Vdd. > > I'm not intimately familiar with the operating parameters of an > antiquated glue-logic series that probably came out nearly two decades > before I was born, no. > > All I can go by is what the datasheets say, and they often don't explain > things too good. For example this whitepaper on the HCMOS family from > Phillips doesn't say anything about -0.5 volts anywhere as far as I can > tell: > > <https://www.cl.cam.ac.uk/teaching/2003/DigElec/part2-data.pdf>The spec of -0.5 volts on Vdd (or Vcc or whatever name they use for the positive rail) means that pin should not go more than 0.5 volts below the ground pin. This is nothing particular to 4000 series parts or logic parts for that matter. This is a fundamental spec in nearly all active device data sheets. I'm sure it is not mentioned in the above white paper because it is pretty basic so they assumed they didn't need to cover it. -- Rick C
Mixing 4000-series CMOS and 74HC in a 5V system - any issues?
Started by ●April 13, 2017
Reply by ●April 14, 20172017-04-14
Reply by ●April 14, 20172017-04-14
On 4/14/2017 6:48 PM, bitrex wrote:> On 04/14/2017 06:34 PM, bitrex wrote: >> On 04/14/2017 05:16 PM, rickman wrote: >> >>> Do you really not understand what that means? With both HC and 4000 the >>> absolute minimum means damage can occur and is -0.5 volts for both. HC >>> has a "specified" operation from 2.0 to 6.0 or whatever limits the maker >>> provides. That means the data is guaranteed over that range of Vcc. For >>> 4000 series parts I find separate specs for operation at 5 10 and 15 >>> volts Vdd. >> >> I'm not intimately familiar with the operating parameters of an >> antiquated glue-logic series that probably came out nearly two decades >> before I was born, no. >> >> All I can go by is what the datasheets say, and they often don't explain >> things too good. For example this whitepaper on the HCMOS family from >> Phillips doesn't say anything about -0.5 volts anywhere as far as I can >> tell: >> >> <https://www.cl.cam.ac.uk/teaching/2003/DigElec/part2-data.pdf> > > Nevermind, it does down in the specifics. > > Whatever old datasheet for the 4000 series I was looking at seemed to > give the impression that -0.5 was the minimum "recommended" operating > voltage. Which wouldn't make sense as I don't see how it could function > with the rails inverted. It's confusing to put that figure along with > "typ" and "max" in a table, I think it should just be put in the > "Absolute Maximum Ratings" section.That's where I find it, absolute maximum ratings. You are right in that it has no place in recommended operating data. -- Rick C
Reply by ●April 14, 20172017-04-14
On Fri, 14 Apr 2017 14:03:08 -0400, rickman <gnuarm@gmail.com> wrote:>On 4/14/2017 1:54 PM, Spehro Pefhany wrote: >> On Thu, 13 Apr 2017 22:45:06 -0500, the renowned Tim Wescott >> <tim@seemywebsite.com> wrote: >> >>> On Thu, 13 Apr 2017 20:26:38 -0400, Steve Goldstein wrote: >>> >>>> Do 4000-series CMOS inputs have any problems coping with the much faster >>>> edge rates of 74HC outputs? Everything would be running on 5V, >>>> of course. It's all "just" digital logic, but sometimes the transistors >>>> inside forget that... >>>> >>>> And yes, I know I could use a processor and write code instead of using >>>> a few packages of random logic. That's not my desire. >>> >>> AFAIK pretty much anything that's currently available in 4000-series is >>> available in 74HC4000-series. What's not there? >> >> There are a whole lot that are not, but they're not not usually what >> we would strongly consider for a production situation because they're >> probably on the way out. >> >> Eg. 4054,55, 56, 4062, 4068, 4089, etc. etc. > >Mostly that's because if you are using three of any of these devices you >can do better with programmable logic or software. When designing >something for production it's not very often programmable logic or >software are just tossed aside without consideration. This is obviously >not a serious commercial design.Correct, this is a little something just for fun. All my serious designs use rather exotic monolithic processes with full dielectric isolation, complementary bipolar with SiGe, and CMOS. That's a different kind of fun, but it pays the bills.
Reply by ●April 14, 20172017-04-14
On 4/14/2017 10:15 PM, Steve Goldstein wrote:> On Fri, 14 Apr 2017 14:03:08 -0400, rickman <gnuarm@gmail.com> wrote: > >> On 4/14/2017 1:54 PM, Spehro Pefhany wrote: >>> On Thu, 13 Apr 2017 22:45:06 -0500, the renowned Tim Wescott >>> <tim@seemywebsite.com> wrote: >>> >>>> On Thu, 13 Apr 2017 20:26:38 -0400, Steve Goldstein wrote: >>>> >>>>> Do 4000-series CMOS inputs have any problems coping with the much faster >>>>> edge rates of 74HC outputs? Everything would be running on 5V, >>>>> of course. It's all "just" digital logic, but sometimes the transistors >>>>> inside forget that... >>>>> >>>>> And yes, I know I could use a processor and write code instead of using >>>>> a few packages of random logic. That's not my desire. >>>> >>>> AFAIK pretty much anything that's currently available in 4000-series is >>>> available in 74HC4000-series. What's not there? >>> >>> There are a whole lot that are not, but they're not not usually what >>> we would strongly consider for a production situation because they're >>> probably on the way out. >>> >>> Eg. 4054,55, 56, 4062, 4068, 4089, etc. etc. >> >> Mostly that's because if you are using three of any of these devices you >> can do better with programmable logic or software. When designing >> something for production it's not very often programmable logic or >> software are just tossed aside without consideration. This is obviously >> not a serious commercial design. > > Correct, this is a little something just for fun. All my serious > designs use rather exotic monolithic processes with full dielectric > isolation, complementary bipolar with SiGe, and CMOS. That's a > different kind of fun, but it pays the bills.If the entire circuit is CMOS I don't see mixing the two families giving you any trouble. The issue is noise causing double clocking on a slow edge. Are you generating any clocks from logic? Are you driving any clocks from a slow edge? If not, don't sweat it. With the experience you have I guess you just aren't used to low power, slow logic, eh? -- Rick C
Reply by ●April 15, 20172017-04-15
On Fri, 14 Apr 2017 22:43:23 -0400, rickman <gnuarm@gmail.com> wrote:>On 4/14/2017 10:15 PM, Steve Goldstein wrote: >> On Fri, 14 Apr 2017 14:03:08 -0400, rickman <gnuarm@gmail.com> wrote: >> >>> On 4/14/2017 1:54 PM, Spehro Pefhany wrote: >>>> On Thu, 13 Apr 2017 22:45:06 -0500, the renowned Tim Wescott >>>> <tim@seemywebsite.com> wrote: >>>> >>>>> On Thu, 13 Apr 2017 20:26:38 -0400, Steve Goldstein wrote: >>>>> >>>>>> Do 4000-series CMOS inputs have any problems coping with the much faster >>>>>> edge rates of 74HC outputs? Everything would be running on 5V, >>>>>> of course. It's all "just" digital logic, but sometimes the transistors >>>>>> inside forget that... >>>>>> >>>>>> And yes, I know I could use a processor and write code instead of using >>>>>> a few packages of random logic. That's not my desire. >>>>> >>>>> AFAIK pretty much anything that's currently available in 4000-series is >>>>> available in 74HC4000-series. What's not there? >>>> >>>> There are a whole lot that are not, but they're not not usually what >>>> we would strongly consider for a production situation because they're >>>> probably on the way out. >>>> >>>> Eg. 4054,55, 56, 4062, 4068, 4089, etc. etc. >>> >>> Mostly that's because if you are using three of any of these devices you >>> can do better with programmable logic or software. When designing >>> something for production it's not very often programmable logic or >>> software are just tossed aside without consideration. This is obviously >>> not a serious commercial design. >> >> Correct, this is a little something just for fun. All my serious >> designs use rather exotic monolithic processes with full dielectric >> isolation, complementary bipolar with SiGe, and CMOS. That's a >> different kind of fun, but it pays the bills. > >If the entire circuit is CMOS I don't see mixing the two families giving >you any trouble. The issue is noise causing double clocking on a slow >edge. Are you generating any clocks from logic? Are you driving any >clocks from a slow edge? If not, don't sweat it. > >With the experience you have I guess you just aren't used to low power, >slow logic, eh?I've done my share of low power and logic stuff too, but it's been either monolithic or all in one family, with edge rates pretty much the same across the board, subject of course to loading and proper drive sizing. But mixing 74HC and 4000-series is a different kettle of fish. HC edge rates at 5V are two orders of magnitude faster. 4000 logic was introduced decades before 74HC, so fast edges were never really a consideration. My main concern was whether there might be something in these designs that had problems with significantly faster edges, info that might not have been known at the time and thus wouldn't have made it into the old RCA datasheets that continue to be copied over the years. Given the basic logic design I wouldn't expect that as a problem, but I thought I'd ask since it could be painful to debug.
Reply by ●April 15, 20172017-04-15
On 04/14/2017 07:12 PM, rickman wrote:> On 4/14/2017 6:34 PM, bitrex wrote: >> On 04/14/2017 05:16 PM, rickman wrote: >> >>> Do you really not understand what that means? With both HC and 4000 the >>> absolute minimum means damage can occur and is -0.5 volts for both. HC >>> has a "specified" operation from 2.0 to 6.0 or whatever limits the maker >>> provides. That means the data is guaranteed over that range of Vcc. For >>> 4000 series parts I find separate specs for operation at 5 10 and 15 >>> volts Vdd. >> >> I'm not intimately familiar with the operating parameters of an >> antiquated glue-logic series that probably came out nearly two decades >> before I was born, no. >> >> All I can go by is what the datasheets say, and they often don't explain >> things too good. For example this whitepaper on the HCMOS family from >> Phillips doesn't say anything about -0.5 volts anywhere as far as I can >> tell: >> >> <https://www.cl.cam.ac.uk/teaching/2003/DigElec/part2-data.pdf> > > The spec of -0.5 volts on Vdd (or Vcc or whatever name they use for the > positive rail) means that pin should not go more than 0.5 volts below > the ground pin. This is nothing particular to 4000 series parts or > logic parts for that matter. This is a fundamental spec in nearly all > active device data sheets. I'm sure it is not mentioned in the above > white paper because it is pretty basic so they assumed they didn't need > to cover it.I'm guessing they're a little vague about what the absolute minimum voltage where the part won't be damaged but stops operating properly is because the manufacturer doesn't know themselves for any particular instance of the part; if you could make an "ideal" MOSFET with an infinitesimally small threshold voltage and on resistance then a CMOS gate should work fine with the rails arbitrarily close to each other. So there's some distribution of real-world on resistances and threshold voltages for the process they're using to make the chips, and 2 or 3 volts minimum "recommended" respectively is just the threshold where they can statistically guarantee from population extrapolation from a random sample that 99.9....% of instances will operate as expected.
Reply by ●April 15, 20172017-04-15
On 4/15/2017 7:13 AM, Steve Goldstein wrote:> On Fri, 14 Apr 2017 22:43:23 -0400, rickman <gnuarm@gmail.com> wrote: > >> On 4/14/2017 10:15 PM, Steve Goldstein wrote: >>> On Fri, 14 Apr 2017 14:03:08 -0400, rickman <gnuarm@gmail.com> wrote: >>> >>>> On 4/14/2017 1:54 PM, Spehro Pefhany wrote: >>>>> On Thu, 13 Apr 2017 22:45:06 -0500, the renowned Tim Wescott >>>>> <tim@seemywebsite.com> wrote: >>>>> >>>>>> On Thu, 13 Apr 2017 20:26:38 -0400, Steve Goldstein wrote: >>>>>> >>>>>>> Do 4000-series CMOS inputs have any problems coping with the much faster >>>>>>> edge rates of 74HC outputs? Everything would be running on 5V, >>>>>>> of course. It's all "just" digital logic, but sometimes the transistors >>>>>>> inside forget that... >>>>>>> >>>>>>> And yes, I know I could use a processor and write code instead of using >>>>>>> a few packages of random logic. That's not my desire. >>>>>> >>>>>> AFAIK pretty much anything that's currently available in 4000-series is >>>>>> available in 74HC4000-series. What's not there? >>>>> >>>>> There are a whole lot that are not, but they're not not usually what >>>>> we would strongly consider for a production situation because they're >>>>> probably on the way out. >>>>> >>>>> Eg. 4054,55, 56, 4062, 4068, 4089, etc. etc. >>>> >>>> Mostly that's because if you are using three of any of these devices you >>>> can do better with programmable logic or software. When designing >>>> something for production it's not very often programmable logic or >>>> software are just tossed aside without consideration. This is obviously >>>> not a serious commercial design. >>> >>> Correct, this is a little something just for fun. All my serious >>> designs use rather exotic monolithic processes with full dielectric >>> isolation, complementary bipolar with SiGe, and CMOS. That's a >>> different kind of fun, but it pays the bills. >> >> If the entire circuit is CMOS I don't see mixing the two families giving >> you any trouble. The issue is noise causing double clocking on a slow >> edge. Are you generating any clocks from logic? Are you driving any >> clocks from a slow edge? If not, don't sweat it. >> >> With the experience you have I guess you just aren't used to low power, >> slow logic, eh? > > I've done my share of low power and logic stuff too, but it's been > either monolithic or all in one family, with edge rates pretty much > the same across the board, subject of course to loading and proper > drive sizing. But mixing 74HC and 4000-series is a different kettle > of fish. HC edge rates at 5V are two orders of magnitude faster. 4000 > logic was introduced decades before 74HC, so fast edges were never > really a consideration. My main concern was whether there might be > something in these designs that had problems with significantly faster > edges, info that might not have been known at the time and thus > wouldn't have made it into the old RCA datasheets that continue to be > copied over the years. Given the basic logic design I wouldn't expect > that as a problem, but I thought I'd ask since it could be painful to > debug.Edge rates by themselves are not a problem. The problem is created by noise in the circuit. So it's not so much a problem of mixing edge rates as it is using a device with a slow edge rate and a device that generates noise. Control your noise and the edge rates won't matter. Even if the logic was all 4000 series, the slow edge rate will be more sensitive to noise than a faster edge rate. Bottom line is to control the noise to a level that won't mess up operation of the clocks. The data signals won't matter. -- Rick C
Reply by ●April 15, 20172017-04-15
On 4/15/2017 8:17 AM, bitrex wrote:> On 04/14/2017 07:12 PM, rickman wrote: >> On 4/14/2017 6:34 PM, bitrex wrote: >>> On 04/14/2017 05:16 PM, rickman wrote: >>> >>>> Do you really not understand what that means? With both HC and 4000 >>>> the >>>> absolute minimum means damage can occur and is -0.5 volts for both. HC >>>> has a "specified" operation from 2.0 to 6.0 or whatever limits the >>>> maker >>>> provides. That means the data is guaranteed over that range of Vcc. >>>> For >>>> 4000 series parts I find separate specs for operation at 5 10 and 15 >>>> volts Vdd. >>> >>> I'm not intimately familiar with the operating parameters of an >>> antiquated glue-logic series that probably came out nearly two decades >>> before I was born, no. >>> >>> All I can go by is what the datasheets say, and they often don't explain >>> things too good. For example this whitepaper on the HCMOS family from >>> Phillips doesn't say anything about -0.5 volts anywhere as far as I can >>> tell: >>> >>> <https://www.cl.cam.ac.uk/teaching/2003/DigElec/part2-data.pdf> >> >> The spec of -0.5 volts on Vdd (or Vcc or whatever name they use for the >> positive rail) means that pin should not go more than 0.5 volts below >> the ground pin. This is nothing particular to 4000 series parts or >> logic parts for that matter. This is a fundamental spec in nearly all >> active device data sheets. I'm sure it is not mentioned in the above >> white paper because it is pretty basic so they assumed they didn't need >> to cover it. > > I'm guessing they're a little vague about what the absolute minimum > voltage where the part won't be damaged but stops operating properly is > because the manufacturer doesn't know themselves for any particular > instance of the part; if you could make an "ideal" MOSFET with an > infinitesimally small threshold voltage and on resistance then a CMOS > gate should work fine with the rails arbitrarily close to each other.It may be an issue of "don't know" but more likely an issue of "don't care". Anything they put in the data sheet has to be verified somehow. If customers don't care about that feature why bother to measure and publish it?> So there's some distribution of real-world on resistances and threshold > voltages for the process they're using to make the chips, and 2 or 3 > volts minimum "recommended" respectively is just the threshold where > they can statistically guarantee from population extrapolation from a > random sample that 99.9....% of instances will operate as expected.Bingo. The real cutoff may be much lower, but the numbers they provide cause them no heartburn and makes most of their customers happy. I recall seeing memory devices which were specified down to exactly 1.8 volts. But to use it with a 1.8 volt supply you would need a lower voltage spec for tolerance on the Vcc. I figured they must not have much demand for 1.8 volt operation but wanted to add it to the data sheet anyway. -- Rick C
Reply by ●April 16, 20172017-04-16
On Saturday, April 15, 2017 at 8:48:29 AM UTC+10, bitrex wrote:> On 04/14/2017 06:34 PM, bitrex wrote: > > On 04/14/2017 05:16 PM, rickman wrote: > > > >> Do you really not understand what that means? With both HC and 4000 the > >> absolute minimum means damage can occur and is -0.5 volts for both. HC > >> has a "specified" operation from 2.0 to 6.0 or whatever limits the maker > >> provides. That means the data is guaranteed over that range of Vcc. For > >> 4000 series parts I find separate specs for operation at 5 10 and 15 > >> volts Vdd. > > > > I'm not intimately familiar with the operating parameters of an > > antiquated glue-logic series that probably came out nearly two decades > > before I was born, no. > > > > All I can go by is what the datasheets say, and they often don't explain > > things too good. For example this whitepaper on the HCMOS family from > > Phillips doesn't say anything about -0.5 volts anywhere as far as I can > > tell: > > > > <https://www.cl.cam.ac.uk/teaching/2003/DigElec/part2-data.pdf> > > Nevermind, it does down in the specifics. > > Whatever old datasheet for the 4000 series I was looking at seemed to > give the impression that -0.5 was the minimum "recommended" operating > voltage. Which wouldn't make sense as I don't see how it could function > with the rails inverted. It's confusing to put that figure along with > "typ" and "max" in a table, I think it should just be put in the > "Absolute Maximum Ratings" section.It doesn't mean that. If you reverse the rails on a CMOS chip by more than 0.5V you can put enough current through the chip to warm up some areas to destructive temperatures. A more explicit warning would have read "don't put significant reverse voltages across CMOS supply pins". -- Bill Sloman, Sydney
Reply by ●April 17, 20172017-04-17
> > > > Whatever old datasheet for the 4000 series I was looking at seemed to > > give the impression that -0.5 was the minimum "recommended" operating > > voltage.I would include current limiting series resistors on all 4000 series input pins. The 4000 series had a tendency to latch up and let the magic smoke out if the ESD diodes conducted a bit too much, even on a transient. Maybe that was the 4000A series and they fixed that in the 4000B? I would still add the resistors. m
