Mixing 4000-series CMOS and 74HC in a 5V system - any issues?

On 4/14/2017 1:54 PM, Spehro Pefhany wrote:
> On Thu, 13 Apr 2017 22:45:06 -0500, the renowned Tim Wescott
> <tim@seemywebsite.com> wrote:
>
>> On Thu, 13 Apr 2017 20:26:38 -0400, Steve Goldstein wrote:
>>
>>> Do 4000-series CMOS inputs have any problems coping with the much faster
>>> edge rates of 74HC outputs?  Everything would be running on 5V,
>>> of course.  It's all "just" digital logic, but sometimes the transistors
>>> inside forget that...
>>>
>>> And yes, I know I could use a processor and write code instead of using
>>> a few packages of random logic.  That's not my desire.
>>
>> AFAIK pretty much anything that's currently available in 4000-series is
>> available in 74HC4000-series.  What's not there?
>
> There are a whole lot that are not, but they're not not usually what
> we would strongly consider for a production situation because they're
> probably on the way out.
>
> Eg. 4054,55, 56, 4062, 4068, 4089, etc. etc.

Mostly that's because if you are using three of any of these devices you 
can do better with programmable logic or software.  When designing 
something for production it's not very often programmable logic or 
software are just tossed aside without consideration.  This is obviously 
not a serious commercial design.

-- 

Rick C

On 04/14/2017 07:10 AM, Steve Goldstein wrote:
> On Thu, 13 Apr 2017 22:45:06 -0500, Tim Wescott <tim@seemywebsite.com>
> wrote:
>
>> On Thu, 13 Apr 2017 20:26:38 -0400, Steve Goldstein wrote:
>>
>>> Do 4000-series CMOS inputs have any problems coping with the much faster
>>> edge rates of 74HC outputs?  Everything would be running on 5V,
>>> of course.  It's all "just" digital logic, but sometimes the transistors
>>> inside forget that...
>>>
>>> And yes, I know I could use a processor and write code instead of using
>>> a few packages of random logic.  That's not my desire.
>>
>> AFAIK pretty much anything that's currently available in 4000-series is
>> available in 74HC4000-series.  What's not there?
>
> CD4026 and CD4033 don't seem to have direct 74HC equivalents, and
> CD4033 is perfect for what I want to do.   I haven't searched for a
> similar 74HC function since CD4033 is still readily available.
>
> Another poster asked about race conditions. That's not an issue, it's
> a synchronous design, and slow.
>

If it's a one-time project and you're running off 5 volts and don't have 
a super-stringent power supply budget you could just use a 74LS47 and 
74HC160 synchronous BCD decade counter to drive it. At 5 volts HC 
outputs will drive LS inputs no problem.

If the digits in whatever display (if that's what you're using it for) 
are on all the time the static LS power consumption will be small 
fraction of the total.

Steve Goldstein wrote:

> Do 4000-series CMOS inputs have any problems coping with the much
> faster edge rates of 74HC outputs?  Everything would be running on 5V,
> of course.  It's all "just" digital logic, but sometimes the
> transistors inside forget that...
> 
> And yes, I know I could use a processor and write code instead of
> using a few packages of random logic.  That's not my desire.
First, you can get almost any function you want in the 74HC family.
There are a FEW functions that have not been brought over.  Excepting those, 
the only reason to use 4000-series is when running them on 12 V or so.

Jon

On 4/14/2017 2:50 PM, Jon Elson wrote:
> Steve Goldstein wrote:
>
>> Do 4000-series CMOS inputs have any problems coping with the much
>> faster edge rates of 74HC outputs?  Everything would be running on 5V,
>> of course.  It's all "just" digital logic, but sometimes the
>> transistors inside forget that...
>>
>> And yes, I know I could use a processor and write code instead of
>> using a few packages of random logic.  That's not my desire.
> First, you can get almost any function you want in the 74HC family.
> There are a FEW functions that have not been brought over.  Excepting those,
> the only reason to use 4000-series is when running them on 12 V or so.

How low will these two logic families go?  I don't think I've ever 
tested them.  I know what the spec sheet says, but I seem to recall 
hearing that 4000 series logic will work at very low power supply 
voltages, so much so that it can be hard to get memory to forget the 
contents when you want it to.

-- 

Rick C

On 04/14/2017 03:45 PM, rickman wrote:
> On 4/14/2017 2:50 PM, Jon Elson wrote:
>> Steve Goldstein wrote:
>>
>>> Do 4000-series CMOS inputs have any problems coping with the much
>>> faster edge rates of 74HC outputs?  Everything would be running on 5V,
>>> of course.  It's all "just" digital logic, but sometimes the
>>> transistors inside forget that...
>>>
>>> And yes, I know I could use a processor and write code instead of
>>> using a few packages of random logic.  That's not my desire.
>> First, you can get almost any function you want in the 74HC family.
>> There are a FEW functions that have not been brought over.  Excepting
>> those,
>> the only reason to use 4000-series is when running them on 12 V or so.
>
> How low will these two logic families go?  I don't think I've ever
> tested them.  I know what the spec sheet says, but I seem to recall
> hearing that 4000 series logic will work at very low power supply
> voltages, so much so that it can be hard to get memory to forget the
> contents when you want it to.
>

Yep, with HC ~2 volts is an absolute minimum, with 4000B series 3 volts 
is just a "recommendation", the absolute minimum is actually listed as 
-0.5V (?!)

I've run a CD4093B off 1 volt fine before...

On 2017-04-13 21:53, rickman wrote:
> On 4/13/2017 11:20 PM, tabbypurr@gmail.com wrote:
>> On Friday, 14 April 2017 01:53:09 UTC+1, Steve Goldstein  wrote:
>>> On Thu, 13 Apr 2017 17:32:37 -0700, John Larkin
>>> <jjlarkin@highland_snip_technology.com> wrote:
>>>> On Thu, 13 Apr 2017 20:26:38 -0400, Steve Goldstein
>>>> <sgoldHAM@alum.mit.edu> wrote:
>>>>
>>>>> Do 4000-series CMOS inputs have any problems coping with the much
>>>>> faster edge rates of 74HC outputs?  Everything would be running on 5V,
>>>>> of course.  It's all "just" digital logic, but sometimes the
>>>>> transistors inside forget that...
>>>>>
>>>>> And yes, I know I could use a processor and write code instead of
>>>>> using a few packages of random logic.  That's not my desire.
>>>>
>>>> No problem in the fast-to-slow direction. In the 4000-to-HC direction,
>>>> you might check that the HC input slew rate isn't too slow; schmitts
>>>> might be prudent.
>>>
>>> Good point.  Luckily this little project looks like it's all  74HC
>>> driving 4000 or 4000 driving 4000, at least at this stage of the
>>> design.  But I'll keep that in mind in case I have to drive 74HC from
>>> 4000.  Schmitts are cheap enough and I normally use them anywhere I
>>> need an inverter, just because.
>>
>> Whether you need to schmitt things depends on the circuit. Each logic
>> gate has a fair bit of gain so speeds up rise & fall times. Whether
>> that's good enough just depends. A bank vault system that calls the
>> flying squad if an edge goes high for 0.5uS would not want the results
>> of a sluggish input to a gate causing a brief output error. But if
>> your circuit controls bulb brightness, who cares if it gets 0.5uS of
>> full brightness. If a 4000 output goes through 2 spare HC inverters
>> before it hits the nand gate it'll be fast by then.
>


At 5V supply 4000-series logic has the zippiness of molasses. In winter.


> I'm not sure why people are making such a big deal of this issue.


Mostly because they have been bitten by it.


>                                                              ... If
> logic is designed properly the speed of an edge has no impact on the
> logical result other than on clock lines.  For purely combinatorial
> logic changing edges can always generate race conditions through
> multiple paths, so you should expect anomalous results until the input
> change has settled down.  Designing logic to be race free is a special
> task which takes a lot more design effort than standard logic design, so
> it is seldom used.
>

It can become a problem in pulse counters. If the transition is too slow 
you might get 3-5 counts even though there was only one pulse.


> To the OP, are you counting on combinatorial logic outputs to be race
> free, that is for one input edge to result in a single output edge?  If
> not, don't sweat the slower inputs driving faster logic.
>

In general that isn't a good thing. Aside from counters and such I have 
also seen EMC issues creeping up. The innards of a fat fast chip briefly 
sang at hundreds of MHz during each transition, that got conducted out, 
radiated and then there was some egg in the faces at the EMC test. Since 
quasi-peak rules became law at higher frequencies they won't let us mash 
that into the carpet anymore by averaging.

-- 
Regards, Joerg

http://www.analogconsultants.com/

On 4/14/2017 4:08 PM, Joerg wrote:
> On 2017-04-13 21:53, rickman wrote:
>> On 4/13/2017 11:20 PM, tabbypurr@gmail.com wrote:
>>> On Friday, 14 April 2017 01:53:09 UTC+1, Steve Goldstein  wrote:
>>>> On Thu, 13 Apr 2017 17:32:37 -0700, John Larkin
>>>> <jjlarkin@highland_snip_technology.com> wrote:
>>>>> On Thu, 13 Apr 2017 20:26:38 -0400, Steve Goldstein
>>>>> <sgoldHAM@alum.mit.edu> wrote:
>>>>>
>>>>>> Do 4000-series CMOS inputs have any problems coping with the much
>>>>>> faster edge rates of 74HC outputs?  Everything would be running on
>>>>>> 5V,
>>>>>> of course.  It's all "just" digital logic, but sometimes the
>>>>>> transistors inside forget that...
>>>>>>
>>>>>> And yes, I know I could use a processor and write code instead of
>>>>>> using a few packages of random logic.  That's not my desire.
>>>>>
>>>>> No problem in the fast-to-slow direction. In the 4000-to-HC direction,
>>>>> you might check that the HC input slew rate isn't too slow; schmitts
>>>>> might be prudent.
>>>>
>>>> Good point.  Luckily this little project looks like it's all  74HC
>>>> driving 4000 or 4000 driving 4000, at least at this stage of the
>>>> design.  But I'll keep that in mind in case I have to drive 74HC from
>>>> 4000.  Schmitts are cheap enough and I normally use them anywhere I
>>>> need an inverter, just because.
>>>
>>> Whether you need to schmitt things depends on the circuit. Each logic
>>> gate has a fair bit of gain so speeds up rise & fall times. Whether
>>> that's good enough just depends. A bank vault system that calls the
>>> flying squad if an edge goes high for 0.5uS would not want the results
>>> of a sluggish input to a gate causing a brief output error. But if
>>> your circuit controls bulb brightness, who cares if it gets 0.5uS of
>>> full brightness. If a 4000 output goes through 2 spare HC inverters
>>> before it hits the nand gate it'll be fast by then.
>>
>
>
> At 5V supply 4000-series logic has the zippiness of molasses. In winter.
>
>
>> I'm not sure why people are making such a big deal of this issue.
>
>
> Mostly because they have been bitten by it.
>
>
>>                                                              ... If
>> logic is designed properly the speed of an edge has no impact on the
>> logical result other than on clock lines.  For purely combinatorial
>> logic changing edges can always generate race conditions through
>> multiple paths, so you should expect anomalous results until the input
>> change has settled down.  Designing logic to be race free is a special
>> task which takes a lot more design effort than standard logic design, so
>> it is seldom used.
>>
>
> It can become a problem in pulse counters. If the transition is too slow
> you might get 3-5 counts even though there was only one pulse.

Did you read where I excepted clock lines?  If you are trying to count 
pulses on signals with slow edges it's not hard to design that properly.


>> To the OP, are you counting on combinatorial logic outputs to be race
>> free, that is for one input edge to result in a single output edge?  If
>> not, don't sweat the slower inputs driving faster logic.
>>
>
> In general that isn't a good thing. Aside from counters and such I have
> also seen EMC issues creeping up. The innards of a fat fast chip briefly
> sang at hundreds of MHz during each transition, that got conducted out,
> radiated and then there was some egg in the faces at the EMC test. Since
> quasi-peak rules became law at higher frequencies they won't let us mash
> that into the carpet anymore by averaging.

Yes, you've mentioned before the poorly designed chip.  Anyone can 
create crap that you need to deal with.

-- 

Rick C

On 4/14/2017 3:57 PM, bitrex wrote:
> On 04/14/2017 03:45 PM, rickman wrote:
>> On 4/14/2017 2:50 PM, Jon Elson wrote:
>>> Steve Goldstein wrote:
>>>
>>>> Do 4000-series CMOS inputs have any problems coping with the much
>>>> faster edge rates of 74HC outputs?  Everything would be running on 5V,
>>>> of course.  It's all "just" digital logic, but sometimes the
>>>> transistors inside forget that...
>>>>
>>>> And yes, I know I could use a processor and write code instead of
>>>> using a few packages of random logic.  That's not my desire.
>>> First, you can get almost any function you want in the 74HC family.
>>> There are a FEW functions that have not been brought over.  Excepting
>>> those,
>>> the only reason to use 4000-series is when running them on 12 V or so.
>>
>> How low will these two logic families go?  I don't think I've ever
>> tested them.  I know what the spec sheet says, but I seem to recall
>> hearing that 4000 series logic will work at very low power supply
>> voltages, so much so that it can be hard to get memory to forget the
>> contents when you want it to.
>>
>
> Yep, with HC ~2 volts is an absolute minimum, with 4000B series 3 volts
> is just a "recommendation", the absolute minimum is actually listed as
> -0.5V (?!)

Do you really not understand what that means?  With both HC and 4000 the 
absolute minimum means damage can occur and is -0.5 volts for both.  HC 
has a "specified" operation from 2.0 to 6.0 or whatever limits the maker 
provides.  That means the data is guaranteed over that range of Vcc. 
For 4000 series parts I find separate specs for operation at 5 10 and 15 
volts Vdd.


> I've run a CD4093B off 1 volt fine before...

That's pretty good.  I wonder how low 74HC will run.

-- 

Rick C

On 04/14/2017 05:16 PM, rickman wrote:

> Do you really not understand what that means?  With both HC and 4000 the
> absolute minimum means damage can occur and is -0.5 volts for both.  HC
> has a "specified" operation from 2.0 to 6.0 or whatever limits the maker
> provides.  That means the data is guaranteed over that range of Vcc. For
> 4000 series parts I find separate specs for operation at 5 10 and 15
> volts Vdd.

I'm not intimately familiar with the operating parameters of an 
antiquated glue-logic series that probably came out nearly two decades 
before I was born, no.

All I can go by is what the datasheets say, and they often don't explain 
things too good. For example this whitepaper on the HCMOS family from 
Phillips doesn't say anything about -0.5 volts anywhere as far as I can 
tell:

<https://www.cl.cam.ac.uk/teaching/2003/DigElec/part2-data.pdf>

On 04/14/2017 06:34 PM, bitrex wrote:
> On 04/14/2017 05:16 PM, rickman wrote:
>
>> Do you really not understand what that means?  With both HC and 4000 the
>> absolute minimum means damage can occur and is -0.5 volts for both.  HC
>> has a "specified" operation from 2.0 to 6.0 or whatever limits the maker
>> provides.  That means the data is guaranteed over that range of Vcc. For
>> 4000 series parts I find separate specs for operation at 5 10 and 15
>> volts Vdd.
>
> I'm not intimately familiar with the operating parameters of an
> antiquated glue-logic series that probably came out nearly two decades
> before I was born, no.
>
> All I can go by is what the datasheets say, and they often don't explain
> things too good. For example this whitepaper on the HCMOS family from
> Phillips doesn't say anything about -0.5 volts anywhere as far as I can
> tell:
>
> <https://www.cl.cam.ac.uk/teaching/2003/DigElec/part2-data.pdf>

Nevermind, it does down in the specifics.

Whatever old datasheet for the 4000 series I was looking at seemed to 
give the impression that -0.5 was the minimum "recommended" operating 
voltage. Which wouldn't make sense as I don't see how it could function 
with the rails inverted. It's confusing to put that figure along with 
"typ" and "max" in a table, I think it should just be put in the 
"Absolute Maximum Ratings" section.