Emitter Couple Latch

Here is a very simple circuit that must have been done before but I 
don't recall ever seeing published. I call it an emitter coupled latch. 
I guess it's an emitter coupled schmitt trigger taken to extreme.

<https://www.dropbox.com/s/zcgyh6v2f3ws4fp/EmitterCoupledLatch.pdf?raw=1>

The lower sketch shows how I used it in an inrush limiter to monitor 
when a big supply capacitor gets charged to within a volt of final 
before enabling the smpsu main load. The mosfet which bypasses the 
inrush limit resistor is activated by an aux output of the smpsu (in my 
case the RCD snubber network on the main switch transistor was handy). 
The residual inrush surge is much lower and easily managed by inductance 
and wiring resistances.

I was dreaming up ever nastier hairball circuits involving comparators 
and bucket loads of parts before I came up with this circuit. It now 
seems so obvious, have any of you folk seen this before?

piglet

On Tuesday, June 29, 2021 at 12:29:58 AM UTC+10, piglet wrote:
> Here is a very simple circuit that must have been done before but I 
> don't recall ever seeing published. I call it an emitter coupled latch. 

Motorola was selling emitter-coupled logic back in the 1960's when I was a graduate student.

The emitter coupled monostable has been around for just as long. It shows up here from time to time.

> I guess it's an emitter coupled schmitt trigger taken to extreme. 
> 
> <https://www.dropbox.com/s/zcgyh6v2f3ws4fp/EmitterCoupledLatch.pdf?raw=1> 
> 
> The lower sketch shows how I used it in an inrush limiter to monitor 
> when a big supply capacitor gets charged to within a volt of final 
> before enabling the smpsu main load. The mosfet which bypasses the 
> inrush limit resistor is activated by an aux output of the smpsu (in my 
> case the RCD snubber network on the main switch transistor was handy). 
> The residual inrush surge is much lower and easily managed by inductance 
> and wiring resistances. 
> 
> I was dreaming up ever nastier hairball circuits involving comparators 
> and bucket loads of parts before I came up with this circuit. It now 
> seems so obvious, have any of you folk seen this before?

Without resistor values, voltages and currents, it isn't all that obvious what your circuit is supposed to be doing, or how it does it.

The top transistor is obviously "on" until V+ gets within a diode-drop of Vcc, and that holds Vout close to Vcc until then, but the interesting stuff depends on the relative values of the two resistors.

LT Spice simulations come with that sort of information built in. 

-- 
Bill Sloman, Sydney

On Tuesday, June 29, 2021 at 1:53:37 AM UTC+10, Bill Sloman wrote:
> On Tuesday, June 29, 2021 at 12:29:58 AM UTC+10, piglet wrote: 
> > Here is a very simple circuit that must have been done before but I 
> > don't recall ever seeing published. I call it an emitter coupled latch.
> Motorola was selling emitter-coupled logic back in the 1960's when I was a graduate student. 
> 
> The emitter coupled monostable has been around for just as long. It shows up here from time to time.
> > I guess it's an emitter coupled schmitt trigger taken to extreme. 
> > 
> > <https://www.dropbox.com/s/zcgyh6v2f3ws4fp/EmitterCoupledLatch.pdf?raw=1> 
> > 
> > The lower sketch shows how I used it in an inrush limiter to monitor 
> > when a big supply capacitor gets charged to within a volt of final 
> > before enabling the smpsu main load. The mosfet which bypasses the 
> > inrush limit resistor is activated by an aux output of the smpsu (in my 
> > case the RCD snubber network on the main switch transistor was handy). 
> > The residual inrush surge is much lower and easily managed by inductance 
> > and wiring resistances. 
> > 
> > I was dreaming up ever nastier hairball circuits involving comparators 
> > and bucket loads of parts before I came up with this circuit. It now 
> > seems so obvious, have any of you folk seen this before?
> Without resistor values, voltages and currents, it isn't all that obvious what your circuit is supposed to be doing, or how it does it. 
> 
> The top transistor is obviously "on" until V+ gets within a diode-drop of Vcc, and that holds Vout close to Vcc until then, but the interesting stuff depends on the relative values of the two resistors. 
> 
> LT Spice simulations come with that sort of information built in. 

I think I've got it. Once the circuit is latched you are going to have to push V+ up quite a long way to get it unlatched, to a degree that depends on the current gain of the left hand transistor.

Typically current gains have a 3:1 range. Some transistors are sorted into high. low and intermediate current range parts, but you still seems to end up with a 2:1 range.

-- 
Bill Sloman, Sydney