Electronics today can be found everywhere – in your pocket, in your tablet or laptop, in your car, at your workplace, and in buildings and homes. Smartphones and other mobile devices combine incredible compute power with the ability to be connected anywhere, any time. Hundreds of thousands of applications or “apps” are available for a myriad of connected devices.

Behind this newly connected, application-rich world is a quiet revolution in semiconductor design and manufacturing. Today’s chips may have billions of transistors that are each far smaller than the wavelength of light used to print them. Systems-on-chips (SoCs) combine processors, memory, analog components, interface protocols, and more. Electronic systems demand massive amounts of embedded software, and semiconductor companies are increasingly expected to provide it.

The design of chips and systems with such complexity – while meeting demands for performance, low power, and time to market – is possible only with advanced electronic design automation (EDA) tools. EDA software and hardware enables everything from the design of individual transistors to the development of software before any hardware is built. Another crucial enabling factor is semiconductor intellectual property (IP), which provides pre-verified building blocks for memory controllers, interface protocols, or specialized processors that are integrated into SoCs.

Cadence is a leading provider of EDA and semiconductor IP. Our custom/analog tools help engineers design the transistors, standard cells, and IP blocks that make up SoCs. Our digital tools automate the design and verification of giga-scale, giga-hertz SoCs at the latest semiconductor processing nodes. Our IC packaging and PCB tools permit the design of complete boards and subsystems.

Cadence also offers a growing portfolio of design IP and verification IP for memories, interface protocols, analog/mixed-signal components, and specialized processors. And reaching up to the systems level, Cadence offers an integrated suite of hardware/software co-development platforms. In short, Cadence® technology helps customers build great products that connect the world.
 



Cadence Debuts PSpice Web Portal and Ecosystem to Help Designers Address System Level Mixed-Signal Wireless and IoT Challenges

Community-driven web portal puts PSpice simulation models and reference designs from major IC vendors at your fingertips

Posted 2 years ago

Cadence and SMIC Collaborate on Delivery of Low-Power 28nm Digital Design Reference Flow

Full Suite of Cadence Digital Tools Improves Designer Productivity from RTL-to-Signoff

Posted 2 years ago

Cadence Expands Collaboration with ARM to Accelerate Custom SoC and IoT System Designs with Industry’s First End-to-End Hosted Design Solution

Cadence offers optimized tools, methodology and IP to complement ARM® processor IP in first complete end-to-end solution that takes designers from concept to silicon

Posted 2 years ago

Hitachi Adopts Cadence AMS Model-Based Methodology and Tools for Mixed-Signal Design Verification

Accelerated mixed-signal verification by 160X for one of its largest designs and reduced full-chip simulation time to 30 minutes

Posted 2 years ago

Tezzaron Cuts Design Time in Half with Cadence Full-Flow Digital RTL-to-Signoff Solution

Massively parallel architecture with unified engines and data model enables significant productivity gains

Posted 2 years ago

Faraday Reduces Packaging Design Time by 60 Percent Using Cadence OrbitIO Interconnect Designer and SiP Layout

OrbitIO interconnect designer capabilities deliver hierarchical multi-substrate-optimized design for SoCs and ASICs across IC package/SiP and systems

Posted 2 years ago

New Cadence Allegro Platform Accelerates Design of Compact, High-Performance Products Using Flex and Rigid-Flex Technologies

Unique and comprehensive real-time DRCs for flex technology and dynamic concurrent team design accelerate product creation

Posted 2 years ago

Cadence Expands OrCAD Solution to Address Flex and Rigid-Flex Design Challenges for IoT, Wearables and Mobile Devices

Accelerates time to market and improves performance using PSpice virtual prototyping and system level simulation

Posted 2 years ago

Cadence Announces New Tensilica Vision P6 DSP Targeting Embedded Neural Network Applications

Latest DSP quadruples neural network performance capability compared to previous-generation Vision DSP

Posted 2 years ago

Toshiba Adopts Cadence Innovus Implementation System for Production Mobile Memory Controller Design

Toshiba achieves 16 percent place and route area reduction and 25 percent lower power consumption with shorter place and route turnaround time

Posted 2 years ago