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annular ring issue

Started by Unknown November 8, 2021

I'm planning a 4 or 6 layer board with all 2 oz copper and thin FR4
dielectrics.

Given a thru-hole multi-row connector (like a 3x32 DIN) I want to
ground some pins. The grounded pins would hit an inner ground plane
flood-over, namely no thermals. Clearly annular rings on the pad stack
wouldn't matter on those layers; it's all copper.

But where other pins aren't grounded, I want miminal loss of copper on
the ground plane. So I'd prefer no annular ring, just a plated hole
with the voltage clearance between the drill and the circular cutout
of the ground pour.

Does that sound OK?

Of course it will be hard to solder.



-- 

Father Brown's figure remained quite dark and still; 
but in that instant he had lost his head. His head was
always most valuable when he had lost it.



  
On Mon, 08 Nov 2021 09:44:02 -0800, jlarkin@highlandsniptechnology.com
wrote:

> > >I'm planning a 4 or 6 layer board with all 2 oz copper and thin FR4 >dielectrics. > >Given a thru-hole multi-row connector (like a 3x32 DIN) I want to >ground some pins. The grounded pins would hit an inner ground plane >flood-over, namely no thermals. Clearly annular rings on the pad stack >wouldn't matter on those layers; it's all copper. > >But where other pins aren't grounded, I want miminal loss of copper on >the ground plane. So I'd prefer no annular ring, just a plated hole >with the voltage clearance between the drill and the circular cutout >of the ground pour. > >Does that sound OK? > >Of course it will be hard to solder.
There's a minimum annular ring for PTHs to allow for layer/layer mis-registration tolerances. Plating of PTH and PTH reliability is affected if there's no layer anchor on the barrel sructure. Crunch the numbers using your vendor's tolerances, or accept all liability down the road. Connector PTHs have more issues than simple vias, due to differing mechanical requirements, but all soldered PTH connectors will likely follow one set of guidelines, vs the force-fit varieties. You're asking questions that a first-year intern might, because you believe 'the boss' can bend the rules. This is only true in so far as you're the one signing on the dotted line ($). You may be setting a bad example for those who may not be so fortunate in their future endeavors. Asking questions is good, but 'tell me why I can't do this' gets lame really quick. RL RL
On a sunny day (Mon, 08 Nov 2021 09:44:02 -0800) it happened
jlarkin@highlandsniptechnology.com wrote in
<iuniog9c6pjb5l152mhhpr1fsgl5cvn99m@4ax.com>:

> > >I'm planning a 4 or 6 layer board with all 2 oz copper and thin FR4 >dielectrics. > >Given a thru-hole multi-row connector (like a 3x32 DIN) I want to >ground some pins. The grounded pins would hit an inner ground plane >flood-over, namely no thermals. Clearly annular rings on the pad stack >wouldn't matter on those layers; it's all copper. > >But where other pins aren't grounded, I want miminal loss of copper on >the ground plane. So I'd prefer no annular ring, just a plated hole >with the voltage clearance between the drill and the circular cutout >of the ground pour. > >Does that sound OK? > >Of course it will be hard to solder.
Sounds doable. At very high currents one start thinking about those mill spec big round connectors with many pins, wiring..
On Mon, 08 Nov 2021 13:21:58 -0500, legg <legg@nospam.magma.ca> wrote:

>On Mon, 08 Nov 2021 09:44:02 -0800, jlarkin@highlandsniptechnology.com >wrote: > >> >> >>I'm planning a 4 or 6 layer board with all 2 oz copper and thin FR4 >>dielectrics. >> >>Given a thru-hole multi-row connector (like a 3x32 DIN) I want to >>ground some pins. The grounded pins would hit an inner ground plane >>flood-over, namely no thermals. Clearly annular rings on the pad stack >>wouldn't matter on those layers; it's all copper. >> >>But where other pins aren't grounded, I want miminal loss of copper on >>the ground plane. So I'd prefer no annular ring, just a plated hole >>with the voltage clearance between the drill and the circular cutout >>of the ground pour. >> >>Does that sound OK? >> >>Of course it will be hard to solder. > >There's a minimum annular ring for PTHs to allow for layer/layer >mis-registration tolerances. Plating of PTH and PTH reliability is >affected if there's no layer anchor on the barrel sructure. > >Crunch the numbers using your vendor's tolerances, or accept all >liability down the road. > >Connector PTHs have more issues than simple vias, due to differing >mechanical requirements, but all soldered PTH connectors will >likely follow one set of guidelines, vs the force-fit varieties. > >You're asking questions that a first-year intern might, because >you believe 'the boss' can bend the rules.
Jerk. -- If a man will begin with certainties, he shall end with doubts, but if he will be content to begin with doubts he shall end in certainties. Francis Bacon
On Mon, 08 Nov 2021 19:07:06 GMT, Jan Panteltje
<pNaOnStPeAlMtje@yahoo.com> wrote:

>On a sunny day (Mon, 08 Nov 2021 09:44:02 -0800) it happened >jlarkin@highlandsniptechnology.com wrote in ><iuniog9c6pjb5l152mhhpr1fsgl5cvn99m@4ax.com>: > >> >> >>I'm planning a 4 or 6 layer board with all 2 oz copper and thin FR4 >>dielectrics. >> >>Given a thru-hole multi-row connector (like a 3x32 DIN) I want to >>ground some pins. The grounded pins would hit an inner ground plane >>flood-over, namely no thermals. Clearly annular rings on the pad stack >>wouldn't matter on those layers; it's all copper. >> >>But where other pins aren't grounded, I want miminal loss of copper on >>the ground plane. So I'd prefer no annular ring, just a plated hole >>with the voltage clearance between the drill and the circular cutout >>of the ground pour. >> >>Does that sound OK? >> >>Of course it will be hard to solder. > >Sounds doable. >At very high currents one start thinking about those mill spec big round connectors with >many pins, wiring..
5 amps per pin, 60 of those per connector. We tested some connectors rated for 5 amps/pin, but running a bunch close together heated the shell to 90C. Seems like connector current ratings are all over the place, even for the same technologies, and that getting the heat out dominates real-world current capability. So the thermal path from the grounded pins, into the ground plane, should be as uninterrupted as possible. Hence no annular rings on the ungrounded pins. The function of the grounded pins is to help cool the current-carrying pins. Just wondering what other people might think. -- If a man will begin with certainties, he shall end with doubts, but if he will be content to begin with doubts he shall end in certainties. Francis Bacon
On Monday, November 8, 2021 at 3:15:47 PM UTC-4, John Larkin wrote:
> On Mon, 08 Nov 2021 13:21:58 -0500, legg <le...@nospam.magma.ca> wrote: > > >On Mon, 08 Nov 2021 09:44:02 -0800, jla...@highlandsniptechnology.com > >wrote: > > > >> > >> > >>I'm planning a 4 or 6 layer board with all 2 oz copper and thin FR4 > >>dielectrics. > >> > >>Given a thru-hole multi-row connector (like a 3x32 DIN) I want to > >>ground some pins. The grounded pins would hit an inner ground plane > >>flood-over, namely no thermals. Clearly annular rings on the pad stack > >>wouldn't matter on those layers; it's all copper. > >> > >>But where other pins aren't grounded, I want miminal loss of copper on > >>the ground plane. So I'd prefer no annular ring, just a plated hole > >>with the voltage clearance between the drill and the circular cutout > >>of the ground pour. > >> > >>Does that sound OK? > >> > >>Of course it will be hard to solder. > > > >There's a minimum annular ring for PTHs to allow for layer/layer > >mis-registration tolerances. Plating of PTH and PTH reliability is > >affected if there's no layer anchor on the barrel sructure. > > > >Crunch the numbers using your vendor's tolerances, or accept all > >liability down the road. > > > >Connector PTHs have more issues than simple vias, due to differing > >mechanical requirements, but all soldered PTH connectors will > >likely follow one set of guidelines, vs the force-fit varieties. > > > >You're asking questions that a first-year intern might, because > >you believe 'the boss' can bend the rules. > > Jerk.
Is this Larkin's way of saying, "follow the science"? -- Rick C. - Get 1,000 miles of free Supercharging - Tesla referral code - https://ts.la/richard11209
On Monday, November 8, 2021 at 3:24:24 PM UTC-4, John Larkin wrote:
> On Mon, 08 Nov 2021 19:07:06 GMT, Jan Panteltje > <pNaOnSt...@yahoo.com> wrote: > > >On a sunny day (Mon, 08 Nov 2021 09:44:02 -0800) it happened > >jla...@highlandsniptechnology.com wrote in > ><iuniog9c6pjb5l152...@4ax.com>: > > > >> > >> > >>I'm planning a 4 or 6 layer board with all 2 oz copper and thin FR4 > >>dielectrics. > >> > >>Given a thru-hole multi-row connector (like a 3x32 DIN) I want to > >>ground some pins. The grounded pins would hit an inner ground plane > >>flood-over, namely no thermals. Clearly annular rings on the pad stack > >>wouldn't matter on those layers; it's all copper. > >> > >>But where other pins aren't grounded, I want miminal loss of copper on > >>the ground plane. So I'd prefer no annular ring, just a plated hole > >>with the voltage clearance between the drill and the circular cutout > >>of the ground pour. > >> > >>Does that sound OK? > >> > >>Of course it will be hard to solder. > > > >Sounds doable. > >At very high currents one start thinking about those mill spec big round connectors with > >many pins, wiring.. > 5 amps per pin, 60 of those per connector. We tested some connectors > rated for 5 amps/pin, but running a bunch close together heated the > shell to 90C. > > Seems like connector current ratings are all over the place, even for > the same technologies, and that getting the heat out dominates > real-world current capability. So the thermal path from the grounded > pins, into the ground plane, should be as uninterrupted as possible. > > Hence no annular rings on the ungrounded pins. The function of the > grounded pins is to help cool the current-carrying pins. > > Just wondering what other people might think.
And if you don't like what they think you call them jerks? -- Rick C. + Get 1,000 miles of free Supercharging + Tesla referral code - https://ts.la/richard11209
mandag den 8. november 2021 kl. 18.44.30 UTC+1 skrev jla...@highlandsniptechnology.com:
> I'm planning a 4 or 6 layer board with all 2 oz copper and thin FR4 > dielectrics. > > Given a thru-hole multi-row connector (like a 3x32 DIN) I want to > ground some pins. The grounded pins would hit an inner ground plane > flood-over, namely no thermals. Clearly annular rings on the pad stack > wouldn't matter on those layers; it's all copper. > > But where other pins aren't grounded, I want miminal loss of copper on > the ground plane. So I'd prefer no annular ring, just a plated hole > with the voltage clearance between the drill and the circular cutout > of the ground pour. > > Does that sound OK?
technical term, "non-functional pad" https://www.dfrsolutions.com/hubfs/DfR_Solutions_Website/Resources-Archived/White-Papers/Reliability/Non-Functional-Pads-Should-they-Stay-or-Should-they-Go.pdf
On Mon, 8 Nov 2021 11:49:50 -0800 (PST), Lasse Langwadt Christensen
<langwadt@fonz.dk> wrote:

>mandag den 8. november 2021 kl. 18.44.30 UTC+1 skrev jla...@highlandsniptechnology.com: >> I'm planning a 4 or 6 layer board with all 2 oz copper and thin FR4 >> dielectrics. >> >> Given a thru-hole multi-row connector (like a 3x32 DIN) I want to >> ground some pins. The grounded pins would hit an inner ground plane >> flood-over, namely no thermals. Clearly annular rings on the pad stack >> wouldn't matter on those layers; it's all copper. >> >> But where other pins aren't grounded, I want miminal loss of copper on >> the ground plane. So I'd prefer no annular ring, just a plated hole >> with the voltage clearance between the drill and the circular cutout >> of the ground pour. >> >> Does that sound OK? > >technical term, "non-functional pad" > >https://www.dfrsolutions.com/hubfs/DfR_Solutions_Website/Resources-Archived/White-Papers/Reliability/Non-Functional-Pads-Should-they-Stay-or-Should-they-Go.pdf > >
Yeah, Fig 1 was what I had in mind. If I set up the pad stack for zero annular rings on the ground plane layer, I'll get that. The drill will hardly know there is a layer boundary if it doesn't drill any copper. I guess we'll do that, no pads if there's no inner-layer connection. Thanks for the link. -- If a man will begin with certainties, he shall end with doubts, but if he will be content to begin with doubts he shall end in certainties. Francis Bacon
On Mon, 08 Nov 2021 11:24:14 -0800, John Larkin
<jlarkin@highland_atwork_technology.com> wrote:

>On Mon, 08 Nov 2021 19:07:06 GMT, Jan Panteltje ><pNaOnStPeAlMtje@yahoo.com> wrote: > >>On a sunny day (Mon, 08 Nov 2021 09:44:02 -0800) it happened >>jlarkin@highlandsniptechnology.com wrote in >><iuniog9c6pjb5l152mhhpr1fsgl5cvn99m@4ax.com>: >> >>> >>> >>>I'm planning a 4 or 6 layer board with all 2 oz copper and thin FR4 >>>dielectrics. >>> >>>Given a thru-hole multi-row connector (like a 3x32 DIN) I want to >>>ground some pins. The grounded pins would hit an inner ground plane >>>flood-over, namely no thermals. Clearly annular rings on the pad stack >>>wouldn't matter on those layers; it's all copper. >>> >>>But where other pins aren't grounded, I want miminal loss of copper on >>>the ground plane. So I'd prefer no annular ring, just a plated hole >>>with the voltage clearance between the drill and the circular cutout >>>of the ground pour. >>> >>>Does that sound OK? >>> >>>Of course it will be hard to solder. >> >>Sounds doable. >>At very high currents one start thinking about those mill spec big round connectors with >>many pins, wiring.. > >5 amps per pin, 60 of those per connector. We tested some connectors >rated for 5 amps/pin, but running a bunch close together heated the >shell to 90C. > >Seems like connector current ratings are all over the place, even for >the same technologies, and that getting the heat out dominates >real-world current capability. So the thermal path from the grounded >pins, into the ground plane, should be as uninterrupted as possible. > >Hence no annular rings on the ungrounded pins. The function of the >grounded pins is to help cool the current-carrying pins. > >Just wondering what other people might think.
I'd worry about stress from thermal cycling causing low-cycle fatigue failures in the live vias. BTDT. A good way to tell if this is a problem is a few test boards, each with string of vias et al, plus an isolated length of the same copper with no or only large diameter vias, temperature cycled day and night for a weekend or so. The resistance of the two paths should be similar. Using a 6.5-digit 4-wire resistance measurement, measure the precise resistance of the via-chain and of the comparison chain at ten Hertz or so (a Fluke Data Bucket is traditional). As low-cycle fatigue accumulates, small voids will nucleate and grow, affecting the resistance of the via chain, while the reference chain will be unchanged. The ratio the two measured resistances will cancel out the temperature coefficient of electrical conductivity of the copper, highlighting tiny differences between the two paths. The resistance ratio will start to deviate long before any explicit failure happens. Void growth is a random process, exhibiting 1/f noise. One can also take a FFT of the resistance ratio time series, and look for changes in one-hertz "power" level over time. Joe Gwinn