This is looking like a real project. I need a dual pulse with low jitter, something like this: https://www.dropbox.com/s/j4df10lj6l4lcla/T500_Timing_Ramp_1.jpg?raw=1 The comparators have no spec for voltage or current noise. Worse, their input current transitions from 0 to max as the ramp crosses their various DAC thresholds. Messy. BUF602 is slick. I was considering a fast current-mode opamp, but their Rf in follower mode makes gobs of noise. -- John Larkin Highland Technology, Inc The best designs are necessarily accidental.
dual pulse generator again
Started by ●July 10, 2021
Reply by ●July 10, 20212021-07-10
10.07.21 22:50, jlarkin@highlandsniptechnology.com wrote:>This is looking like a real project. > >I need a dual pulse with low jitter, something like this: > >https://www.dropbox.com/s/j4df10lj6l4lcla/T500_Timing_Ramp_1.jpg?raw=1 > >The comparators have no spec for voltage or current noise. Worse, >their input current transitions from 0 to max as the ramp crosses >their various DAC thresholds. Messy. > >BUF602 is slick. I was considering a fast current-mode opamp, but >their Rf in follower mode makes gobs of noise. > >What about a programmable delay line, can they be had with low jitter? -- Klaus
Reply by ●July 10, 20212021-07-10
jlarkin@highlandsniptechnology.com wrote:> This is looking like a real project. > > I need a dual pulse with low jitter, something like this: > > https://www.dropbox.com/s/j4df10lj6l4lcla/T500_Timing_Ramp_1.jpg?raw=1 > > The comparators have no spec for voltage or current noise. Worse, > their input current transitions from 0 to max as the ramp crosses > their various DAC thresholds. Messy. > > BUF602 is slick. I was considering a fast current-mode opamp, but > their Rf in follower mode makes gobs of noise. >A HR Timer from the STM32 family may also be an option. -- Uwe Bonnes bon@elektron.ikp.physik.tu-darmstadt.de Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt --------- Tel. 06151 1623569 ------- Fax. 06151 1623305 --------- (Phone also available during "mobile work")
Reply by ●July 10, 20212021-07-10
On Sat, 10 Jul 2021 23:23:54 +0200, Klaus Kragelund <klauskvik@hotmail.com> wrote:>10.07.21 22:50, jlarkin@highlandsniptechnology.com wrote: >>This is looking like a real project. >> >>I need a dual pulse with low jitter, something like this: >> >>https://www.dropbox.com/s/j4df10lj6l4lcla/T500_Timing_Ramp_1.jpg?raw=1 >> >>The comparators have no spec for voltage or current noise. Worse, >>their input current transitions from 0 to max as the ramp crosses >>their various DAC thresholds. Messy. >> >>BUF602 is slick. I was considering a fast current-mode opamp, but >>their Rf in follower mode makes gobs of noise. >> >> >What about a programmable delay line, can they be had with low jitter?There were some old ECL parts, tapped delay lines, but they were awful. A linear ramp and a comparator can be made very good. We've pushed that concept down to about 30 fs RMS jitter. This one should come out around 1 ps RMS. -- John Larkin Highland Technology, Inc The best designs are necessarily accidental.
Reply by ●July 11, 20212021-07-11
On Sunday, July 11, 2021 at 12:07:37 PM UTC+10, jla...@highlandsniptechnology.com wrote:> On Sat, 10 Jul 2021 23:23:54 +0200, Klaus Kragelund > <klau...@hotmail.com> wrote: > > >10.07.21 22:50, jla...@highlandsniptechnology.com wrote: > >>This is looking like a real project. > >> > >>I need a dual pulse with low jitter, something like this: > >> > >>https://www.dropbox.com/s/j4df10lj6l4lcla/T500_Timing_Ramp_1.jpg?raw=1 > >> > >>The comparators have no spec for voltage or current noise. Worse, > >>their input current transitions from 0 to max as the ramp crosses > >>their various DAC thresholds. Messy. > >> > >>BUF602 is slick. I was considering a fast current-mode opamp, but > >>their Rf in follower mode makes gobs of noise. > >> > >> > >What about a programmable delay line, can they be had with low jitter? > > There were some old ECL parts, tapped delay lines, but they were > awful.Why? They shouldn't have been, but John Larkin presumably found some way of screwing them up.> A linear ramp and a comparator can be made very good.Unfortunately, a linear ramp goes through the threshold region more slowly than an edge propagating through a well-designed transmission line. However good you can make a linear ramp, you can make a delay-line-based solution better, if you know what you are doing.> We've pushed that concept down to about 30 fs RMS jitter.Somebody with a better grasp of what they were doing could push a better concept down even further.> This one should come out around 1 ps RMS.That's what you get out of a thinned crystal oscillator running at hundreds of MHz. It probably won't. -- Bill Sloman, Sydney
Reply by ●July 11, 20212021-07-11
On 10/07/2021 21:50, jlarkin@highlandsniptechnology.com wrote:> This is looking like a real project. > > I need a dual pulse with low jitter, something like this: > > https://www.dropbox.com/s/j4df10lj6l4lcla/T500_Timing_Ramp_1.jpg?raw=1 > > The comparators have no spec for voltage or current noise. Worse, > their input current transitions from 0 to max as the ramp crosses > their various DAC thresholds. Messy. > > BUF602 is slick. I was considering a fast current-mode opamp, but > their Rf in follower mode makes gobs of noise. >What is the maximum current the e-phemt can carry. If 100mA then ramp cap could be increased to 1000pF swamping out comparator input messiness and so avoid the buffer completely? Conversely has anyone tried using inductor current for fast ramps (just idle curiosity)? piglet
Reply by ●July 11, 20212021-07-11
"the concepts "male" and "female" are essentially social constructions" (Bill Sloman) Bozo the Clown... -- Anthony William Sloman <bill.sloman@ieee.org> wrote:> X-Received: by 2002:aed:3131:: with SMTP id 46mr22444523qtg.253.1625988011276; Sun, 11 Jul 2021 00:20:11 -0700 (PDT) > X-Received: by 2002:ae9:e606:: with SMTP id z6mr23181017qkf.326.1625988011059; Sun, 11 Jul 2021 00:20:11 -0700 (PDT) > Path: eternal-september.org!reader02.eternal-september.org!weretis.net!feeder8.news.weretis.net!proxad.net!feeder1-2.proxad.net!209.85.160.216.MISMATCH!news-out.google.com!nntp.google.com!postnews.google.com!google-groups.googlegroups.com!not-for-mail > Newsgroups: sci.electronics.design > Date: Sun, 11 Jul 2021 00:20:10 -0700 (PDT) > In-Reply-To: <jbkkegpkhvcrhl3oqmguf6plujrgptvc9e@4ax.com> > Injection-Info: google-groups.googlegroups.com; posting-host=14.202.161.14; posting-account=SJ46pgoAAABuUDuHc5uDiXN30ATE-zi- > NNTP-Posting-Host: 14.202.161.14 > References: <pa1keg10sd6vu7vpja56arfam8ag8ur7t3@4ax.com> <tscheppe.udapdxjy57cv@nntp.aioe.org> <jbkkegpkhvcrhl3oqmguf6plujrgptvc9e@4ax.com> > User-Agent: G2/1.0 > MIME-Version: 1.0 > Message-ID: <1d9b47ca-7714-467d-adf2-293c7158e15bn@googlegroups.com> > Subject: Re: dual pulse generator again > From: Anthony William Sloman <bill.sloman@ieee.org> > Injection-Date: Sun, 11 Jul 2021 07:20:11 +0000 > Content-Type: text/plain; charset="UTF-8" > Content-Transfer-Encoding: quoted-printable > Xref: reader02.eternal-september.org sci.electronics.design:636690 > > On Sunday, July 11, 2021 at 12:07:37 PM UTC+10, jla...@highlandsniptechnology.com wrote: >> On Sat, 10 Jul 2021 23:23:54 +0200, Klaus Kragelund >> <klau...@hotmail.com> wrote: >> >> >10.07.21 22:50, jla...@highlandsniptechnology.com wrote: >> >>This is looking like a real project. >> >> >> >>I need a dual pulse with low jitter, something like this: >> >> >> >>https://www.dropbox.com/s/j4df10lj6l4lcla/T500_Timing_Ramp_1.jpg?raw= > 1 >> >> >> >>The comparators have no spec for voltage or current noise. Worse, >> >>their input current transitions from 0 to max as the ramp crosses >> >>their various DAC thresholds. Messy. >> >> >> >>BUF602 is slick. I was considering a fast current-mode opamp, but >> >>their Rf in follower mode makes gobs of noise. >> >> >> >> >> >What about a programmable delay line, can they be had with low jitter? >> >> There were some old ECL parts, tapped delay lines, but they were >> awful. > > Why? They shouldn't have been, but John Larkin presumably found some way of screwing them up. > >> A linear ramp and a comparator can be made very good. > > Unfortunately, a linear ramp goes through the threshold region more slowly than an edge propagating through a well-designed transmission line. However good you can make a linear ramp, you can make a delay-line-based solution better, if you know what you are doing. > >> We've pushed that concept down to about 30 fs RMS jitter. > > Somebody with a better grasp of what they were doing could push a better concept down even further. > >> This one should come out around 1 ps RMS. > > That's what you get out of a thinned crystal oscillator running at hundreds of MHz. It probably won't. > > -- > Bill Sloman, Sydney > >
Reply by ●July 11, 20212021-07-11
On Sun, 11 Jul 2021 08:22:54 +0100, Piglet <erichpwagner@hotmail.com> wrote:>On 10/07/2021 21:50, jlarkin@highlandsniptechnology.com wrote: >> This is looking like a real project. >> >> I need a dual pulse with low jitter, something like this: >> >> https://www.dropbox.com/s/j4df10lj6l4lcla/T500_Timing_Ramp_1.jpg?raw=1 >> >> The comparators have no spec for voltage or current noise. Worse, >> their input current transitions from 0 to max as the ramp crosses >> their various DAC thresholds. Messy. >> >> BUF602 is slick. I was considering a fast current-mode opamp, but >> their Rf in follower mode makes gobs of noise. >> > >What is the maximum current the e-phemt can carry. If 100mA then ramp >cap could be increased to 1000pF swamping out comparator input messiness >and so avoid the buffer completely?This one, an SAV541, can conduct 100 mA if the gate drive is kept in spec. But Rds-on has a big positive tempco, around +2500 PPM/K, so you start to get time errors at high currents; hence the modest current and the buffer amp.> >Conversely has anyone tried using inductor current for fast ramps (just >idle curiosity)?The MIT RadLab books mention that! One can linearize the ramp by putting an inductor or ferrite bead in series with the charging resistor, but that only works at low duty cycles. Fast linear ramps aren't very linear anyhow, so the first 3 volts of a 10 volt exponential is not so bad. We do polynomial curve fits, with 16 bit DACs, to set timings. My six comparators wind up stepping their several uA bias currents as the ramp runs, another reason to use a buffer. I should change the 20 ohm resistor to 10. This circuit has a lot of subtleties; I had to make a list. -- John Larkin Highland Technology, Inc The best designs are necessarily accidental.
