I still have a skeleton in the cupboard and the current lock down seems fine to bury it for good. Let there be an amplifier consisting of one or more CS input JFETs, an optional cascode, an op amp for plenty loop gain and feedback into the source. Everybody and his dog does this, but it has a drawback: it is not stable. If you measure into the input, you see a capacitance in series with a resistance. Unfortunately, the resistance may be negative over a large range of frequencies. That means that with a suitable inductance at the input, one gets a undamped RLC series circuit, aka oscillator. The usual remedy would be a gate/base stopper. Just insert a resistor into the gate that is more positive than the worst negative value and you're done. But bandwidth and noise performance are gone. The next step is that people insert ferrite beads into the gates and claim victory. But that's Pyrrhus @ work or worse. The beads don't provide a loss resistance at, say, 100 KHz. And if they did, they would also provide the thermal noise that belongs to it, so a real resistor is just as good with less guesswork. Below a MHz, these beads can be inductors with excellent Q, I have put them on the bridge. This circuit is fig. 3.34 from Art Of Electronics V3 with a little different biasing that doesn't matter, I used sth. different as a starting point. < https://www.flickr.com/photos/137684711@N07/49922062651/in/album-72157662535945536/ > Some observations: 1. I used 16 pcs. CPH3910 in parallel. Sources must be RF grounded with a distributed array of capacitors or one finds 2V at 500 MHz there. This is a parasitic loop in the loop, Spice cannot see it because it cannot see the parasitics. Even 2 nF has no impact on the global loop dynamics. 2. For the feedback, the FETs are common gate. The gates being the fb reference, they must have known potential. The 1 Meg does not provide that at RF. There must be some capacitance from gate to GND. 3. R25 C11 are from experiments to save as much input impedance as possible while providing the RF gate-gnd connection. 4 The FET sources are a low impedance input. That may change the feedback factor / overall gain by loading the fb divider slightly. 5. AOE3 mentions a slight overshoot that is easily tamed. But really, the circuit is not stable. I have checked this with a lot of published circuits of this architecture and none of them was blameless, including mine. 6. V(vin) / I(v4) is the input impedance, as seen from the signal source. re() is the real part of this, the yellow trace in the upper plotting pane. The real part turns negative between 100 KHz and 20 MHz, as indicated by the 180° phase flip. The negative resistance is up to 500 Ohms. 7. It does not only happen in simulation but also in real life. < https://www.flickr.com/photos/137684711@N07/49921556853/in/album-72157662535945536/ > is the behavior of a similar circuit ( with BFT93 folded cascode and 2 lower gain op amps as an attempt to minimize phase shift). 8. It looks somewhat confusing, but the red line gets outside the unity circle of the Smith diagram for S11 and that means unstable. 9. In cartesian coordinates, the return loss S11 is actually 1.5 dB gain, i.e. we get more energy from the input port than we send into it. (blue) 10. The pink trace is the real part of Zin as computed from S11, and it is negative over some of the frequency range. 11. I can recommend the DG8SAQ VNWA, you get a lot of capabilities for a limited amount of money. In fact, it is much less user hostile than my ZVB8. Any insights from the s.e.d. swarm intelligence? Gerhard ... and for the due corona content, Yours truly in the lab: < https://www.flickr.com/photos/137684711@N07/49802585856/in/datetaken/ > hybrid.asc: %< ----- %< ----- %< ----- %< ----- %< ----- %< ----- %< ----- %< ----- Version 4 SHEET 1 2048 4792 WIRE -240 -656 -304 -656 WIRE -48 -656 -160 -656 WIRE 64 -656 -48 -656 WIRE 176 -656 64 -656 WIRE 816 -656 176 -656 WIRE 176 -640 176 -656 WIRE 640 -608 592 -608 WIRE 768 -608 704 -608 WIRE -352 -560 -432 -560 WIRE -304 -544 -304 -656 WIRE -352 -528 -352 -560 WIRE 592 -496 592 -608 WIRE 640 -496 592 -496 WIRE 768 -496 768 -608 WIRE 768 -496 720 -496 WIRE 912 -496 768 -496 WIRE -432 -464 -432 -480 WIRE 176 -464 176 -560 WIRE 304 -464 176 -464 WIRE 496 -464 304 -464 WIRE -112 -448 -144 -448 WIRE 112 -448 -32 -448 WIRE 176 -432 176 -464 WIRE 816 -432 816 -656 WIRE 496 -416 496 -464 WIRE 512 -416 496 -416 WIRE 592 -416 592 -496 WIRE 592 -416 576 -416 WIRE 784 -416 592 -416 WIRE -304 -400 -304 -464 WIRE 912 -400 912 -496 WIRE 912 -400 848 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\n*Connections non-inverting input\n* | inverting input\n* | | positive power supply\n* | | | negative power supply\n* | | | | output\n* | | | | |\n.SUBCKT LM6171A 3 2 4 5 6\n* CAUTION: SET .OPTIONS GMIN=1E-16 TO CORRECTLY MODEL INPUT BIAS CURRENT.\n* Features:\n* +/-15V Operation\n* Unity Gain Stable\n* Offset voltage (max) = 3mV\n* Gain-bandwidth product = 100 MHz \n* Supply current = 2.5mA\n* Slew rate = 3600V/uS\n* Open Loop gain = 90dB\n********************************************************************\nEOX 120 10 31 32 2.0\nRCX 120 121 1K\nRDX 121 10 1K\nRBX 120 122 1K\nGOS 10 57 122 121 1.0\nRVOS 31 32 1K\nRINB 2 18 1000\nRINA 3 19 1000\nDIN1 5 18 DMOD2\nDIN2 18 4 DMOD2\nDIN3 5 19 DMOD2\nDIN4 19 4 DMOD2\nEXX 10 5 17 5 1.0\nEEE 10 50 17 5 1.0\nECC 40 10 4 17 1.0\nRAA 4 17 100MEG\nRBB 17 5 100MEG\nISET 10 24 1e-3\nDA1 24 23 DMOD1\nRBAL 23 22 1000\nESUPP 22 21 4 5 1.0\nVOFF 21 10 -1.25\nDA2 24 25 DMOD1\nVSENS1 25 26 DC 0\nRSET 26 10 1K\nCSET 26 10 1e-10\nFSET 10 31 VSENS1 1.0\nR001 34 10 1K\nFTEMP 10 27 VSENS1 1.0\nDTA 27 10 DMOD2\nDTB 28 29 DMOD2\nVTEMP 29 10 DC 0\nECMR 38 10 11 10 1.0\nVCMX 38 39 DC 0\nRCM2 41 10 1MEG\nEPSR 42 10 4 10 1.0\nCDC1 43 42 10U\nVPSX 43 44 DC 0\nRPSR2 45 10 1MEG\nFCXX 57 10 VCXX 100\nDCX1 98 97 DMOD1\nDCX2 95 94 DMOD1\nRCX1 99 98 100\nRCX2 94 99 100\nVCXX 99 96 DC 0\nECMX 96 10 11 10 1.0\nDLIM1 52 57 DMOD1\nDLIM2 57 51 DMOD1\nELIMP 51 10 26 10 99.3\nGDM 10 57 3 2 1\nC1 58 59 1e-10\nDCLMP2 59 40 DMOD1\nDCLMP1 50 59 DMOD1\nRO2 59 10 1K\nGO3 10 71 59 10 1\nRO3 71 10 1\nDDN1 73 74 DMOD1\nDDN2 73 710 DMOD1\nDDP1 75 72 DMOD1\nDDP2 71 720 DMOD1\nRDN2 710 71 100\nRDP 720 72 100\nVOOP 40 76 DC 0\nVOON 77 50 DC 0\nQNO 76 73 78 NPN1\nQNP 77 72 79 PNP1\nRNO 78 81 1\nRPO 79 81 1\nVOX 86 6 DC 0\nRNT 76 81 100MEG\nRPT 81 77 1MEG\nFX 10 93 VOX 1.0\nDFX1 93 91 DMOD1\nVFX1 91 10 DC 0\nDFX2 92 93 DMOD1\nVFX2 10 92 DC 0\nFPX 4 10 VFX1 1.0\nFNX 10 5 VFX2 1.0\nRAX 122 10 MRAX 1.006000e+03\n.MODEL MRAX RES (TC1=-1.1e-05)\nFIN1 18 5 VTEMP 0.985\nFIN2 19 5 VTEMP 1.015\nCIN1 2 10 1e-12\nCIN2 3 10 1e-12\nRD1 18 11 2.45e+06\nRD2 19 11 2.45e+06\nRCM 11 10 3.8775e+07\nFCMR 10 57 VCMX 3.16228\nFPSR 10 57 VPSX 63.2456\nRSLOPE 4 5 33333.3\nGPWR 4 5 26 10 0.0016\nETEMP 27 28 32 33 0.178427\nRIB 32 33 MRIB 1K\n.MODEL MRIB RES (TC1=0.00389579)\nRISC 33 34 MRISC 1K\n.MODEL MRISC RES (TC1=-0.002)\nRCM1 39 41 10\nCCM 41 10 2.65258e-11\nRPSR1 44 45 100\nCPSR 45 10 1.59155e-10\nELIMN 10 52 26 10 91.8926\nRDM 57 10 23.5073\nC2 57 10 4.78743e-11\nECMP 40 97 26 10 2\nECMN 95 50 26 10 2\nG2 58 10 57 10 0.00378\nR2 58 10 11.254\nGO2 59 10 58 10 35\nEPOS 40 74 26 10 1.4\nENEG 75 50 26 10 1.5\nGSOURCE 74 73 33 34 0.00135\nGSINK 72 75 33 34 0.00135\nROO 81 86 13\n.MODEL DMOD1 D\n*-- DMOD1 DEFAULT PARAMETERS\n*IS=1e-14 RS=0 N=1 TT=0 CJO=0\n*VJ=1 M=0.5 EG=1.11 XTI=3 FC=0.5\n*KF=0 AF=1 BV=inf IBV=1e-3 TNOM=27\n.MODEL DMOD2 D (IS=1e-17)\n*-- DMOD2 DEFAULT PARAMETERS\n*RS=0 N=1 TT=0 CJO=0\n*VJ=1 M=0.5 EG=1.11 XTI=3 FC=0.5\n*KF=0 AF=1 BV=inf IBV=1e-3 TNOM=27\n.MODEL NPN1 NPN (BF=100 IS=1e-15)\n*-- NPN1 DEFAULT PARAMETERS\n*NF=1 VAF=inf IKF=inf ISE=0 NE=1.5\n*BR=1 NR=1 VAR=inf IKR=inf ISC=0\n*NC=2 RB=0 IRB=inf RBM=0 RE=0 RC=0\n*CJE=0 VJE=0.75 MJE=0.33 TF=0 XTF=0\n*VTF=inf ITF=0 PTF=0 CJC=0 VJC=0.75\n*MJC=0.33 XCJC=1 TR=0 CJS=0 VJS=0.75\n*MJS=0 XTB=0 EG=1.11 XTI=3 KF=0 AF=1\n*FC=0.5 TNOM=27\n.MODEL PNP1 PNP (BF=100 IS=1e-15)\n*-- PNP1 DEFAULT PARAMETERS\n*NF=1 VAF=inf IKF=inf ISE=0 NE=1.5\n*BR=1 NR=1 VAR=inf IKR=inf ISC=0\n*NC=2 RB=0 IRB=inf RBM=0 RE=0 RC=0\n*CJE=0 VJE=0.75 MJE=0.33 TF=0 XTF=0\n*VTF=inf ITF=0 PTF=0 CJC=0 VJC=0.75\n*MJC=0.33 XCJC=1 TR=0 CJS=0 VJS=0.75\n*MJS=0 XTB=0 EG=1.11 XTI=3 KF=0 AF=1\n*FC=0.5 TNOM=27\n.ENDS\n*$ %< ----- %< ----- %< ----- %< ----- %< ----- %< ----- %< ----- %< -----
amplifiers will, oscillators won't
Started by ●May 22, 2020
Reply by ●May 22, 20202020-05-22
On 2020-05-22 06:03, Gerhard Hoffmann wrote:> > I still have a skeleton in the cupboard and the current lock down > seems fine to bury it for good. > > Let there be an amplifier consisting of one or more CS input JFETs, > an optional cascode, an op amp for plenty loop gain and feedback > into the source. Everybody and his dog does this, but it has > a drawback: it is not stable. > > If you measure into the input, you see a capacitance in series with > a resistance. Unfortunately, the resistance may be negative over > a large range of frequencies. That means that with a suitable > inductance at the input, one gets a undamped RLC series circuit, > aka oscillator. > > The usual remedy would be a gate/base stopper. Just insert a resistor > into the gate that is more positive than the worst negative value > and you're done. But bandwidth and noise performance are gone. > > The next step is that people insert ferrite beads into the gates > and claim victory. But that's Pyrrhus @ work or worse. > The beads don't provide a loss resistance at, say, 100 KHz. And > if they did, they would also provide the thermal noise that belongs > to it, so a real resistor is just as good with less guesswork. > > Below a MHz, these beads can be inductors with excellent Q, I have > put them on the bridge. > > This circuit is fig. 3.34 from Art Of Electronics V3 with a little > different biasing that doesn't matter, I used sth. different as > a starting point. > > < > https://www.flickr.com/photos/137684711@N07/49922062651/in/album-72157662535945536/ > > > > Some observations: > > 1. I used 16 pcs. CPH3910 in parallel. Sources must be RF grounded > with a distributed array of capacitors or one finds 2V at 500 MHz > there. This is a parasitic loop in the loop, Spice cannot see it > because it cannot see the parasitics. Even 2 nF has no impact on > the global loop dynamics. > > 2. For the feedback, the FETs are common gate. The gates being > the fb reference, they must have known potential. The 1 Meg > does not provide that at RF. There must be some capacitance > from gate to GND. > > 3. R25 C11 are from experiments to save as much input impedance > as possible while providing the RF gate-gnd connection. > > 4 The FET sources are a low impedance input. That may change > the feedback factor / overall gain by loading the fb divider slightly. > > 5. AOE3 mentions a slight overshoot that is easily tamed. But > really, the circuit is not stable. I have checked this with > a lot of published circuits of this architecture and none of them > was blameless, including mine. > > 6. V(vin) / I(v4) is the input impedance, as seen from the signal > source. re() is the real part of this, the yellow trace in the > upper plotting pane. The real part turns negative between 100 KHz > and 20 MHz, as indicated by the 180° phase flip. The negative > resistance is up to 500 Ohms. > > 7. It does not only happen in simulation but also in real life. > > < > https://www.flickr.com/photos/137684711@N07/49921556853/in/album-72157662535945536/ > > > > is the behavior of a similar circuit ( with BFT93 folded cascode > and 2 lower gain op amps as an attempt to minimize phase shift). > > 8. It looks somewhat confusing, but the red line gets outside the > unity circle of the Smith diagram for S11 and that means unstable. > > 9. In cartesian coordinates, the return loss S11 is actually 1.5 dB > gain, i.e. we get more energy from the input port than we send into it. > (blue) > > 10. The pink trace is the real part of Zin as computed from S11, and > it is negative over some of the frequency range. > > 11. I can recommend the DG8SAQ VNWA, you get a lot of capabilities > for a limited amount of money. In fact, it is much less user hostile > than my ZVB8. > > > Any insights from the s.e.d. swarm intelligence? > > Gerhard > > > ... and for the due corona content, Yours truly in the lab: > > < https://www.flickr.com/photos/137684711@N07/49802585856/in/datetaken/ > ><snipped .asc> Haven't run the model yet, but normally a right-way-up cascode is pretty nearly unilateral. Maybe you aren't running enough collector current in the PNP for it to hold its emitter sufficiently still. A bit of local feedback wrapped round the cascode can reduce the drain swing by another 1-2 orders of magnitude, which ought to make it really unilateral. I like to use SiGe:C transistors such as the BFP650 for that sort of job, with a 5-ohm BLM15BB bead in the base. That's pretty noise-free down where CPH3910s are useful, but stabilizes the BJT nicely. Cheers Phil Hobbs -- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC / Hobbs ElectroOptics Optics, Electro-optics, Photonics, Analog Electronics Briarcliff Manor NY 10510 http://electrooptical.net http://hobbs-eo.com
Reply by ●May 22, 20202020-05-22
Am 22.05.20 um 14:04 schrieb Phil Hobbs:> > Haven't run the model yet, but normally a right-way-up cascode is pretty > nearly unilateral. Maybe you aren't running enough collector current in > the PNP for it to hold its emitter sufficiently still. > > A bit of local feedback wrapped round the cascode can reduce the drain > swing by another 1-2 orders of magnitude, which ought to make it really > unilateral. I like to use SiGe:C transistors such as the BFP650 for > that sort of job, with a 5-ohm BLM15BB bead in the base. That's pretty > noise-free down where CPH3910s are useful, but stabilizes the BJT nicely. >I'd like to have only 2 pairs of 18650 lithium batteries, maybe +-7V when nearly empty ( discharge end is even lower, but I'm willing to do compromises). That calls for a folded cascode to use up all available battery voltage. Therefore, a PNP is needed. Dying species. :-( Cascode current was 5 to 16 mA, it should be sufficient. 1 MHz BW would be OK. I had also a normal cascode with 2+4 cells or even more. That helps the low-noise gain of the FET/BJT with the larger load resistor. The cascode does not seem to be the problem, the AOE3 circuit even works without. OK, the op amp somehow doubles as one. The circuits behave nicely unless the feedback loop is closed. When the loop is closed, the source is no longer at GND although optically it seems so with the half Ohm Rsource. The source then follows the gate and the FETs could argue that they do a follower: drain sees the low impedance cascode, source sees a stiff load, but the voltage at the source lags by the loop delay. Just like the standard cap-loaded-follower disaster. At least in simulation it gets much better when i play with VCVS instead of op amps. But the THS4022 for example brings its own problems in real life. Local oscillations and huge 1/f noise, for example.> CheersGerhard
Reply by ●May 22, 20202020-05-22
On 2020-05-22 08:52, Gerhard Hoffmann wrote:> Am 22.05.20 um 14:04 schrieb Phil Hobbs: > >> >> Haven't run the model yet, but normally a right-way-up cascode is >> pretty nearly unilateral. Maybe you aren't running enough collector >> current in the PNP for it to hold its emitter sufficiently still. >> >> A bit of local feedback wrapped round the cascode can reduce the drain >> swing by another 1-2 orders of magnitude, which ought to make it >> really unilateral. I like to use SiGe:C transistors such as the >> BFP650 for that sort of job, with a 5-ohm BLM15BB bead in the base. >> That's pretty noise-free down where CPH3910s are useful, but >> stabilizes the BJT nicely. >> > > I'd like to have only 2 pairs of 18650 lithium batteries, maybe > +-7V when nearly empty ( discharge end is even lower, but I'm > willing to do compromises). > That calls for a folded cascode to use up all available battery > voltage. Therefore, a PNP is needed. Dying species. :-( > Cascode current was 5 to 16 mA, it should be sufficient. > 1 MHz BW would be OK.You can save headroom by capacitively coupling to a common-base NPN stage--sort of a diagonal cascode vs. inverted. It makes the biasing a bit more complicated, of course.> I had also a normal cascode with 2+4 cells or even more. That > helps the low-noise gain of the FET/BJT with the larger load > resistor. > > The cascode does not seem to be the problem, the AOE3 circuit > even works without. OK, the op amp somehow doubles as one.Op amps make very disappointing cascodes on account of their large transient input errors.> > The circuits behave nicely unless the feedback loop is closed.Ah, okay. I'll have a squint at the circuit later today.> When the loop is closed, the source is no longer at GND although > optically it seems so with the half Ohm Rsource. > > The source then follows the gate and the FETs could argue that > they do a follower: drain sees the low impedance cascode, source sees > a stiff load, but the voltage at the source lags by the loop delay. > Just like the standard cap-loaded-follower disaster.Some lead-lag thing might work--I'll have a squint.> > At least in simulation it gets much better when i play with VCVS > instead of op amps. But the THS4022 for example brings its own > problems in real life. Local oscillations and huge 1/f noise, for example.Cheers Phil Hobbs -- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC / Hobbs ElectroOptics Optics, Electro-optics, Photonics, Analog Electronics Briarcliff Manor NY 10510 http://electrooptical.net http://hobbs-eo.com
Reply by ●May 22, 20202020-05-22
On 2020-05-22 05:52, Gerhard Hoffmann wrote:> Am 22.05.20 um 14:04 schrieb Phil Hobbs: > >> >> Haven't run the model yet, but normally a right-way-up cascode is >> pretty nearly unilateral. Maybe you aren't running enough collector >> current in the PNP for it to hold its emitter sufficiently still. >> >> A bit of local feedback wrapped round the cascode can reduce the drain >> swing by another 1-2 orders of magnitude, which ought to make it >> really unilateral. I like to use SiGe:C transistors such as the >> BFP650 for that sort of job, with a 5-ohm BLM15BB bead in the base. >> That's pretty noise-free down where CPH3910s are useful, but >> stabilizes the BJT nicely. >> > > I'd like to have only 2 pairs of 18650 lithium batteries, maybe > +-7V when nearly empty ( discharge end is even lower, but I'm > willing to do compromises). > That calls for a folded cascode to use up all available battery > voltage. Therefore, a PNP is needed. Dying species. :-(You can still get them. These guys have about 2000 BFT93 but prices for those seem to be climbing, fast: https://www.verical.com/pd/nxp-semiconductors-rf-bjt-BFT93W-115-388455 OTOH, right now that's the same with toilet paper, flour, sugar and baker's yeast. Off to the kitchen now, kneading bread dough using a kneading hook and an electric drill. [...] -- Regards, Joerg http://www.analogconsultants.com/
Reply by ●May 22, 20202020-05-22
Joerg <news@analogconsultants.com> wrote:> OTOH, right now that's the same with toilet paper, flour, sugar and > baker's yeast. > > Off to the kitchen now, kneading bread dough using a kneading hook and > an electric drill.You might be interested in a new technique that eliminates kneading. You can use a bread pan for rectangular loaves, or a skillet for round loaves. Very tasty without all the effort. no-knead Website: nokneadbreadcentral.com no-knead bread on Youtube https://www.youtube.com/results?search_query=no-knead+bread How to Bake No-Knead �Turbo� Bread in a Skillet (ready to bake in 2-1/2 hours) https://www.youtube.com/watch?v=Q4DQLB7_U1Q No Knead Bread | Bread Recipe | The New York Times https://www.youtube.com/watch?v=13Ah9ES2yTU No Knead Bread Recipe Stuff In Our Cupboard Keep Calm - Bake On! https://www.youtube.com/watch?v=4gmCrbBGQy0 Faster No Knead Bread - So Easy ANYONE can make (but NO BOILING WATER!!) https://www.youtube.com/watch?v=I0t8ZAhb8lQ No Knead Artisan Bread https://www.youtube.com/watch?v=WI8CwdKk8II Ultimate Introduction to No-Knead Bread (4 Ingredients... No Yeast Proofing... No Mixer) https://www.youtube.com/watch?v=yePMpoyXwys
Reply by ●May 22, 20202020-05-22
On 2020-05-22 13:41, Steve Wilson wrote:> Joerg <news@analogconsultants.com> wrote: > >> OTOH, right now that's the same with toilet paper, flour, sugar and >> baker's yeast. >> >> Off to the kitchen now, kneading bread dough using a kneading hook and >> an electric drill. > > You might be interested in a new technique that eliminates kneading. You > can use a bread pan for rectangular loaves, or a skillet for round loaves. > Very tasty without all the effort. > > no-knead Website: > nokneadbreadcentral.com > > no-knead bread on Youtube > https://www.youtube.com/results?search_query=no-knead+bread > > How to Bake No-Knead �Turbo� Bread in a Skillet (ready to bake in 2-1/2 > hours) > https://www.youtube.com/watch?v=Q4DQLB7_U1Q > > No Knead Bread | Bread Recipe | The New York Times > https://www.youtube.com/watch?v=13Ah9ES2yTU > > No Knead Bread Recipe Stuff In Our Cupboard Keep Calm - Bake On! > https://www.youtube.com/watch?v=4gmCrbBGQy0 > > Faster No Knead Bread - So Easy ANYONE can make (but NO BOILING WATER!!) > https://www.youtube.com/watch?v=I0t8ZAhb8lQ > > No Knead Artisan Bread > https://www.youtube.com/watch?v=WI8CwdKk8II > > Ultimate Introduction to No-Knead Bread (4 Ingredients... No Yeast > Proofing... No Mixer) > https://www.youtube.com/watch?v=yePMpoyXwys >Yes, such bread is simple to make and I love French-style. The problem is that it's bad for my waist line. People like me tend to eat a lot more of it versus denser and more tart bread. We make our bread from beer fermentation residue (I am brewing all our beer myself) and then has almost the density of plutonium :-) We used to make bannock for a while which is essentially an almost-no-knead bread. That did not jibe with my weight loss strategies. Admittedly, once in a while I cave. When I smell freshly made baguette at the store I can't resist and bring one home. Thanks to modern tools such as Li-Ion drills kneading is easy. About two hours ago I kneaded two loaves and each took less than 5min. Tomorrow I am going to make a Manzanita fire in the old Weber kettle, gradually snuff it our, put a thick metal plate on the grill, slide on the bread which is on a lightly oiled aluminum foil, turn it around after 12-14mins, and after another 12-14mins it's done. Dense structure, thick and hard crust, intense hop taste. The only bread in this area that remotely comes close is Italian Farmer's Bread but I'd have to drive or ride my bike about 35mi round trip for that and you never know whether they even have some. -- Regards, Joerg http://www.analogconsultants.com/
