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Protecting a CMOS gate input

Started by Pimpom May 15, 2020
On 16/05/2020 02:08, jlarkin@highlandsniptechnology.com wrote:
> On Fri, 15 May 2020 14:26:02 +0100, Piglet <erichpwagner@hotmail.com> > wrote: > >> On 15/05/2020 11:53, Pimpom wrote: >>> I'm going to use a CMOS bistable chip (not a uP) that's to be manually >>> triggered from time to time by a mechanical switch. It has a debouncing >>> circuit but since the switch is to be connected by a removable >>> jack-and-cable set and operated by non-techno savvy users, I thought I'd >>> include a few extra components as a precaution. >>> >>> The input will have a series resistor followed by a capacitor to ground >>> and schottky diodes to Vdd and Vss. Do you think any of this is >>> superfluous since the chip already has similar protection built-in? >> >> The schottky diodes may well be superfluous depending on the value of >> series resistance. If R is high enough to keep highest expected surge >> voltage well below input ESD diode latch-up trigger current. The >> parallel C has to be large enough to limit rise time to least many ns >> for the diodes to begin forward conduction. Since the input is from a >> push button and the input is not edge rate critical you can afford to >> massively overdo the series R and shunt C. You haven't mentioned having >> a pullup or pull down resistor, generally pushbutton contacts need at >> least 100uA "wetting" current to ensure reliable operation. >> >> piglet > > Little resistors can arc over, given a good ESD zap.
Yes. It would be worthwhile to use a resistor rated for several kV (some are inexpensive) or tested and found to usually survive and also not arc over and thereby carry more current than Ohm's law would predict. By putting the incoming signal trace close to a big ground pour on the PCB and removing a small region of solder mask, you could make a spark gap that will arc over at a few kV to shunt the ESD before it reaches the series resistor, and provided the resistor can take more than the voltage at which the spark gap arcs over, the resistor ought to be safe. You can of course buy spark gaps and gas discharge tubes, if the parts budget permits.
On 5/16/2020 5:04 PM, Jasen Betts wrote:
> On 2020-05-15, Pimpom <nobody@nowhere.com> wrote: > >> Okay, here it is - somewhat simplified and slightly different >> from my actual circuit, but not in any way that changes the >> operating principles: >> https://www.dropbox.com/s/juomu98oyz1vxec/Debounced%20flip-flop.png?dl=0 >> >> C2 & R3 do the debouncing, C1 & R2 set the initial state of the >> flip-flop. > > Ah, it's similar to the feeback debounce used with dual-inverter > bistables. eg: https://i.stack.imgur.com/yDeFm.png > > But your circuit allows the switch be be connected to a > power node at one end, which is a nice feature, also not > free-running if the switch is held. >
Yeah. And as I explained further in reply to someone else, the circuit I'm actually using uses ground as Vdd and -12V as Vss so that one end of the switch will be at ground potential.
On 16/05/2020 2:05 pm, Pimpom wrote:
> On 5/16/2020 5:04 PM, Jasen Betts wrote: >> On 2020-05-15, Pimpom <nobody@nowhere.com> wrote: >> >>> Okay, here it is - somewhat simplified and slightly different >>> from my actual circuit, but not in any way that changes the >>> operating principles: >>> https://www.dropbox.com/s/juomu98oyz1vxec/Debounced%20flip-flop.png?dl=0 >>> >>> C2 & R3 do the debouncing, C1 & R2 set the initial state of the >>> flip-flop. >> >> Ah, it's similar to the feeback debounce used with dual-inverter >> bistables. eg: https://i.stack.imgur.com/yDeFm.png >> >> But your circuit allows the switch be be connected to a >> power node at one end, which is a nice feature, also not >> free-running if the switch is held. >> > Yeah. And as I explained further in reply to someone else, the circuit > I'm actually using uses ground as Vdd and -12V as Vss so that one end of > the switch will be at ground potential. >
Because you want the button signal to clock the flip-flop the RC filtering cannot be too aggressive else the clock input rise time will be too slow, I reckon CD4013 is good to few dozen us so here is my suggestion: <www.dropbox.com/s/6bq5nftab82er6w/Pimpom_Debounce.jpg?dl=0> The 330 ohm gives a contact make current of 50mA to help clear oxide films and the 10k keeps 1.2mA flowing as long as pressed. In event of surge the 0.1uF cap absorbs most of the rise and the 100k in series with the clock input keeps the chip safe. Depending on the power supply rate of decay you may want to add the ? resistors to protect the chip esd diodes from the biggish caps. piglet piglet
On 2020-05-16 03:21, upsidedown@downunder.com wrote:
> On Fri, 15 May 2020 14:04:53 -0700 (PDT), pcdhobbs@gmail.com wrote: > >>> The GSM cellular phone signal is TDMA and if is rectified in an >>> oxidized cable connector or some protection diodes, it will generate a >>> square wave of a few hundred Hertz, which could misfire the flip-flop. >> >> The FF has at least 4V of noise immunity. That would take quite the cell phone. ;) > > For CD4013, the noise margin at Vdd=5 V is quoted as 1 V and at Vdd=15 > V as 2.5 V.
CMOS logic threshold is very roughly between 1/3 and 2/3 of VDD.
> Consumer electronics is suppose to withstand a 3 V/m field strength > without malfunctioning. > > A random wire several wavelengths long will capture about similar > voltages as a 1/4 wavelength monopole. A 1/4 wave monopole at 900 MHz > is about 0.1 m, so 3 V/m will induce 0.3 V into the wire. This is for > the far field. When the transmitter is in the near field, the voltage > can vary significantly. >
But you have to rectify it before it can cause logic problems in dog-slow 4000-series CMOS. Good luck getting volts of rectified signal from an input diode. Cheers Phil Hobbs -- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC / Hobbs ElectroOptics Optics, Electro-optics, Photonics, Analog Electronics Briarcliff Manor NY 10510 http://electrooptical.net http://hobbs-eo.com
On Saturday, May 16, 2020 at 8:02:45 AM UTC-4, Jasen Betts wrote:
> On 2020-05-15, Pimpom <nobody@nowhere.com> wrote: > > > Okay, here it is - somewhat simplified and slightly different > > from my actual circuit, but not in any way that changes the > > operating principles: > > https://www.dropbox.com/s/juomu98oyz1vxec/Debounced%20flip-flop.png?dl=0 > > > > C2 & R3 do the debouncing, C1 & R2 set the initial state of the > > flip-flop. > > Ah, it's similar to the feeback debounce used with dual-inverter > bistables. eg: https://i.stack.imgur.com/yDeFm.png > > But your circuit allows the switch be be connected to a > power node at one end, which is a nice feature, also not > free-running if the switch is held.
Not free running, but if the switch is held long enough the opening of the switch can also bounce and toggle the circuit back to the original state. Make the time constant very long to deal with this issue and that sets a limit to the time before the FF state can be changed again. The inherent limitation of this circuit is that the RC timer and FF are being used to debounce the control, the FF is also being used to remember a state controlled by the debounced button. The circuit really needs two FFs, one to debounce and one to remember the state. Then the timeout can be as short as the max bounce period and no need to worry about how long a user holds the button. Rather than two FFs, a simple approach might be to use the RC on the switch input and a FF with a Schmitt trigger clock input. The RC will provide a slowly changing input which the Schmitt trigger input will accept without bouncing. Tie the Qn to the D and you get transitions on every button press. The only issue is the RC delay is added to detection of the input change. For real world push buttons that's not normally an issue. For machine controlled switches it may be a problem. -- Rick C. +-- Get 1,000 miles of free Supercharging +-- Tesla referral code - https://ts.la/richard11209
Ricky C wrote:
> On Saturday, May 16, 2020 at 8:02:45 AM UTC-4, Jasen Betts wrote: >> On 2020-05-15, Pimpom <nobody@nowhere.com> wrote: >> >>> Okay, here it is - somewhat simplified and slightly different >>> from my actual circuit, but not in any way that changes the >>> operating principles: >>> https://www.dropbox.com/s/juomu98oyz1vxec/Debounced%20flip-flop.png?dl=0 >>> >>> C2 & R3 do the debouncing, C1 & R2 set the initial state of the >>> flip-flop. >> >> Ah, it's similar to the feeback debounce used with dual-inverter >> bistables. eg: https://i.stack.imgur.com/yDeFm.png >> >> But your circuit allows the switch be be connected to a >> power node at one end, which is a nice feature, also not >> free-running if the switch is held. > > Not free running, but if the switch is held long enough the opening > of the switch can also bounce and toggle the circuit back to the > original state. Make the time constant very long to deal with this > issue and that sets a limit to the time before the FF state can be > changed again. > > The inherent limitation of this circuit is that the RC timer and FF > are being used to debounce the control, the FF is also being used to > remember a state controlled by the debounced button. The circuit > really needs two FFs, one to debounce and one to remember the state. > Then the timeout can be as short as the max bounce period and no need > to worry about how long a user holds the button. > > Rather than two FFs, a simple approach might be to use the RC on the > switch input and a FF with a Schmitt trigger clock input. The RC > will provide a slowly changing input which the Schmitt trigger input > will accept without bouncing. Tie the Qn to the D and you get > transitions on every button press. The only issue is the RC delay is > added to detection of the input change. For real world push buttons > that's not normally an issue. For machine controlled switches it may > be a problem.
You mean like this, to prevent toggling again on release? ^ | | R 1M | | | _|_ |-----| +---X X---+---------|> Q|------- | | | _| | | |---|D Q|---| | | | |-----| | | | | | === 1uF R 1K +------R------| | | | 100K | | === 1uF | | | |---------+-----+ | ----- --- -
On Sunday, May 17, 2020 at 12:12:18 AM UTC-4, Tom Del Rosso wrote:
> Ricky C wrote: > > On Saturday, May 16, 2020 at 8:02:45 AM UTC-4, Jasen Betts wrote: > >> On 2020-05-15, Pimpom <nobody@nowhere.com> wrote: > >> > >>> Okay, here it is - somewhat simplified and slightly different > >>> from my actual circuit, but not in any way that changes the > >>> operating principles: > >>> https://www.dropbox.com/s/juomu98oyz1vxec/Debounced%20flip-flop.png?dl=0 > >>> > >>> C2 & R3 do the debouncing, C1 & R2 set the initial state of the > >>> flip-flop. > >> > >> Ah, it's similar to the feeback debounce used with dual-inverter > >> bistables. eg: https://i.stack.imgur.com/yDeFm.png > >> > >> But your circuit allows the switch be be connected to a > >> power node at one end, which is a nice feature, also not > >> free-running if the switch is held. > > > > Not free running, but if the switch is held long enough the opening > > of the switch can also bounce and toggle the circuit back to the > > original state. Make the time constant very long to deal with this > > issue and that sets a limit to the time before the FF state can be > > changed again. > > > > The inherent limitation of this circuit is that the RC timer and FF > > are being used to debounce the control, the FF is also being used to > > remember a state controlled by the debounced button. The circuit > > really needs two FFs, one to debounce and one to remember the state. > > Then the timeout can be as short as the max bounce period and no need > > to worry about how long a user holds the button. > > > > Rather than two FFs, a simple approach might be to use the RC on the > > switch input and a FF with a Schmitt trigger clock input. The RC > > will provide a slowly changing input which the Schmitt trigger input > > will accept without bouncing. Tie the Qn to the D and you get > > transitions on every button press. The only issue is the RC delay is > > added to detection of the input change. For real world push buttons > > that's not normally an issue. For machine controlled switches it may > > be a problem. > > You mean like this, to prevent toggling again on release? > > > ^ > | > | > R 1M > | | > | _|_ |-----| > +---X X---+---------|> Q|------- > | | | _| > | | |---|D Q|---| > | | | |-----| | > | | | | > === 1uF R 1K +------R------| > | | | 100K > | | === 1uF > | | | > |---------+-----+ > | > ----- > --- > -
I don't think that is quite right. This way there is no debouncing of the voltage from the cap. The cap has to be on the clock input and then the resistors need to be swapped. 1 second RC might be a bit long. 1K from the switch to ground with the switch feeding the clock input with 100K and 1.0uF to power. This requires a negative edge clock. Or run the switch to power and let the cap and discharge resistor go to ground. The switch can be the only thing on the end of the cable and the switch resistor can be in the unit as the series limiting resistor. ^ | X | |=== X | | |-----| +--R1K--+----x---------|> Q|----- | | | _| | | |---|D Q|---| | | | |-----| | | |1uF | | R100K === +-------------| | | | | | | +----+ | ----- --- - The time constant on the Qn feedback to the D is not needed at all then. The RC does the debouncing (as long as the clock input is a Schmitt trigger) and the FF just needs to toggle. Am I missing something? -- Rick C. +-+ Get 1,000 miles of free Supercharging +-+ Tesla referral code - https://ts.la/richard11209
On 16/05/2020 03:02, Pimpom wrote:
> On 5/15/2020 9:21 PM, Ricky C wrote: >> On Friday, May 15, 2020 at 9:16:08 AM UTC-4, Pimpom wrote: >>> On 5/15/2020 5:54 PM, Ricky C wrote: >>>> On Friday, May 15, 2020 at 8:02:16 AM UTC-4, Pimpom wrote: >>>>> On 5/15/2020 5:20 PM, Ricky C wrote: >>>>>> On Friday, May 15, 2020 at 7:35:54 AM UTC-4, Pimpom wrote: >>>>>>> On 5/15/2020 4:37 PM, Ricky C wrote: >>>>>>>> On Friday, May 15, 2020 at 6:54:08 AM UTC-4, Pimpom wrote: >>>>>>>>> I'm going to use a CMOS bistable chip (not a uP) that's to be >>>>>>>>> manually triggered from time to time by a mechanical switch. It >>>>>>>>> has a debouncing circuit but since the switch is to be connected >>>>>>>>> by a removable jack-and-cable set and operated by non-techno >>>>>>>>> savvy users, I thought I'd include a few extra components as a >>>>>>>>> precaution. >>>>>>>>> >>>>>>>>> The input will have a series resistor followed by a capacitor to >>>>>>>>> ground and schottky diodes to Vdd and Vss. Do you think any of >>>>>>>>> this is superfluous since the chip already has similar protection >>>>>>>>> built-in? >>>>>>>> >>>>>>>> If you are connecting this to the external world nothing is >>>>>>>> superfluous.&nbsp; You might add a front end bipolar transistor, a >>>>>>>> zener diode or TVS or maybe even a gas discharge tube depending >>>>>>>> on the environment. >>>>>>>> >>>>>>>> I'm curious about what a "CMOS bistable chip" is exactly.&nbsp; I >>>>>>>> assume you are not talking about an SR FF?&nbsp; If so, you don't >>>>>>>> really need debouncing.&nbsp; Why use CMOS rather than something more >>>>>>>> static resistant like relays or fluidics? >>>>>>>> >>>>>>> >>>>>>> It's a good old 4013. I used one in a similar sub-circuit years >>>>>>> ago but in a completely different product. I used a BJT front end >>>>>>> which also served as an inverter. The present design works >>>>>>> correctly without inversion so I thought I'd do away with the BJT. >>>>>>> >>>>>>> I did consider using a relay but it would take up too much PCB >>>>>>> real estate. I have a very limited choice of relay types I can >>>>>>> get. Same with the external switch. I can use only an SPST type, >>>>>>> so an S-R FF is out. >>>>>> >>>>>> Huh?&nbsp; Is the FF only to debounce your PB?&nbsp; What puts your CMOS >>>>>> chip in the other state?&nbsp; I'm not following what you are doing at >>>>>> all.&nbsp; I was thinking the PB would connect to one input of the SR >>>>>> and the other input would be the input that resets it. >>>>>> >>>>>> I wasn't really serious about the relay.&nbsp; But CMOS is likely your >>>>>> worse choice for connecting to the outside world.&nbsp; There are >>>>>> plenty of TTL FFs out there. >>>>>> >>>>> >>>>> The FF switches two other sub-circuits alternately on and off. >>>>> The external switch triggers the FF. The debouncing is done in >>>>> the FF itself (although that may not be needed with the series >>>>> resistor and cap at the input). Is that clearer? >>>> >>>> Not really.&nbsp; Does the switch both set and reset the FF?&nbsp; If so you >>>> must be using it on the clk input which means the input does need to >>>> be debounced, but the FF can't do that. >>>> >>>> What pin of the FF is the switch connected to?&nbsp; What is on the other >>>> two or three inputs? >>>> >>>> BTW, if you are using an RC to drive the clock input, you can get >>>> multiple triggers from any noise in the circuit as the RC will be >>>> rising very slowly. >>>> >>>> If you are using the clock input with the switch, I suggest you >>>> debounce it with the RC and a Schmitt trigger buffer.&nbsp; There are >>>> some inexpensive reset devices that will do the debouncing for you >>>> without an RC.&nbsp; They will accept an input and apply a delay after >>>> release.&nbsp; They are designed as reset devices for MCUs.&nbsp; Essentially >>>> they act as retriggerable one shots.&nbsp; Or you could use a 555 timer >>>> if you like lots of passives.&nbsp; I think they use five minimum. >>>> >>> >>> Debouncing is not an issue. And the 4013 FF *can* debounce itself >>> with a single R-C combination. The technique is well known and >>> I've used it a number of times. >> >> Care to share how the circuit works?&nbsp; I'm not familiar with any >> non-Schmitt trigger clock input being able to "debounce" itself. >> That's why I asked what your circuit is.&nbsp; I think it is pretty obvious >> at this point I'm not on the same page as you. >> > > Okay, here it is - somewhat simplified and slightly different from my > actual circuit, but not in any way that changes the operating principles: > https://www.dropbox.com/s/juomu98oyz1vxec/Debounced%20flip-flop.png?dl=0 > > C2 & R3 do the debouncing, C1 & R2 set the initial state of the flip-flop. >
The CD4013 specifications require that the maximum rise time of the clock signal is 10us at VDD=10V and 5us at VDD=15V so I would assume that you need to meet 5us to be safe, for VDD=12V. Depending on what series resistor you add, shunt capacitance etc. you may struggle to meet that, and it is worth checking. Also it may get worse over time if the switch contacts oxidise. If cost is not critical then you could add a Schmitt trigger buffer before the clock input.
Ricky C wrote:
> On Sunday, May 17, 2020 at 12:12:18 AM UTC-4, Tom Del Rosso wrote: >> Ricky C wrote: >>> On Saturday, May 16, 2020 at 8:02:45 AM UTC-4, Jasen Betts wrote: >>>> On 2020-05-15, Pimpom <nobody@nowhere.com> wrote: >>>> >>>>> Okay, here it is - somewhat simplified and slightly different >>>>> from my actual circuit, but not in any way that changes the >>>>> operating principles: >>>>> https://www.dropbox.com/s/juomu98oyz1vxec/Debounced%20flip-flop.png?dl=0 >>>>> >>>>> C2 & R3 do the debouncing, C1 & R2 set the initial state of the >>>>> flip-flop. >>>> >>>> Ah, it's similar to the feeback debounce used with dual-inverter >>>> bistables. eg: https://i.stack.imgur.com/yDeFm.png >>>> >>>> But your circuit allows the switch be be connected to a >>>> power node at one end, which is a nice feature, also not >>>> free-running if the switch is held. >>> >>> Not free running, but if the switch is held long enough the opening >>> of the switch can also bounce and toggle the circuit back to the >>> original state. Make the time constant very long to deal with this >>> issue and that sets a limit to the time before the FF state can be >>> changed again. >>> >>> The inherent limitation of this circuit is that the RC timer and FF >>> are being used to debounce the control, the FF is also being used to >>> remember a state controlled by the debounced button. The circuit >>> really needs two FFs, one to debounce and one to remember the state. >>> Then the timeout can be as short as the max bounce period and no >>> need to worry about how long a user holds the button. >>> >>> Rather than two FFs, a simple approach might be to use the RC on the >>> switch input and a FF with a Schmitt trigger clock input. The RC >>> will provide a slowly changing input which the Schmitt trigger input >>> will accept without bouncing. Tie the Qn to the D and you get >>> transitions on every button press. The only issue is the RC delay >>> is added to detection of the input change. For real world push >>> buttons that's not normally an issue. For machine controlled >>> switches it may be a problem. >> >> You mean like this, to prevent toggling again on release? >> >> >> ^ >> | >> | >> R 1M >> | | >> | _|_ |-----| >> +---X X---+---------|> Q|------- >> | | | _| >> | | |---|D Q|---| >> | | | |-----| | >> | | | | >> === 1uF R 1K +------R------| >> | | | 100K >> | | === 1uF >> | | | >> |---------+-----+ >> | >> ----- >> --- >> - > > I don't think that is quite right. This way there is no debouncing > of the voltage from the cap. The cap has to be on the clock input > and then the resistors need to be swapped. 1 second RC might be a > bit long. 1K from the switch to ground with the switch feeding the > clock input with 100K and 1.0uF to power. This requires a negative > edge clock. Or run the switch to power and let the cap and discharge > resistor go to ground. > > The switch can be the only thing on the end of the cable and the > switch resistor can be in the unit as the series limiting resistor. > > > ^ > | > X | > |=== > X | > | |-----| > +--R1K--+----x---------|> Q|----- > | | | _| > | | |---|D Q|---| > | | | |-----| | > | |1uF | | > R100K === +-------------| > | | > | | > | | > +----+ > | > ----- > --- > - > > The time constant on the Qn feedback to the D is not needed at all > then. The RC does the debouncing (as long as the clock input is a > Schmitt trigger) and the FF just needs to toggle. > > Am I missing something?
That has a slow rise and a slower fall. The circuit I posted (which was one of a compendium of past SED toggle circuits that Win posted) has the problem of a slow fall-time if the button is held. I haven't seen any debounced toggle circuit that can drive the clock input within its spec, and also has adequate protection for an outside connection. They are mutually exclusive. If it was me, I'd use a bipolar in addition to a resistor, cap, and zener diode for protection. A pair of biploars can provide the non-inverting logic that Pimpom needs, and a pair of bipolars can also have a little positive feedback to make it a Schmitt, and provide a very fast rise and fall to the FF. (values are just from mental calculation, so needs review) ^ ^ | | | | 1k 1k | | ^ | | | |----------------x | | | | | o | | x--------FF clock -| | | | | o | | | | 4.7k | c | | x-------b 1k | | e | | | | | | c | x----x----x---x----b | | | | e | | | | | | | | | | | 1k =10 ZD 1k | | |uf | | | | | | | | | | | | | V V V V V But then I remembered the toggle made with only a Schmitt (I just added the 10k at the button, and split the lower 200k and added a cap for reset), ^ | | 200k | | Schmitt | o----10k----x---x-----|>o---x------- --| | | | o----x---------------1M-----| | | | | ^ | 180k | | .01 | | === x-------||-------| | | .01 | 20k | | +----------| | | v and that means a discreet Schmitt can be a toggle by itself with no 4013. I was about to modify the discreet circuit for that, but remembered there were already a few discreet toggles in Win's post. It's probably best of all for ruggedness at the input and it can drive a load if the FET is big. 2002, Win Hill, 20A zero-power transistor + MOSFET switch (Zero power when off, low when on.) improvements by Jonathan Kirwan, SPICE by Terry Pinnell
> ,------+--------------+----------+-----(o)---+---- power > | C1 | R3 6.8k | | | 7 - 18V > +| 1uF '--/\/\--, | | __|__ > === 25V | |/V Q1 __|__ | | > | R2 +---| 2n4403 / \ D1 | | > | _|_ 330 | |\ /___\ | LOAD > +---o o---/\/\--+ | | | | > | toggle | | R4 22k | |_____| > | '---- | --/\/\---+ | > | R1 470k | +-----(o) --' to 15A > '-----/\/\------------+ | > | |---' > | ||<--, Q2 > +-----||---+ IRF540 etc > | | > | R5 6.8k | > '---\/\/---+-----(o)------ return > > Certainly the part values are not optimum. For example, currents > could be scaled down 10x, increasing all R's by 10 and C1 = 0.1uF > ceramic. Q2 can be almost any n-channel MOSFET, small to large.
Jasen Betts wrote:
> On 2020-05-15, Pimpom <nobody@nowhere.com> wrote: > >> Okay, here it is - somewhat simplified and slightly different >> from my actual circuit, but not in any way that changes the >> operating principles: >> https://www.dropbox.com/s/juomu98oyz1vxec/Debounced%20flip-flop.png?dl=0 >> >> C2 & R3 do the debouncing, C1 & R2 set the initial state of the >> flip-flop. > > Ah, it's similar to the feeback debounce used with dual-inverter > bistables. eg: https://i.stack.imgur.com/yDeFm.png > > But your circuit allows the switch be be connected to a > power node at one end, which is a nice feature, also not > free-running if the switch is held.
It looks like you could make it oscillate when the button is held, or not, by changing the resistor ratio.