Forums

Sharing idea, eliminating IO leakage currents

Started by Klaus Kragelund January 30, 2020
Hi

This may have been done before, but for me it was a solution to a week long problem with a circuit

Say you have a voltage you need to measure with an ADC, let say 10V

We need a voltage divider to bring it down to ADC range. That divider is normally of high resistance to not load the signal to much

The problem is the leakage current of the ADC and the sample/hold capacitor of the ADC

So what I did was just to place a RC filter on the signal, with a large capacitor (1k/1uF). Then add a resistive divider with low ohms (3k/1k), so the leakage current and sample cap has little effect. The resistive divider is connected to the 1uF cap.

So the RC is charged to 9 tau in 9ms, the divider is switched in with a PFET, and the ADC samples fast so that the cap droop is small

Cheers

Klaus
On 30/01/2020 17:23, Klaus Kragelund wrote:
> Hi > > This may have been done before, but for me it was a solution to a week long problem with a circuit > > Say you have a voltage you need to measure with an ADC, let say 10V > > We need a voltage divider to bring it down to ADC range. That divider is normally of high resistance to not load the signal to much > > The problem is the leakage current of the ADC and the sample/hold capacitor of the ADC > > So what I did was just to place a RC filter on the signal, with a large capacitor (1k/1uF). Then add a resistive divider with low ohms (3k/1k), so the leakage current and sample cap has little effect. The resistive divider is connected to the 1uF cap. > > So the RC is charged to 9 tau in 9ms, the divider is switched in with a PFET, and the ADC samples fast so that the cap droop is small > > Cheers > > Klaus >
Thanks for sharing. OK if you have a spare i/o pin to drive the pfet but aren't opamps cheap and plentiful too? piglet
On Thursday, January 30, 2020 at 6:33:26 PM UTC+1, piglet wrote:
> On 30/01/2020 17:23, Klaus Kragelund wrote: > > Hi > > > > This may have been done before, but for me it was a solution to a week long problem with a circuit > > > > Say you have a voltage you need to measure with an ADC, let say 10V > > > > We need a voltage divider to bring it down to ADC range. That divider is normally of high resistance to not load the signal to much > > > > The problem is the leakage current of the ADC and the sample/hold capacitor of the ADC > > > > So what I did was just to place a RC filter on the signal, with a large capacitor (1k/1uF). Then add a resistive divider with low ohms (3k/1k), so the leakage current and sample cap has little effect. The resistive divider is connected to the 1uF cap. > > > > So the RC is charged to 9 tau in 9ms, the divider is switched in with a PFET, and the ADC samples fast so that the cap droop is small > > > > Cheers > > > > Klaus > > > > Thanks for sharing. OK if you have a spare i/o pin to drive the pfet but > aren't opamps cheap and plentiful too? >
An opamp with low offset is expensive (in my optics since this is for high volume) Then you can buy a cheap one and do offset calibration. You would add a FET or BJT on the input of the opamp to do 0V and 5V calibration. But, can you find a 1 cent transistor that has low leakage at high temperature? Cheers Klaus
On 30/01/2020 17:37, Klaus Kragelund wrote:
> On Thursday, January 30, 2020 at 6:33:26 PM UTC+1, piglet wrote: >> On 30/01/2020 17:23, Klaus Kragelund wrote: >>> Hi >>> >>> This may have been done before, but for me it was a solution to a week long problem with a circuit >>> >>> Say you have a voltage you need to measure with an ADC, let say 10V >>> >>> We need a voltage divider to bring it down to ADC range. That divider is normally of high resistance to not load the signal to much >>> >>> The problem is the leakage current of the ADC and the sample/hold capacitor of the ADC >>> >>> So what I did was just to place a RC filter on the signal, with a large capacitor (1k/1uF). Then add a resistive divider with low ohms (3k/1k), so the leakage current and sample cap has little effect. The resistive divider is connected to the 1uF cap. >>> >>> So the RC is charged to 9 tau in 9ms, the divider is switched in with a PFET, and the ADC samples fast so that the cap droop is small >>> >>> Cheers >>> >>> Klaus >>> >> >> Thanks for sharing. OK if you have a spare i/o pin to drive the pfet but >> aren't opamps cheap and plentiful too? >> > An opamp with low offset is expensive (in my optics since this is for high volume) > > Then you can buy a cheap one and do offset calibration. You would add a FET or BJT on the input of the opamp to do 0V and 5V calibration. But, can you find a 1 cent transistor that has low leakage at high temperature? > > Cheers > > Klaus >
Your scheme will behave poorly when the input voltage is below a few volts and the pfet cannot switch on properly? piglet
Piglet, you are spot on


IRL I would use a tinylogic 4066
On Thu, 30 Jan 2020 09:23:09 -0800 (PST), Klaus Kragelund
<klauskvik@hotmail.com> wrote:

>Hi > >This may have been done before, but for me it was a solution to a week long problem with a circuit > >Say you have a voltage you need to measure with an ADC, let say 10V > >We need a voltage divider to bring it down to ADC range. That divider is normally of high resistance to not load the signal to much > >The problem is the leakage current of the ADC and the sample/hold capacitor of the ADC > >So what I did was just to place a RC filter on the signal, with a large capacitor (1k/1uF). Then add a resistive divider with low ohms (3k/1k), so the leakage current and sample cap has little effect. The resistive divider is connected to the 1uF cap. > >So the RC is charged to 9 tau in 9ms, the divider is switched in with a PFET, and the ADC samples fast so that the cap droop is small > >Cheers > >Klaus
Many ADCs shoot out some charge when they sample, so need to see an external capacitor to be accurate. In your case, the ADC input sees 750 ohms, which may be OK. 1K and 4K form a 0.8 divider, which drags down the voltage on the 1U cap, but that's small if the pfet is on briefly, but that can be calibrated out too. Opamp? -- John Larkin Highland Technology, Inc picosecond timing precision measurement jlarkin att highlandtechnology dott com http://www.highlandtechnology.com
On Thursday, January 30, 2020 at 11:11:11 PM UTC+1, John Larkin wrote:
> On Thu, 30 Jan 2020 09:23:09 -0800 (PST), Klaus Kragelund > <klauskvik@hotmail.com> wrote: > > >Hi > > > >This may have been done before, but for me it was a solution to a week long problem with a circuit > > > >Say you have a voltage you need to measure with an ADC, let say 10V > > > >We need a voltage divider to bring it down to ADC range. That divider is normally of high resistance to not load the signal to much > > > >The problem is the leakage current of the ADC and the sample/hold capacitor of the ADC > > > >So what I did was just to place a RC filter on the signal, with a large capacitor (1k/1uF). Then add a resistive divider with low ohms (3k/1k), so the leakage current and sample cap has little effect. The resistive divider is connected to the 1uF cap. > > > >So the RC is charged to 9 tau in 9ms, the divider is switched in with a PFET, and the ADC samples fast so that the cap droop is small > > > >Cheers > > > >Klaus > > Many ADCs shoot out some charge when they sample, so need to see an > external capacitor to be accurate. In your case, the ADC input sees > 750 ohms, which may be OK. >
For microcontrollers, typical S/H cap is less than 8pF, so 1k charges that in 8ns times 9 time constants. Charge dump back into the divider is only a problem if the sample frequency is high. In my case it is very low, primary concern is accuracy
> 1K and 4K form a 0.8 divider, which drags down the voltage on the 1U > cap, but that's small if the pfet is on briefly, but that can be > calibrated out too. >
The ADC samples in less than 1us, so the droop is only 2mV on 10V, no problem
> Opamp? >
Yes. But nothing with less than 1mV offset and sub uA at 100 degrees shows up less than 10cents Cheers Klaus