Forums

A bit of help with a crystal oscillator

Started by Peter November 6, 2019
I have read a lot of stuff on this topic but find it hard to apply it.

I have a 25MHz xtal. For example Kyocera CX3225GB25000P0HPQZ1. The
spec says typ drive level 10uW, 100uW max.

The oscillator circuit is the usual Pierce one as in e.g. here

https://electronics.stackexchange.com/questions/368945/crystal-oscillator-circuit-design?rq=1

The CPU is a STM32F407VGT6.

The development kit for this CPU has the two caps for the xtal load
cap and the resistor is 220R. The xtal they use is an anonymous one,
however; old style metal can (HC49?).

The ST appnotes point one to a load of xtals which either don't exist
or are way too expensive for production :)

The internal feedback resistor is given as 200k which is fairly
normal.

Another appnote suggests measuring the xtal current, with a current
probe. I could construct a current probe with a little ferrite core (I
used to make these up for switching power supplies; a lot cheaper than
the Tek current probes) but these components are so tiny (0603-0805)
that the required loop would really mess things up.

The circuit runs fine, but I need to have some confidence in the
margins over temperature and component tolerances.

The load caps are 7pF, which should be about right for the 10pF load
cap of the xtal I am using, allowing for a bit of PCB capacitance (say
5pF). The above Kyocera P/N says 8pF.

OTOH I have read one appnote which says the CL calculation is
different: the cap value is to be the sum of the CPU pin stray cap and
the xtal load cap; this means the CL should be 15pF!

Probing the two ends of the xtal with a Wavesurfer 3034 with a ZS1000
probe (9pF/1Mohm) I see about 0.5V p-p one end and 0.3V p-p on the
other end.

Does this seem reasonable?

Many thanks for any comments.
"Peter" <nospam@nospam9876.com> wrote in message 
news:qpudmu$47b$1@dont-email.me...
> The CPU is a STM32F407VGT6. > > The development kit for this CPU has the two caps for the xtal load > cap and the resistor is 220R. The xtal they use is an anonymous one, > however; old style metal can (HC49?). > > The ST appnotes point one to a load of xtals which either don't exist > or are way too expensive for production :)
Mind that ST's oscillators have relatively low transconductance, so you need a relatively high ESR crystal to go with it. Which goes hand-in-hand with low CL. 60R seems low, but 8pF should be reasonable, and the difference is probably just the frequency being higher than other cases (e.g. a 4 or 12MHz crystal is pretty common).
> OTOH I have read one appnote which says the CL calculation is > different: the cap value is to be the sum of the CPU pin stray cap and > the xtal load cap; this means the CL should be 15pF!
Yes, CL is the total as seen by the crystal. So, the two loading caps in parallel with the respective pin caps, and then the series equivalent of both together.
> Probing the two ends of the xtal with a Wavesurfer 3034 with a ZS1000 > probe (9pF/1Mohm) I see about 0.5V p-p one end and 0.3V p-p on the > other end.
That sounds fine, but as you note, it's one case, not indicative of manufacturing, temp or age spread. Tim -- Seven Transistor Labs, LLC Electrical Engineering Consultation and Design Website: https://www.seventransistorlabs.com/
On Wed, 06 Nov 2019 12:18:37 +0000, Peter <nospam@nospam9876.com>
wrote:

>I have read a lot of stuff on this topic but find it hard to apply it. > >I have a 25MHz xtal. For example Kyocera CX3225GB25000P0HPQZ1. The >spec says typ drive level 10uW, 100uW max. > >The oscillator circuit is the usual Pierce one as in e.g. here > >https://electronics.stackexchange.com/questions/368945/crystal-oscillator-circuit-design?rq=1 > >The CPU is a STM32F407VGT6. > >The development kit for this CPU has the two caps for the xtal load >cap and the resistor is 220R. The xtal they use is an anonymous one, >however; old style metal can (HC49?). > >The ST appnotes point one to a load of xtals which either don't exist >or are way too expensive for production :) > >The internal feedback resistor is given as 200k which is fairly >normal. > >Another appnote suggests measuring the xtal current, with a current >probe. I could construct a current probe with a little ferrite core (I >used to make these up for switching power supplies; a lot cheaper than >the Tek current probes) but these components are so tiny (0603-0805) >that the required loop would really mess things up. > >The circuit runs fine, but I need to have some confidence in the >margins over temperature and component tolerances. > >The load caps are 7pF, which should be about right for the 10pF load >cap of the xtal I am using, allowing for a bit of PCB capacitance (say >5pF). The above Kyocera P/N says 8pF. > >OTOH I have read one appnote which says the CL calculation is >different: the cap value is to be the sum of the CPU pin stray cap and >the xtal load cap; this means the CL should be 15pF! > >Probing the two ends of the xtal with a Wavesurfer 3034 with a ZS1000 >probe (9pF/1Mohm) I see about 0.5V p-p one end and 0.3V p-p on the >other end.
9 pF is pretty intrusive.
> >Does this seem reasonable? > >Many thanks for any comments.
Connecting a crystal and a couple of caps to an IC is a notoriously flakey way to make a clock. Some impressive fraction of the time it doesn't oscillate, and if it does the frequency could be anywhere. We use the free internal clock on the ST processors; it's good enough for most uses. If you need a better clock, buy an XO. It will probably be trimmed to a few PPM, and it will always oscillate, and will probably be cheaper. -- John Larkin Highland Technology, Inc lunatic fringe electronics
 "Tim Williams" <tiwill@seventransistorlabs.com> wrote:

>"Peter" <nospam@nospam9876.com> wrote in message >news:qpudmu$47b$1@dont-email.me... >> The CPU is a STM32F407VGT6. >> >> The development kit for this CPU has the two caps for the xtal load >> cap and the resistor is 220R. The xtal they use is an anonymous one, >> however; old style metal can (HC49?). >> >> The ST appnotes point one to a load of xtals which either don't exist >> or are way too expensive for production :) > >Mind that ST's oscillators have relatively low transconductance, so you need >a relatively high ESR crystal to go with it. Which goes hand-in-hand with >low CL. 60R seems low, but 8pF should be reasonable, and the difference is >probably just the frequency being higher than other cases (e.g. a 4 or 12MHz >crystal is pretty common).
Many thanks. I have two xtals A cheap one from China (from AEL) CL=10pF ESR=60R Pmax=100uW C0=3pF The branded Kyocera one CL=8pF ESR=60R Pmax=100uW C0=? I think the chip pin and PCB capacitance is about 5pF, so what should the two caps be? If the load caps are 10pF, then both are really 15pF. Two 15pF in series = 7.5pF so an 8pF xtal is right. So for my "10pF" chinese one I should be used two 15pF caps. Is this right? It seems weird. Presumably getting this wrong doesn't change the starting conditions for the oscillator; it just makes the frequency slightly off, a few ppm?
>> OTOH I have read one appnote which says the CL calculation is >> different: the cap value is to be the sum of the CPU pin stray cap and >> the xtal load cap; this means the CL should be 15pF! > >Yes, CL is the total as seen by the crystal. So, the two loading caps in >parallel with the respective pin caps, and then the series equivalent of >both together. > > >> Probing the two ends of the xtal with a Wavesurfer 3034 with a ZS1000 >> probe (9pF/1Mohm) I see about 0.5V p-p one end and 0.3V p-p on the >> other end. > >That sounds fine, but as you note, it's one case, not indicative of >manufacturing, temp or age spread.
The series resistor is more tricky. Normally with oscillators around chips I have seen a swing on the driving pin of almost GND to VCC, and perhaps 1/3 of that on the other side of the xtal. Most people never bother with this resistor. But I have seen some weird things on 32768Hz oscillators. Years ago I had a design which would mysteriously gain maybe a minute per week. I never worked out why. The RTC was a DS11302 - perhaps the lowest power RTC ever. I reckoned that some RF was getting in.
 jlarkin@highlandsniptechnology.com wrote:

>We use the free internal clock on the ST processors; it's good enough >for most uses.
It isn't good enough for some apps e.g. ethernet frequency reference. Not sure about USB.
>If you need a better clock, buy an XO. It will probably be trimmed to >a few PPM, and it will always oscillate, and will probably be cheaper.
Good point... but you can't beat an xtal for 6p (1k+) :)
On Wednesday, November 6, 2019 at 11:02:32 AM UTC-5, 
> Connecting a crystal and a couple of caps to an IC is a notoriously > flakey way to make a clock. Some impressive fraction of the time it > doesn't oscillate, and if it does the frequency could be anywhere.
I always understood that the issue was "guaranteed oscillator startup". The capacitors were there to make sure that happened. And related to that is the issue of die shrink, where (over time) improvements in manufacturing processes result in smaller and smaller silicon dies (even though the IC package size doesn't change). The end result is longer internal lead wires which can change the amount of needed crystal loading. And THAT is why a lot of folks think that crystals are flaky - they are not accounting for die shrink (and honestly, how would they ever even know?)
 jlarkin@highlandsniptechnology.com wrote:

>9 pF is pretty intrusive.
Sorry. The ZS1000 is 0.9pF :)
On Wed, 6 Nov 2019 08:17:52 -0800 (PST), mpm <mpmillard@aol.com>
wrote:

>On Wednesday, November 6, 2019 at 11:02:32 AM UTC-5, >> Connecting a crystal and a couple of caps to an IC is a notoriously >> flakey way to make a clock. Some impressive fraction of the time it >> doesn't oscillate, and if it does the frequency could be anywhere. > >I always understood that the issue was "guaranteed oscillator startup". The capacitors were there to make sure that happened. > >And related to that is the issue of die shrink, where (over time) improvements in manufacturing processes result in smaller and smaller silicon dies (even though the IC package size doesn't change). The end result is longer internal lead wires which can change the amount of needed crystal loading. And THAT is why a lot of folks think that crystals are flaky - they are not accounting for die shrink (and honestly, how would they ever even know?)
Some circuits are also sensitive to crystal parameters. You can be happy for years and then have half your circuits not oscillate. -- John Larkin Highland Technology, Inc lunatic fringe electronics
jlarkin@highlandsniptechnology.com wrote

>Some circuits are also sensitive to crystal parameters. You can be >happy for years and then have half your circuits not oscillate. >
Is that really common? I've never seen it, in 40+ years of micro development and production. However, it is very likely that I have been overdriving xtals by a big margin :) Do they really fail when overdriven? How much is 1mW of power (10x overdrive) in terms of heating?
On Wed, 06 Nov 2019 16:14:47 +0000, Peter <nospam@nospam9876.com>
wrote:

> > jlarkin@highlandsniptechnology.com wrote: > >>We use the free internal clock on the ST processors; it's good enough >>for most uses. > >It isn't good enough for some apps e.g. ethernet frequency reference. >Not sure about USB.
Our latest topology is ST has a boot loaded in its flash, programmed by jtag ST has an external pluging flash chip, on an SPI port The external flash has cal table, factory and upgrade code images, factory and upgrade FPGA configs At powerup, the boot loader copies the correct code image into uP flash, and runs that. Usually only once. The code runs, and it reads and loads the FPGA config. An XO clocks the FPGA, and it generates other clocks. FPGAs are good at that. Field upgrades can be done various ways, including sending the customer a new flash chip to plug in.
> >>If you need a better clock, buy an XO. It will probably be trimmed to >>a few PPM, and it will always oscillate, and will probably be cheaper. > >Good point... but you can't beat an xtal for 6p (1k+) :)
OK as long as you won't have to spend a few weeks fixing it and requalifying crystals. -- John Larkin Highland Technology, Inc lunatic fringe electronics