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DAC buffer with negative VOUT in shutdown state

Started by Piotr Wyderski June 2, 2019
Hi,

TL;DR: a precision linear MOSFET pre-driver capable of putting negative
voltage on the gate in order to shut the current flow down. Quickly and 
hard to eliminate spurious noise-induced turn-ons.

Detailed:

I have a precision unbuffered 16-bit DAC that outputs 0--4.095V. The 
analog subsystem uses +12/-5V supplies in order to place the opamps 
(OPA4192)
well within the linear region. Now I would like to buffer the VDAC 
voltage, but also augment the buffer with the ability to output some 
negative VNEG voltage in shutdown state. The closer VNEG is to the VEE 
rail the better, but the exact value is unimportant. I can see 3 
possible scenarios based on a DG419 SPDT switch:

1. Create a follower and add the mux to the input, switching between 
VDAC and VEE. But this can add noise/nonlinearities to the precision path.

2. As above, but put the mux at the follower's output. This would add me 
~30 Ohms to the output impedance.

3. Connect the DAC directly to the +input of the opamp and put the 
switch between
the output and the -input and VCC. In one position the mux would make 
the opamp act as a follower, in the other the inverting input's voltage 
would
be much higher than the non-inverting one, so the open loop gain would 
make the output saturate somewhere close to VEE.

Other requirements and don't cares:

- the switching frequency between the DAC voltage (VDAC) and the 
negative output voltage (VNEG) is negligible (<10Hz).

- the transition time between VDAC ad VNEG should be as fast as possible.

- the transition time between VNEG and VDAC is not important, but
the VOUT should have no significant overshoot above VDAC.

In other words, the slow path must be precise and the negative
VOUT path must be fast.

I'm tempted to use the solution number 3, but I'm afraid of the 
open-loop connection. Or should I do it in a completely different way?

     Best regards, Piotr
On 02/06/2019 15:21, Piotr Wyderski wrote:
> > Hi, > > TL;DR: a precision linear MOSFET pre-driver capable of putting negative > voltage on the gate in order to shut the current flow down. Quickly and > hard to eliminate spurious noise-induced turn-ons. > > Detailed: > > I have a precision unbuffered 16-bit DAC that outputs 0--4.095V. The > analog subsystem uses +12/-5V supplies in order to place the opamps > (OPA4192) > well within the linear region. Now I would like to buffer the VDAC > voltage, but also augment the buffer with the ability to output some > negative VNEG voltage in shutdown state. The closer VNEG is to the VEE > rail the better, but the exact value is unimportant. I can see 3 > possible scenarios based on a DG419 SPDT switch: > > 1. Create a follower and add the mux to the input, switching between > VDAC and VEE. But this can add noise/nonlinearities to the precision path. > > 2. As above, but put the mux at the follower's output. This would add me > ~30 Ohms to the output impedance. > > 3. Connect the DAC directly to the +input of the opamp and put the > switch between > the output and the -input and VCC. In one position the mux would make > the opamp act as a follower, in the other the inverting input's voltage > would > be much higher than the non-inverting one, so the open loop gain would > make the output saturate somewhere close to VEE. > > Other requirements and don't cares: > > - the switching frequency between the DAC voltage (VDAC) and the > negative output voltage (VNEG) is negligible (<10Hz). > > - the transition time between VDAC ad VNEG should be as fast as possible. > > - the transition time between VNEG and VDAC is not important, but > the VOUT should have no significant overshoot above VDAC. > > In other words, the slow path must be precise and the negative > VOUT path must be fast. > > I'm tempted to use the solution number 3, but I'm afraid of the > open-loop connection. Or should I do it in a completely different way? > > Best regards, Piotr
Why not simply have resistor between DAC and follower and transistor switch between follower input and -vee. Size resistor low enough for speed and high enough to keep current load on DAC output below Abs-max when switch is on? piglet
Piglet wrote:

 > Why not simply have resistor between DAC and follower and transistor
 > switch between follower input and -vee. Size resistor low enough for
 > speed and high enough to keep current load on DAC output below Abs-max
 > when switch is on?

I didn't want to distort the precision path by introducing a voltage 
divider (the resistor + the transistor's leakage current). The risk
of DAC destruction/latchup caused by pulling its output below GND is 
perhaps also non-negligible.

	Best regards, Piotr
Piotr Wyderski wrote...
> > Piglet wrote: > >> Why not simply have resistor between DAC and follower and transistor >> switch between follower input and -vee. Size resistor low enough for >> speed and high enough to keep current load on DAC output below Abs-max >> when switch is on? > > I didn't want to distort the precision path by introducing a voltage > divider (the resistor + the transistor's leakage current). The risk > of DAC destruction/latchup caused by pulling its output below GND is > perhaps also non-negligible.
Why not put the spdt switch between the 5V DAC and the op-amp input? CMOS switches work properly up to a diode drop (usually spec'd 0.3 volts) beyond their supply rails, would -0.3 volts be enough? Also, some low-voltage switches have Vee pins, and can switch up to +/-5 volts. -- Thanks, - Win
Winfield Hill wrote:

> Why not put the spdt switch between the 5V DAC and > the op-amp input?
This is the proposal #1 on my list. Best regards, Piotr
Piotr Wyderski wrote...
> >Winfield Hill wrote: > >> Why not put the spdt switch between the 5V DAC and >> the op-amp input? > > This is the proposal #1 on my list.
Good, that would be my vote. -- Thanks, - Win
On Sun, 2 Jun 2019 16:21:31 +0200, Piotr Wyderski
<peter.pan@neverland.mil> wrote:

> >Hi, > >TL;DR: a precision linear MOSFET pre-driver capable of putting negative >voltage on the gate in order to shut the current flow down. Quickly and >hard to eliminate spurious noise-induced turn-ons. > >Detailed: > >I have a precision unbuffered 16-bit DAC that outputs 0--4.095V. The >analog subsystem uses +12/-5V supplies in order to place the opamps >(OPA4192) >well within the linear region. Now I would like to buffer the VDAC >voltage, but also augment the buffer with the ability to output some >negative VNEG voltage in shutdown state. The closer VNEG is to the VEE >rail the better, but the exact value is unimportant. I can see 3 >possible scenarios based on a DG419 SPDT switch: > >1. Create a follower and add the mux to the input, switching between >VDAC and VEE. But this can add noise/nonlinearities to the precision path. > >2. As above, but put the mux at the follower's output. This would add me >~30 Ohms to the output impedance. > >3. Connect the DAC directly to the +input of the opamp and put the >switch between >the output and the -input and VCC. In one position the mux would make >the opamp act as a follower, in the other the inverting input's voltage >would >be much higher than the non-inverting one, so the open loop gain would >make the output saturate somewhere close to VEE. > >Other requirements and don't cares: > >- the switching frequency between the DAC voltage (VDAC) and the >negative output voltage (VNEG) is negligible (<10Hz). > >- the transition time between VDAC ad VNEG should be as fast as possible. > >- the transition time between VNEG and VDAC is not important, but >the VOUT should have no significant overshoot above VDAC. > >In other words, the slow path must be precise and the negative >VOUT path must be fast. > >I'm tempted to use the solution number 3, but I'm afraid of the >open-loop connection. Or should I do it in a completely different way? > > Best regards, Piotr
Mux before the follower? -- John Larkin Highland Technology, Inc lunatic fringe electronics
John Larkin wrote:

> Mux before the follower?
Option 1, the most obvious solution. But will it be good for a precision application? Best regards, Piotr
On Mon, 3 Jun 2019 00:51:17 +0200, Piotr Wyderski
<peter.pan@neverland.mil> wrote:

>John Larkin wrote: > >> Mux before the follower? > >Option 1, the most obvious solution. But will it be good for a precision >application? > > Best regards, Piotr >
Aside from adding a little capacitance, a cmos analog mux will add way-sub-microvolt offset and picoamps of leakage. -- John Larkin Highland Technology, Inc lunatic fringe electronics
On Sun, 2 Jun 2019 16:21:31 +0200, Piotr Wyderski
<peter.pan@neverland.mil> wrote:

> >Hi, > >TL;DR: a precision linear MOSFET pre-driver capable of putting negative >voltage on the gate in order to shut the current flow down. Quickly and >hard to eliminate spurious noise-induced turn-ons. > >Detailed: > >I have a precision unbuffered 16-bit DAC that outputs 0--4.095V. The >analog subsystem uses +12/-5V supplies in order to place the opamps >(OPA4192) >well within the linear region. Now I would like to buffer the VDAC >voltage, but also augment the buffer with the ability to output some >negative VNEG voltage in shutdown state. The closer VNEG is to the VEE >rail the better, but the exact value is unimportant. I can see 3 >possible scenarios based on a DG419 SPDT switch: > >1. Create a follower and add the mux to the input, switching between >VDAC and VEE. But this can add noise/nonlinearities to the precision path. > >2. As above, but put the mux at the follower's output. This would add me >~30 Ohms to the output impedance. > >3. Connect the DAC directly to the +input of the opamp and put the >switch between >the output and the -input and VCC. In one position the mux would make >the opamp act as a follower, in the other the inverting input's voltage >would >be much higher than the non-inverting one, so the open loop gain would >make the output saturate somewhere close to VEE. > >Other requirements and don't cares: > >- the switching frequency between the DAC voltage (VDAC) and the >negative output voltage (VNEG) is negligible (<10Hz). > >- the transition time between VDAC ad VNEG should be as fast as possible. > >- the transition time between VNEG and VDAC is not important, but >the VOUT should have no significant overshoot above VDAC. > >In other words, the slow path must be precise and the negative >VOUT path must be fast. > >I'm tempted to use the solution number 3, but I'm afraid of the >open-loop connection. Or should I do it in a completely different way?
How about an opamp with an output enable or shutdown? Add a resistor from its output to VEE.