Forums

dac architecture

Started by John Larkin January 5, 2019
We were talking about TCXOs. One measures temperature and drives a
varicap through some nonlinear transfer function to get minumum net
TC.

We don't want a digital design (ADC, lookup table or polynomial, DAC)
because that might add phase noise. I guess you could use a static
polynomial with the equivalent of nonvolatile DPOTS as the
coefficients.


This occurred to me, not as anything practical maybe but as an
interesting architecture.

https://www.dropbox.com/s/8ls632mndcxqby8/DAC_TCXO.JPG?raw=1

It's sort of a thermometer-code ADC, but each comparator incrementally
adds + or - one increment to the output. 

As the temperature increases, we jog the output up or down one
increment at a time.

The sequence of switch settings become a delta-sigma code to make the
output.

The comparators could be sort of linear, not step outputs, to kind of
interpolate a bit. Some flash ADCs did something like that, soft
comparators.



-- 

John Larkin         Highland Technology, Inc

lunatic fringe electronics 

 John Larkin wrote
>We were talking about TCXOs. One measures temperature and drives a >varicap through some nonlinear transfer function to get minumum net >TC. > >We don't want a digital design (ADC, lookup table or polynomial, DAC) >because that might add phase noise. I guess you could use a static >polynomial with the equivalent of nonvolatile DPOTS as the >coefficients. > > >This occurred to me, not as anything practical maybe but as an >interesting architecture. > >https://www.dropbox.com/s/8ls632mndcxqby8/DAC_TCXO.JPG?raw=1 > >It's sort of a thermometer-code ADC, but each comparator incrementally >adds + or - one increment to the output. > >As the temperature increases, we jog the output up or down one >increment at a time. > >The sequence of switch settings become a delta-sigma code to make the >output. > >The comparators could be sort of linear, not step outputs, to kind of >interpolate a bit. Some flash ADCs did something like that, soft >comparators.
Yes, but you can get more linear varicap effect by using for example 2. This paper shows some topologies and their effect: https://www.everythingrf.com/uploads/whitepapers/IEEE_BCTM_092010_2.pdf Then use a linear opamp feedback loop? I am using something like fig 1b on page 3 for my 25 MHz PLL reference for Eshail2.
On Sat, 05 Jan 2019 19:12:25 GMT, <698839253X6D445TD@nospam.org>
wrote:

> John Larkin wrote >>We were talking about TCXOs. One measures temperature and drives a >>varicap through some nonlinear transfer function to get minumum net >>TC. >> >>We don't want a digital design (ADC, lookup table or polynomial, DAC) >>because that might add phase noise. I guess you could use a static >>polynomial with the equivalent of nonvolatile DPOTS as the >>coefficients. >> >> >>This occurred to me, not as anything practical maybe but as an >>interesting architecture. >> >>https://www.dropbox.com/s/8ls632mndcxqby8/DAC_TCXO.JPG?raw=1 >> >>It's sort of a thermometer-code ADC, but each comparator incrementally >>adds + or - one increment to the output. >> >>As the temperature increases, we jog the output up or down one >>increment at a time. >> >>The sequence of switch settings become a delta-sigma code to make the >>output. >> >>The comparators could be sort of linear, not step outputs, to kind of >>interpolate a bit. Some flash ADCs did something like that, soft >>comparators. > >Yes, >but you can get more linear varicap effect by using for example 2. >This paper shows some topologies and their effect: > https://www.everythingrf.com/uploads/whitepapers/IEEE_BCTM_092010_2.pdf > >Then use a linear opamp feedback loop? > >I am using something like fig 1b on page 3 for my 25 MHz PLL reference for Eshail2.
A TCXO wouldn't need a very linear varactor, but a tight PLL does. I have a new circuit that starts a 600 MHz coaxial ceramic resonator colpitts oscillator at trigger time, and phase locks it to an OCXO asap, still preserving the phase of the oscillator relative to the trigger. It uses an ADC to digitize the phase difference, an FPGA to do the math, and a DAC+varicap to tweak the CCRO. It also uses a dual varicap per fig 1b in your paper. Driving the varicap junction is interesting. I designed the loop and can barely understand it myself. The TCXO thing I posted is interesting because it's delta-sigma in space instead of the usual delta-sigma in time. -- John Larkin Highland Technology, Inc lunatic fringe electronics
John Larkin wrote
>On Sat, 05 Jan 2019 19:12:25 GMT, <698839253X6D445TD@nospam.org> >wrote: > >> John Larkin wrote >>>We were talking about TCXOs. One measures temperature and drives a >>>varicap through some nonlinear transfer function to get minumum net >>>TC. >>> >>>We don't want a digital design (ADC, lookup table or polynomial, DAC) >>>because that might add phase noise. I guess you could use a static >>>polynomial with the equivalent of nonvolatile DPOTS as the >>>coefficients. >>> >>> >>>This occurred to me, not as anything practical maybe but as an >>>interesting architecture. >>> >>>https://www.dropbox.com/s/8ls632mndcxqby8/DAC_TCXO.JPG?raw=1 >>> >>>It's sort of a thermometer-code ADC, but each comparator incrementally >>>adds + or - one increment to the output. >>> >>>As the temperature increases, we jog the output up or down one >>>increment at a time. >>> >>>The sequence of switch settings become a delta-sigma code to make the >>>output. >>> >>>The comparators could be sort of linear, not step outputs, to kind of >>>interpolate a bit. Some flash ADCs did something like that, soft >>>comparators. >> >>Yes, >>but you can get more linear varicap effect by using for example 2. >>This paper shows some topologies and their effect: >> https://www.everythingrf.com/uploads/whitepapers/IEEE_BCTM_092010_2.pdf >> >>Then use a linear opamp feedback loop? >> >>I am using something like fig 1b on page 3 for my 25 MHz PLL reference for Eshail2. > >A TCXO wouldn't need a very linear varactor, but a tight PLL does. > >I have a new circuit that starts a 600 MHz coaxial ceramic resonator >colpitts oscillator at trigger time, and phase locks it to an OCXO >asap, still preserving the phase of the oscillator relative to the >trigger. It uses an ADC to digitize the phase difference, an FPGA to >do the math, and a DAC+varicap to tweak the CCRO. It also uses a dual >varicap per fig 1b in your paper. Driving the varicap junction is >interesting. I designed the loop and can barely understand it myself. > >The TCXO thing I posted is interesting because it's delta-sigma in >space instead of the usual delta-sigma in time.
What I do not understand in your circuit is you say you are afraid of phase noise, and that is why no DAC. But this circuit also switches frequency abruptly, or is there some low pass? Else a look up table before a DAC could give you any curve? In my tritium delay experiment I use the low pass filtered PWM output from a PIC, like this: diode temp sensor -> 10 bits ADC -> software -> 8bits (IIRC) PWM -> low-pass -> TO220 as heater. and can make any curve in software. All I care about there is some overshoot, experimentally found a good vale, been working for > 4 years now within a fraction of a degree C, or better within +- 1 ADC step :-) There are a million ways I am sure... took half an hour to find the optimum values...
On Sat, 05 Jan 2019 20:15:58 GMT, <698839253X6D445TD@nospam.org>
wrote:

>John Larkin wrote >>On Sat, 05 Jan 2019 19:12:25 GMT, <698839253X6D445TD@nospam.org> >>wrote: >> >>> John Larkin wrote >>>>We were talking about TCXOs. One measures temperature and drives a >>>>varicap through some nonlinear transfer function to get minumum net >>>>TC. >>>> >>>>We don't want a digital design (ADC, lookup table or polynomial, DAC) >>>>because that might add phase noise. I guess you could use a static >>>>polynomial with the equivalent of nonvolatile DPOTS as the >>>>coefficients. >>>> >>>> >>>>This occurred to me, not as anything practical maybe but as an >>>>interesting architecture. >>>> >>>>https://www.dropbox.com/s/8ls632mndcxqby8/DAC_TCXO.JPG?raw=1 >>>> >>>>It's sort of a thermometer-code ADC, but each comparator incrementally >>>>adds + or - one increment to the output. >>>> >>>>As the temperature increases, we jog the output up or down one >>>>increment at a time. >>>> >>>>The sequence of switch settings become a delta-sigma code to make the >>>>output. >>>> >>>>The comparators could be sort of linear, not step outputs, to kind of >>>>interpolate a bit. Some flash ADCs did something like that, soft >>>>comparators. >>> >>>Yes, >>>but you can get more linear varicap effect by using for example 2. >>>This paper shows some topologies and their effect: >>> https://www.everythingrf.com/uploads/whitepapers/IEEE_BCTM_092010_2.pdf >>> >>>Then use a linear opamp feedback loop? >>> >>>I am using something like fig 1b on page 3 for my 25 MHz PLL reference for Eshail2. >> >>A TCXO wouldn't need a very linear varactor, but a tight PLL does. >> >>I have a new circuit that starts a 600 MHz coaxial ceramic resonator >>colpitts oscillator at trigger time, and phase locks it to an OCXO >>asap, still preserving the phase of the oscillator relative to the >>trigger. It uses an ADC to digitize the phase difference, an FPGA to >>do the math, and a DAC+varicap to tweak the CCRO. It also uses a dual >>varicap per fig 1b in your paper. Driving the varicap junction is >>interesting. I designed the loop and can barely understand it myself. >> >>The TCXO thing I posted is interesting because it's delta-sigma in >>space instead of the usual delta-sigma in time. > >What I do not understand in your circuit is you say >you are afraid of phase noise, and that is why no DAC. >But this circuit also switches frequency abruptly, >or is there some low pass?
That circuit is conceptual, certainly not done. Only one comparator switches at a time, and each step would change the frequency PPBs. Sure, lowpass the varicap drive. Even better, make the comparator gains low so the transitions are soft.
> >Else a look up table before a DAC could give you any curve?
A TCXO doesn't need a static-in-static-out lookup box, because termperature changes incrementally. -- John Larkin Highland Technology, Inc lunatic fringe electronics
On Saturday, January 5, 2019 at 1:23:09 PM UTC-8, John Larkin wrote:
> That circuit is conceptual, certainly not done. Only one comparator > switches at a time, and each step would change the frequency PPBs. > Sure, lowpass the varicap drive. Even better, make the comparator > gains low so the transitions are soft. >
Is there a difference between building this circuit and adding an LPF, and using a traditional DAC and adding an LPF? Either way, you aren't going to add significant phase noise beyond the LPF cutoff. A DAC-driven control loop can work well without a whole lot of head- scatching. (Almost) everyone with a GPSDO has one of those. Remember, TCXOs and OCXOs don't have a lot of kVCO gain, so they aren't that vulnerable to noise injection. At least not compared to microwave VCOs that run at 100 MHz/volt, and that are also often pretuned by DACs. -- john, KE5FX
On 1/5/19 2:12 PM, 698839253X6D445TD@nospam.org wrote:
> John Larkin wrote >> We were talking about TCXOs. One measures temperature and drives a >> varicap through some nonlinear transfer function to get minumum net >> TC. >> >> We don't want a digital design (ADC, lookup table or polynomial, DAC) >> because that might add phase noise. I guess you could use a static >> polynomial with the equivalent of nonvolatile DPOTS as the >> coefficients. >> >> >> This occurred to me, not as anything practical maybe but as an >> interesting architecture. >> >> https://www.dropbox.com/s/8ls632mndcxqby8/DAC_TCXO.JPG?raw=1 >> >> It's sort of a thermometer-code ADC, but each comparator incrementally >> adds + or - one increment to the output. >> >> As the temperature increases, we jog the output up or down one >> increment at a time. >> >> The sequence of switch settings become a delta-sigma code to make the >> output. >> >> The comparators could be sort of linear, not step outputs, to kind of >> interpolate a bit. Some flash ADCs did something like that, soft >> comparators. > > Yes, > but you can get more linear varicap effect by using for example 2. > This paper shows some topologies and their effect: > https://www.everythingrf.com/uploads/whitepapers/IEEE_BCTM_092010_2.pdf > > Then use a linear opamp feedback loop? > > I am using something like fig 1b on page 3 for my 25 MHz PLL reference for Eshail2. >
At a given frequency you can do a good job of linearizing a varactor by using one inductor in series, resonated just off the high-capacitance end, and one in parallel, resonated just off the low-capacitance end. Cheers Phil Hobbs -- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC / Hobbs ElectroOptics Optics, Electro-optics, Photonics, Analog Electronics Briarcliff Manor NY 10510 http://electrooptical.net http://hobbs-eo.com
On 05/01/2019 17:55, John Larkin wrote:
> We were talking about TCXOs. One measures temperature and drives a > varicap through some nonlinear transfer function to get minumum net > TC. > > We don't want a digital design (ADC, lookup table or polynomial, DAC) > because that might add phase noise. I guess you could use a static > polynomial with the equivalent of nonvolatile DPOTS as the > coefficients.
Couldn't you do it all digitally and then low pass filter the output so that the phase noise is kept within acceptable bounds. Sounds like you will need to calibrate every one against a good reference oscillator. -- Regards, Martin Brown
On Sat, 5 Jan 2019 14:05:08 -0800 (PST), "John Miles, KE5FX"
<jmiles@gmail.com> wrote:

>On Saturday, January 5, 2019 at 1:23:09 PM UTC-8, John Larkin wrote: >> That circuit is conceptual, certainly not done. Only one comparator >> switches at a time, and each step would change the frequency PPBs. >> Sure, lowpass the varicap drive. Even better, make the comparator >> gains low so the transitions are soft. >> > >Is there a difference between building this circuit and adding an LPF, >and using a traditional DAC and adding an LPF? Either way, you aren't >going to add significant phase noise beyond the LPF cutoff.
Looks pretty different to me. There's no clock to make power supply and varicap noise. Incremental linearity is almost perfect. Might be suitable for integration. I just thought it was an interesting nonlinear function generator that I hadn't see before. Low integrator gains would be interesting too.
> >A DAC-driven control loop can work well without a whole lot of head- >scatching. (Almost) everyone with a GPSDO has one of those. Remember, >TCXOs and OCXOs don't have a lot of kVCO gain, so they aren't that >vulnerable to noise injection. At least not compared to microwave VCOs that >run at 100 MHz/volt, and that are also often pretuned by DACs. > >-- john, KE5FX
-- John Larkin Highland Technology, Inc lunatic fringe electronics
On Sun, 6 Jan 2019 10:26:04 +0000, Martin Brown
<'''newspam'''@nezumi.demon.co.uk> wrote:

>On 05/01/2019 17:55, John Larkin wrote: >> We were talking about TCXOs. One measures temperature and drives a >> varicap through some nonlinear transfer function to get minumum net >> TC. >> >> We don't want a digital design (ADC, lookup table or polynomial, DAC) >> because that might add phase noise. I guess you could use a static >> polynomial with the equivalent of nonvolatile DPOTS as the >> coefficients. > >Couldn't you do it all digitally and then low pass filter the output so >that the phase noise is kept within acceptable bounds. Sounds like you >will need to calibrate every one against a good reference oscillator.
Any good TCXO will need to be temperature swept and calibrated. You can trim resistors in a thermistor network, trim polynomial terms, load a ROM lookup table, or flip my row of switches. The cal has to be nonvolatile somehow. Most small TCXOs have a couple of DNC pins which I assume are an SPI-like programming port. "NC" sometimes means "not connected internally" and sometimes means "do not connect to this pin." -- John Larkin Highland Technology, Inc lunatic fringe electronics