"kevin93" <kevin@whitedigs.com> wrote in message news:6d76bb3a-0bea-4fc8-ae05-a17ddc4b5512@googlegroups.com...> This is a curve I measured for a BSS138 at low current - there was about > 160mV change in gate drive during the run down. > > There is a fair amount of curvature of the drain voltage slope. > > I used your technique of documenting it within the photo - good idea. > > https://i.imgur.com/xxG9CC8.jpgSee how it's angled in during the onset of the plateau? Suppose Cdg were massively smaller at that point; what would happen? Well, Vds would drop a whole lot faster, and Vgs would rise faster, too. Though not quite as fast as below threshold. Now reflect upon my waveform: https://www.seventransistorlabs.com/Images/STP19NM50N%201.045mA%20Gate%20Charge%20400V%2030.1%20ohm%20Drain.png The first 'break' in the rising gate voltage, where Vds first drops, is exactly where that happens. Cdg is extremely small, perhaps 10pF. Well, let's see. The initial slope is about 3:1, or 6V per 5.2nC, or 0.87nF (which is Ciss, close to the 1nF datasheet figure). When Vds starts to drop, it gets more shallow, about 1:1 slope, or 2V/5nC, or 2.5nF equivalent. We could calculate the voltage gain and Miller effect, but better to use the totals: delta Vgs = 1.2V (4.0 to 5.2V) delta T = 3.3us --> delta Q = 3.45nC delta Vds = 340V So delta Qg = 1.044nC (still assuming 0.87nF), so delta Qgd = 1.4nC. 1.4nC / 340V = 4.11pF average. Which is pretty astonishingly low! It's not fully "on" until 20us after trigger -- even though Vds swings 90% in the first 7us. That's the magic of these SuperJunction parts. The capacitance acts like a snubber network built into the MOSFET, massively saving on switching losses, even for hard switched loads! Tim -- Seven Transistor Labs, LLC Electrical Engineering Consultation and Contract Design Website: http://seventransistorlabs.com
MOSFET WTF
Started by ●September 23, 2017
Reply by ●September 24, 20172017-09-24
Reply by ●October 1, 20172017-10-01
kevin93 wrote...> >On Saturday, September 23, 2017 at 12:25:24 PM UTC-7, John Larkin wrote: >... > >> Except for the soft corners, their plateau is horizontal. >>=20 >... > >The plateau will not be quite horizontal - its slope will depend upon the v= >oltage gain which depends upon the gm of the FET and the effective resistan= >ce at the drain circuit. > >There has to be enough gate voltage change in the plateau region to cause t= >he drain voltage to change to counteract the charge being suppled by the ga= >te circuit to to the other end of Cgd. > >The test circuits with a constant current sourcing for the drain will have = >the most gain, the ones using another identical device as the CC source and= > the ones using a resistor will have decreasing order of gain and larger ga= >te voltage slope on the plateau. > >The one using an identical device seems a reasonable standard as the gain w= >ill be "gm*Ro/2".Right, if the measurement is made at a high current density for the MOSFET, it'll show a slope. -- Thanks, - Win
